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Searched refs:AR71XX_PLL_SEC_CONFIG (Results 1 – 2 of 2) sorted by relevance

/f-stack/freebsd/mips/atheros/
H A Dar71xx_chip.c240 ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG, in ar71xx_chip_set_pll_ge()
245 ar71xx_write_pll(AR71XX_PLL_SEC_CONFIG, in ar71xx_chip_set_pll_ge()
H A Dar71xxreg.h189 #define AR71XX_PLL_SEC_CONFIG 0x18050004 macro