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Searched refs:AL_REG_FIELD_SET (Results 1 – 7 of 7) sorted by relevance

/f-stack/freebsd/contrib/alpine-hal/eth/
H A Dal_hal_eth_kr.c377 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
381 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
391 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
395 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
405 AL_REG_FIELD_SET(cfg_lane_0, in al_eth_an_lt_unit_config()
567 AL_REG_FIELD_SET(reg, in al_eth_ld_coeff_up_set()
572 AL_REG_FIELD_SET(reg, in al_eth_ld_coeff_up_set()
577 AL_REG_FIELD_SET(reg, in al_eth_ld_coeff_up_set()
592 AL_REG_FIELD_SET(reg, in al_eth_ld_status_report_set()
597 AL_REG_FIELD_SET(reg, in al_eth_ld_status_report_set()
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H A Dal_hal_eth_main.c1801 AL_REG_FIELD_SET(if_mode, in al_eth_mac_link_config_10g_mac()
1806 AL_REG_FIELD_SET(if_mode, in al_eth_mac_link_config_10g_mac()
3050 AL_REG_FIELD_SET(val, AL_FIELD_MASK(5,4), 4, qid); in al_eth_fwd_mhash_table_set()
4437 AL_REG_FIELD_SET(reg, AL_HAL_ETH_MEDIA_TYPE_MASK, in al_eth_board_params_set()
4440 AL_REG_FIELD_SET(reg, AL_HAL_ETH_PHY_ADDR_MASK, in al_eth_board_params_set()
4448 AL_REG_FIELD_SET(reg, AL_HAL_ETH_MDIO_FREQ_MASK, in al_eth_board_params_set()
4452 AL_REG_FIELD_SET(reg, AL_HAL_ETH_EXT_PHY_IF_MASK, in al_eth_board_params_set()
4458 AL_REG_FIELD_SET(reg, AL_HAL_ETH_SERDES_GRP_MASK, in al_eth_board_params_set()
4464 AL_REG_FIELD_SET(reg, AL_HAL_ETH_SERDES_LANE_MASK, in al_eth_board_params_set()
4485 AL_REG_FIELD_SET(reg, AL_HAL_ETH_1G_SPEED_MASK, in al_eth_board_params_set()
[all …]
/f-stack/freebsd/contrib/alpine-hal/
H A Dal_hal_iofic.c77 AL_REG_FIELD_SET(reg, in al_iofic_moder_res_config()
99 AL_REG_FIELD_SET(reg, in al_iofic_legacy_moder_interval_config()
122 AL_REG_FIELD_SET(reg, in al_iofic_msix_moder_interval_config()
143 AL_REG_FIELD_SET(reg, in al_iofic_msix_tgtid_attributes_config()
H A Dal_hal_reg_utils.h69 #define AL_REG_FIELD_SET(reg, mask, shift, val) \ macro
89 AL_REG_FIELD_SET(reg, AL_BIT(shift), shift, val)
H A Dal_hal_serdes_hssp.c1545 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1550 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1562 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1567 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1579 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1584 AL_REG_FIELD_SET(reg, in al_serdes_tx_advanced_params_set()
1665 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
1670 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
1682 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
1687 AL_REG_FIELD_SET(reg, in al_serdes_rx_advanced_params_set()
[all …]
H A Dal_hal_pcie.c587 AL_REG_FIELD_SET(reg, PCIE_PORT_GEN3_EQ_LF_MASK, in al_pcie_port_gen3_params_config()
590 AL_REG_FIELD_SET(reg, PCIE_PORT_GEN3_EQ_FS_MASK, in al_pcie_port_gen3_params_config()
947 AL_REG_FIELD_SET(reg, 0xF, 0, i); in al_pcie_ecrc_gen_ob_atu_enable()
2433 AL_REG_FIELD_SET(reg, 0xF, 0, atu_region->index); in al_pcie_atu_region_set()
2527 AL_REG_FIELD_SET(reg, 0x1F, 0, atu_region->tlp_type); in al_pcie_atu_region_set()
2528 AL_REG_FIELD_SET(reg, 0x3 << 9, 9, atu_region->attr); in al_pcie_atu_region_set()
2534 AL_REG_FIELD_SET(reg, in al_pcie_atu_region_set()
2544 AL_REG_FIELD_SET(reg, 0xFF, 0, atu_region->msg_code); in al_pcie_atu_region_set()
2560 AL_REG_FIELD_SET(reg, in al_pcie_atu_region_set()
2581 AL_REG_FIELD_SET(reg, 0xF, 0, index); in al_pcie_atu_region_get_fields()
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H A Dal_hal_udma_config.c993 …AL_REG_FIELD_SET(reg, UDMA_S2M_WR_DATA_CFG_2_DESC_WAIT_TIMER_MASK, UDMA_S2M_WR_DATA_CFG_2_DESC_WAI… in al_udma_s2m_no_desc_cfg_set()