Home
last modified time | relevance | path

Searched refs:upper_32_bits (Results 1 – 25 of 33) sorted by relevance

12

/dpdk/drivers/common/dpaax/caamflib/
H A Dcompat.h83 #ifndef upper_32_bits
88 #define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16)) macro
/dpdk/drivers/bus/fslmc/portal/
H A Ddpaa2_hw_pvt.h24 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) macro
269 (fd)->simple.addr_hi = upper_32_bits((uint64_t)(addr)); \
295 (fd)->simple.flc_hi = upper_32_bits((uint64_t)(addr)); \
302 (fle)->addr_hi = upper_32_bits((uint64_t)addr); \
308 (fle)->reserved[1] = upper_32_bits((uint64_t)addr); \
/dpdk/drivers/common/dpaax/caamflib/rta/
H A Dsec_run_time_asm.h485 upper_32_bits(val)); in __rta_out64()
487 __rta_out32(program, program->bswap ? upper_32_bits(val) : in __rta_out64()
490 __rta_out32(program, program->bswap ? upper_32_bits(val) : in __rta_out64()
494 upper_32_bits(val)); in __rta_out64()
505 __rta_out_be32(program, upper_32_bits(val)); in __rta_out_be64()
517 __rta_out_le32(program, upper_32_bits(val)); in __rta_out_le64()
/dpdk/drivers/common/dpaax/
H A Dcompat.h218 #ifdef upper_32_bits
219 #undef upper_32_bits
221 #define upper_32_bits(x) ((u32)(((x) >> 16) >> 16)) macro
/dpdk/drivers/crypto/bcmfs/hw/
H A Dbcmfs_rm_common.h33 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) macro
H A Dbcmfs5_rm.c604 bd_high = upper_32_bits(tx_queue->base_phys_addr); in bcmfs5_start_qp()
620 cmpl_high = upper_32_bits(cmpl_queue->base_phys_addr); in bcmfs5_start_qp()
/dpdk/drivers/baseband/la12xx/
H A Dbbdev_la12xx.h48 #define upper_32_bits(x) ((uint32_t)(((uint64_t)(x) >> 16) >> 16)) macro
/dpdk/drivers/net/hinic/base/
H A Dhinic_pmd_nicio.c166 wq_page_pfn_hi = upper_32_bits(wq_page_pfn); in hinic_sq_prepare_ctxt()
170 wq_block_pfn_hi = upper_32_bits(wq_block_pfn); in hinic_sq_prepare_ctxt()
226 wq_page_pfn_hi = upper_32_bits(wq_page_pfn); in hinic_rq_prepare_ctxt()
230 wq_block_pfn_hi = upper_32_bits(wq_block_pfn); in hinic_rq_prepare_ctxt()
259 rq_ctxt->pi_paddr_hi = upper_32_bits(rq->pi_dma_addr); in hinic_rq_prepare_ctxt()
H A Dhinic_pmd_wq.c177 sge->hi_addr = upper_32_bits(addr); in hinic_set_sge()
H A Dhinic_compat.h69 #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) macro
H A Dhinic_pmd_api_cmd.c507 val = upper_32_bits(chain->wb_status_paddr); in api_cmd_set_status_addr()
539 val = upper_32_bits(chain->head_cell_paddr); in api_cmd_head_init()
/dpdk/drivers/net/hns3/
H A Dhns3_ptp.c172 sec = upper_32_bits(pf->rx_timestamp); in hns3_timesync_read_rx_timestamp()
248 hns3_write_dev(hw, HNS3_CFG_TIME_SYNC_H, upper_32_bits(sec)); in hns3_timesync_write_time()
H A Dhns3_cmd.c162 upper_32_bits(dma)); in hns3_cmd_config_regs()
172 upper_32_bits(dma)); in hns3_cmd_config_regs()
/dpdk/drivers/net/enetc/
H A Denetc.h44 #define upper_32_bits(n) ((uint32_t)(((n) >> 16) >> 16)) macro
H A Denetc_ethdev.c278 upper_32_bits((uint64_t)bd_address)); in enetc_setup_txbdr()
421 upper_32_bits((uint64_t)bd_address)); in enetc_setup_rxbdr()
/dpdk/drivers/bus/fslmc/qbman/include/
H A Dcompat.h76 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) macro
/dpdk/drivers/dma/dpaa/
H A Ddpaa_qdma.c14 ccdf->addr_hi = upper_32_bits(addr); in qdma_desc_addr_set64()
504 qdma_writel(upper_32_bits(temp->bus_addr), in fsl_qdma_reg_init()
508 qdma_writel(upper_32_bits(temp->bus_addr), in fsl_qdma_reg_init()
535 upper_32_bits(fsl_qdma->status[j]->bus_addr), in fsl_qdma_reg_init()
541 upper_32_bits(fsl_qdma->status[j]->bus_addr), in fsl_qdma_reg_init()
/dpdk/drivers/dma/hisilicon/
H A Dhisi_dmadev.h20 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) macro
/dpdk/drivers/bus/dpaa/include/
H A Dfsl_bman.h82 __buf931->hi = upper_32_bits(v); \
/dpdk/drivers/net/i40e/base/
H A Di40e_osdep.h38 #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) macro
/dpdk/drivers/net/hinic/
H A Dhinic_pmd_rx.c284 buf_desc->addr_high = upper_32_bits(buf_addr); in hinic_prepare_rq_wqe()
932 cpu_to_be32(upper_32_bits(dma_addr)); in hinic_rearm_rxq_mbuf()
971 cpu_to_be32(upper_32_bits(dma_addr)); in hinic_rx_alloc_pkts()
/dpdk/drivers/raw/dpaa2_qdma/
H A Ddpaa2_qdma.c52 fd->simple_pci.saddr_hi = upper_32_bits((uint64_t) (src)); in qdma_populate_fd_pci()
77 fd->simple_pci.daddr_hi = upper_32_bits((uint64_t) (dest)); in qdma_populate_fd_pci()
87 fd->simple_ddr.saddr_hi = upper_32_bits((uint64_t) (src)); in qdma_populate_fd_ddr()
112 fd->simple_ddr.daddr_hi = upper_32_bits((uint64_t) (dest)); in qdma_populate_fd_ddr()
/dpdk/drivers/common/dpaax/caamflib/desc/
H A Dpdcp.h800 MATHB(p, MATH1, AND, upper_32_bits(PDCP_BEARER_MASK), in pdcp_insert_uplane_snow_snow_op()
807 MATHB(p, MATH1, AND, upper_32_bits(PDCP_DIR_MASK_BE), in pdcp_insert_uplane_snow_snow_op()
1409 MATHB(p, MATH1, AND, upper_32_bits(PDCP_BEARER_MASK), MATH2, 4, in pdcp_insert_cplane_aes_snow_op()
1416 MATHB(p, MATH1, AND, upper_32_bits(PDCP_DIR_MASK_BE), MATH3, in pdcp_insert_cplane_aes_snow_op()
1733 MATHB(p, MATH1, AND, upper_32_bits(PDCP_BEARER_MASK), MATH2, in pdcp_insert_cplane_zuc_snow_op()
1740 MATHB(p, MATH1, AND, upper_32_bits(PDCP_DIR_MASK_BE), MATH3, in pdcp_insert_cplane_zuc_snow_op()
H A Dsdap.h410 MATHB(p, MATH1, AND, upper_32_bits(PDCP_BEARER_MASK), in pdcp_sdap_insert_snoop_op()
417 MATHB(p, MATH1, AND, upper_32_bits(PDCP_DIR_MASK_BE), in pdcp_sdap_insert_snoop_op()
/dpdk/drivers/net/ena/base/
H A Dena_plat_dpdk.h282 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16)) macro

12