| /dpdk/drivers/crypto/scheduler/ |
| H A D | scheduler_pkt_size_distr.c | 19 uint32_t threshold; member 26 uint32_t threshold; member 78 p_enq_op = &enq_ops[!(job_len & psd_qp_ctx->threshold)]; in schedule_enqueue() 95 p_enq_op = &enq_ops[!(job_len & psd_qp_ctx->threshold)]; in schedule_enqueue() 280 ps_qp_ctx->threshold = psd_ctx->threshold; in scheduler_start() 349 psd_ctx->threshold = DEF_PKT_SIZE_THRESHOLD; in scheduler_create_private_ctx() 361 uint32_t threshold; in scheduler_option_set() local 370 option)->threshold; in scheduler_option_set() 371 if (!rte_is_power_of_2(threshold)) { in scheduler_option_set() 376 psd_ctx->threshold = ~(threshold - 1); in scheduler_option_set() [all …]
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| H A D | rte_cryptodev_scheduler.h | 81 uint32_t threshold; /**< Threshold for packet-size mode */ member
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| H A D | scheduler_pmd.c | 164 option.threshold_option.threshold = in cryptodev_scheduler_create()
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| /dpdk/drivers/raw/ifpga/base/ |
| H A D | ifpga_fme.c | 222 temp_threshold.csr = readq(&thermal->threshold); in fme_thermal_get_threshold1() 240 tmp_threshold.csr = readq(&thermal->threshold); in fme_thermal_set_threshold1() 257 writeq(tmp_threshold.csr, &thermal->threshold); in fme_thermal_set_threshold1() 289 tmp_threshold.csr = readq(&thermal->threshold); in fme_thermal_set_threshold2() 306 writeq(tmp_threshold.csr, &thermal->threshold); in fme_thermal_set_threshold2() 538 *threshold = pm_ap_threshold.threshold1; in fme_pwr_get_threshold1() 553 if (threshold <= PWR_THRESHOLD_MAX) { in fme_pwr_set_threshold1() 554 pm_ap_threshold.threshold1 = threshold; in fme_pwr_set_threshold1() 575 *threshold = pm_ap_threshold.threshold2; in fme_pwr_get_threshold2() 590 if (threshold <= PWR_THRESHOLD_MAX) { in fme_pwr_set_threshold2() [all …]
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| H A D | ifpga_defines.h | 633 struct feature_fme_tmp_threshold threshold; member 713 struct feature_fme_pm_ap_threshold threshold; member
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| /dpdk/doc/guides/cryptodevs/ |
| H A D | scheduler.rst | 68 such as the **threshold** packet size of **packet-size-distr** mode. This 118 than the designated threshold, otherwise it will be handled by the secondary 127 The threshold is set to 128 bytes by default. It can be updated by calling 131 appropriate threshold value. Please NOTE this threshold has be a power-of-2 135 ... --vdev "crypto_scheduler,mode=packet-size-distr,mode_param=threshold:512" ... 137 The above parameter will overwrite the threshold value to 512.
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| /dpdk/doc/guides/nics/ |
| H A D | nfb.rst | 135 RX queues=2 - RX desc=128 - RX free threshold=0 136 RX threshold registers: pthresh=0 hthresh=0 wthresh=0 137 TX queues=2 - TX desc=512 - TX free threshold=0 138 TX threshold registers: pthresh=0 hthresh=0 wthresh=0 139 TX RS bit threshold=0 - TXQ flags=0x0
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| H A D | softnic.rst | 175 RX desc=512 - RX free threshold=32 176 RX threshold registers: pthresh=8 hthresh=8 wthresh=0 179 TX desc=512 - TX free threshold=32 180 TX threshold registers: pthresh=32 hthresh=0 wthresh=0 181 TX offloads=0x0 - TX RS bit threshold=32 185 RX desc=0 - RX free threshold=0 186 RX threshold registers: pthresh=0 hthresh=0 wthresh=0 189 TX desc=0 - TX free threshold=0 190 TX threshold registers: pthresh=0 hthresh=0 wthresh=0 191 TX offloads=0x0 - TX RS bit threshold=0
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| H A D | pcap_ring.rst | 241 RX queues=1 - RX desc=128 - RX free threshold=0 242 RX threshold registers: pthresh=8 hthresh=8 wthresh=4 243 TX queues=1 - TX desc=512 - TX free threshold=0 244 TX threshold registers: pthresh=36 hthresh=0 wthresh=0 245 TX RS bit threshold=0 - TXQ flags=0x0
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| H A D | cnxk.rst | 96 RX desc=4096 - RX free threshold=0 97 RX threshold registers: pthresh=0 hthresh=0 wthresh=0 100 TX desc=512 - TX free threshold=0 101 TX threshold registers: pthresh=0 hthresh=0 wthresh=0 102 TX offloads=0x0 - TX RS bit threshold=0
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| H A D | netvsc.rst | 122 The rx_copybreak sets the threshold where the driver uses an external 130 The tx_copybreak sets the threshold where the driver aggregates
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| /dpdk/doc/guides/sample_app_ug/ |
| H A D | qos_scheduler.rst | 100 * --rth "A, B, C": The RX queue threshold parameters 102 * A = RX prefetch threshold (the default value is 8) 104 * B = RX host threshold (the default value is 8) 106 * C = RX write-back threshold (the default value is 4) 108 * --tth "A, B, C": TX queue threshold parameters 110 * A = TX prefetch threshold (the default value is 36) 112 * B = TX host threshold (the default value is 0) 114 * C = TX write-back threshold (the default value is 0)
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| H A D | l3_forward_power_man.rst | 54 … it decreases frequency a step if packet processed per loop is far less than the expected threshold 55 or the thread's sleeping time exceeds a threshold. 247 …threshold values. If the training_flag is set as 0(false), the application will start in normal mo… 251 * ``high_threshold`` : optional, sets the empty poll threshold of a busy system state. If this is n… 271 and 3), and then print out the recommended threshold values for those 278 POWER: Low threshold is 230277 279 POWER: MED threshold is 335071 280 POWER: HIGH threshold is 523769 283 POWER: Low threshold is 236814 284 POWER: MED threshold is 344567 [all …]
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| H A D | ntb.rst | 63 Set the transmit free threshold of TX rings to N, where 0 <= N <=
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| H A D | vm_power_management.rst | 416 the ratio threshold, the core frequency scales up to the maximum 418 that identifies the threshold at which to scale up or down for the 740 The threshold below which the frequency is set to the minimum value 823 the threshold value above which the frequency is set to a maximum.
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| /dpdk/doc/guides/testpmd_app_ug/ |
| H A D | run_app.rst | 328 Set the prefetch threshold register of RX rings to N, where N >= 0. 333 Set the host threshold register of RX rings to N, where N >= 0. 338 Set the free threshold of RX descriptors to N, where 0 <= N < value of --rxd. 343 Set the write-back threshold register of RX rings to N, where N >= 0. 348 Set the prefetch threshold register of TX rings to N, where N >= 0. 353 Set the host threshold register of TX rings to N, where N >= 0. 358 Set the write-back threshold register of TX rings to N, where N >= 0. 363 Set the transmit free threshold of TX rings to N, where 0 <= N <= value of ``--txd``. 368 Set the transmit RS bit threshold of TX rings to N, where 0 <= N <= value of ``--txd``.
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| H A D | testpmd_funcs.rst | 305 RX queues=1 - RX desc=128 - RX free threshold=0 306 RX threshold registers: pthresh=8 hthresh=8 wthresh=4 307 TX queues=1 - TX desc=512 - TX free threshold=0 308 TX threshold registers: pthresh=36 hthresh=0 wthresh=0 309 TX RS bit threshold=0 - TXQ flags=0x0 1529 * ``low_water`` (integer): Low threshold value to trigger XON. 1556 * ``high_water`` (integer): High threshold value. 1558 * ``low_water`` (integer): Low threshold value. 2351 testpmd> port config all (threshold) (value) 2353 Where the threshold type can be: [all …]
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| /dpdk/drivers/bus/fslmc/portal/ |
| H A D | dpaa2_hw_dpio.c | 175 int threshold = 0x3, timeout = 0xFF; in dpaa2_dpio_intr_init() local 185 threshold = atoi(getenv("DPAA2_PORTAL_INTR_THRESHOLD")); in dpaa2_dpio_intr_init() 194 qbman_swp_dqrr_thrshld_write(dpio_dev->sw_portal, threshold); in dpaa2_dpio_intr_init()
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| /dpdk/drivers/event/dlb2/pf/base/ |
| H A D | dlb2_resource.h | 520 u16 threshold); 551 u16 threshold);
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| /dpdk/doc/guides/eventdevs/ |
| H A D | dlb2.rst | 321 the thresholds to track how full a queue is compared to its threshold. 324 - Less than or equal to 50% of queue depth threshold 325 - Greater than 50%, but less than or equal to 75% of depth threshold 326 - Greater than 75%, but less than or equal to 100% of depth threshold 329 Per queue threshold metrics are tracked in the DLB xstats, and are also 332 The per qid threshold can be specified as part of the device args, and
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| /dpdk/doc/guides/prog_guide/ |
| H A D | power_man.rst | 166 Once the training phase is complete, the threshold numbers are 168 the system. These threshold number can be used on the command line 173 to the supplied threshold values, and the decision will be made
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| H A D | poll_mode_drv.rst | 205 * The values of the Prefetch, Host and Write-Back threshold registers of the transmit queue 207 * The *minimum* transmit packets to free threshold (tx_free_thresh). 208 …When the number of descriptors used to transmit packets exceeds this threshold, the network adapto… 213 * The *minimum* RS bit threshold. The minimum number of transmit descriptors to use before setti… 216 …up to the first descriptor used to transmit the packet, exceeds the transmit RS bit threshold (tx_… 222 …It is important to note that the TX Write-back threshold (TX wthresh) should be set to 0 when tx_r… 239 … is used as a sentinel to avoid a hardware race condition, hence the maximum threshold constraints.
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| /dpdk/drivers/net/dpaa2/mc/ |
| H A D | fsl_dpni_cmd.h | 724 uint32_t threshold; member 747 uint32_t threshold; member
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| H A D | dpni.c | 2622 cmd_params->threshold = cpu_to_le32(taildrop->threshold); in dpni_set_taildrop() 2682 taildrop->threshold = le32_to_cpu(rsp_params->threshold); in dpni_get_taildrop()
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| /dpdk/doc/guides/rel_notes/ |
| H A D | release_20_02.rst | 220 dual-thread feature. It was replaced with a threshold feature. At busy times 223 the new threshold parameter on process start. Please see QAT documentation for
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