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Searched refs:setting (Results 1 – 25 of 93) sorted by relevance

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/dpdk/doc/guides/prog_guide/
H A Dpdump_lib.rst27 It also allows setting an optional filter using DPDK BPF interpreter
28 and setting the captured packet length.
35 It also allows setting an optional filter using DPDK BPF interpreter
36 and setting the captured packet length.
H A Dlto.rst29 Link time optimization can be enabled by setting meson built-in 'b_lto' option:
/dpdk/doc/guides/howto/
H A Davx512.rst9 and by the user with a commandline argument. DPDK has a setting for max SIMD bitwidth,
17 This can be done by modifying the EAL setting for max SIMD bitwidth to 512, as by default it is 256,
H A Dvfd.rst114 Although it is a VFd function, it is the global setting for the whole
119 VF MAC address setting
210 This is a global setting for the PF and all the VF ports of the physical port.
226 function is per VF setting and the previous function is a global setting.
265 VF RX mode setting
308 VF MAC broadcast setting
H A Drte_flow.rst44 /* setting the eth to pass all packets */
140 /* setting the eth to pass all packets */
239 /* setting the eth to pass all packets */
/dpdk/doc/guides/sample_app_ug/
H A Dflow_filtering.rst142 We are setting the RX port to promiscuous mode:
147 :end-before: >8 End of setting the RX port to promiscuous mode.
208 :end-before: >8 End of setting the rule attribute.
217 :end-before: >8 End of setting the rule attribute.
228 :end-before: >8 End of setting the first level of the pattern.
236 :end-before: >8 End of setting the second level of the pattern.
H A Dvmdq_forwarding.rst27 And queues numbers for each VMDq pool can be changed by setting RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM
77 The VMDq hardware feature is configured at port initialization time by setting the appropriate valu…
H A Dpacket_ordering.rst54 When setting more than 1 port, traffic would be forwarded in pairs.
/dpdk/doc/guides/nics/
H A Dtxgbe.rst130 take effect requires setting the ``ffe_set``.
135 take effect requires setting the ``ffe_set``.
140 take effect requires setting the ``ffe_set``.
H A Datlantic.rst39 MTU setting
H A Dice.rst89 In pipeline mode, a flow can be set at one specific stage by setting parameter
101 use pipeline mode by setting ``devargs`` parameter ``pipeline-mode-support``,
127 This setting means queues 1, 2-3, 8-9 are TCP extraction, queues 10-13 are
134 This setting means queues 1, 2-3, 8-9 are TCP extraction, queues 10-23 are
H A Di40e.rst553 i40e private APIs and start the process of setting or flushing the queue
626 16 Byte RX Descriptor setting on DPDK VF
666 VF & TC max bandwidth setting
670 The behavior is different when handling per VF and per TC max bandwidth setting.
675 bandwidth setting.
677 TC TX scheduling mode setting
687 VF performance is impacted by PCI extended tag setting
731 PMD uses I40E_GL_SWT_L2TAGCTRL to set vlan TPID. If setting TPID in port A
H A Dthunderx.rst86 …der-nic`` driver is in use make sure your kernel config includes ``CONFIG_THUNDER_NIC_PF`` setting.
114 …r-nicvf`` driver is in use make sure your kernel config includes ``CONFIG_THUNDER_NIC_VF`` setting.
403 in scatter/gather mode. So, setting MTU will result with ``EINVAL`` when the
/dpdk/doc/guides/cryptodevs/
H A Docteontx.rst69 Refer :doc:`../platform/octeontx` for details about setting up the platform
82 The number of crypto VFs to be enabled can be controlled by setting sysfs entry,
/dpdk/doc/guides/rel_notes/
H A Drelease_17_05.rst82 * **Added VF max bandwidth setting in i40e.**
86 * **Added VF TC min and max bandwidth setting in i40e.**
91 * **Added TC strict priority mode setting on i40e.**
96 setting on a physical port.
305 LSC interrupt cannot be detected when setting the backend, tap device,
320 * Removed the build-time setting ``CONFIG_RTE_RING_SPLIT_PROD_CONS``.
321 * Removed the build-time setting ``CONFIG_RTE_LIBRTE_RING_DEBUG``.
322 * Removed the build-time setting ``CONFIG_RTE_RING_PAUSE_REP_COUNT``.
H A Drelease_16_04.rst160 * **Added i40e support for setting mac addresses.**
164 * **Supported ether type setting of single and double VLAN for i40e**
234 * **Added szedata2 functions for setting link up/down.**
293 Fixed issue in ethdev library where the structure for setting
302 * **cxgbe: Fixed setting wrong device MTU.**
313 * **ixgbe: Fixed setting flow director flag twice.**
381 due to incorrect IV setting.
H A Drelease_20_02.rst50 * Added support setting VF MAC address by PF driver.
73 * Added support setting VF MAC address by PF driver.
74 * Added support for setting the link to specific speed.
91 * Added support for setting the link to specific speed.
/dpdk/config/ppc/
H A Dmeson.build111 # Certain POWER9 systems can scale as high as 1536 LCORES, but setting such a
121 # NUMA node will be supported by setting RTE_MAX_NUMA_NODES to 16. High end
/dpdk/examples/pipeline/examples/
H A Dregisters.spec4 ; This program is setting up two register arrays called "pkt_counters" and "byte_counters".
H A Dmeter.spec4 ; This program is setting up an array of Two Rate Three Color Marker (trTCM) meters called "meters".
/dpdk/doc/guides/rawdevs/
H A Dntb.rst17 BIOS setting on Intel Xeon
20 Intel Non-transparent Bridge needs special BIOS setting. The reference for
/dpdk/doc/guides/linux_gsg/
H A Dbuild_dpdk.rst127 ``cpu_instruction_set`` is not used in Arm builds, as setting the instruction set
158 This can be done either by setting ``CFLAGS`` and ``LDFLAGS`` in the environment,
163 This is done by setting ``PKG_CONFIG_LIBDIR`` to the appropriate path.
/dpdk/doc/guides/bbdevs/
H A Dfpga_5gnr_fec.rst181 setting. The unit of weight is 3 code blocks. For example, if the code block
189 This watermark is defined by this setting.
196 the FLR time out then set this setting to 0x262=610.
H A Dfpga_lte_fec.rst180 setting. The unit of weight is 3 code blocks. For example, if the code block
188 This watermark is defined by this setting.
195 the FLR time out then set this setting to 0x262=610.
/dpdk/doc/guides/vdpadevs/
H A Dfeatures_overview.rst85 Guest support setting log base.

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