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Searched refs:row (Results 1 – 12 of 12) sorted by relevance

/dpdk/drivers/common/sfc_efx/base/
H A Defx_sram.c179 __in size_t row, in efx_sram_byte_increment_set() argument
183 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; in efx_sram_byte_increment_set()
194 __in size_t row, in efx_sram_all_the_same_set() argument
198 _NOTE(ARGUNUSED(row)) in efx_sram_all_the_same_set()
208 __in size_t row, in efx_sram_bit_alternate_set() argument
212 _NOTE(ARGUNUSED(row)) in efx_sram_bit_alternate_set()
221 __in size_t row, in efx_sram_byte_alternate_set() argument
225 _NOTE(ARGUNUSED(row)) in efx_sram_byte_alternate_set()
234 __in size_t row, in efx_sram_byte_changing_set() argument
238 size_t offset = row * FR_AZ_SRM_DBG_REG_STEP; in efx_sram_byte_changing_set()
[all …]
H A Defx.h2256 __in size_t row,
/dpdk/drivers/event/cnxk/
H A Dcnxk_eventdev_adptr.c442 uint64_t row = 0; in cnxk_sso_tx_queue_data_sz() local
449 row = 2 * eth_port_id; in cnxk_sso_tx_queue_data_sz()
450 *r = row; in cnxk_sso_tx_queue_data_sz()
459 row = size; in cnxk_sso_tx_queue_data_sz()
467 row = size; in cnxk_sso_tx_queue_data_sz()
474 *r = row; in cnxk_sso_tx_queue_data_sz()
487 uint64_t row = 0; in cnxk_sso_updt_tx_queue_data() local
494 max_queue_id, &row, &size); in cnxk_sso_updt_tx_queue_data()
506 txq_data[row + tx_queue_id] = (uint64_t)txq; in cnxk_sso_updt_tx_queue_data()
520 row = txq_data[eth_port_id] >> 48; in cnxk_sso_updt_tx_queue_data()
[all …]
/dpdk/lib/ip_frag/
H A Drte_ip_frag_common.c25 rte_prefetch0(dr->row[i]); in rte_ip_frag_free_death_row()
28 rte_prefetch0(dr->row[i + k]); in rte_ip_frag_free_death_row()
29 rte_pktmbuf_free(dr->row[i]); in rte_ip_frag_free_death_row()
33 rte_pktmbuf_free(dr->row[i]); in rte_ip_frag_free_death_row()
H A Dip_frag_common.h22 #define IP_FRAG_MBUF2DR(dr, mb) ((dr)->row[(dr)->cnt++] = (mb))
97 dr->row[k++] = fp->frags[i].mb; in ip_frag_free()
H A Drte_ip_frag.h40 struct rte_mbuf *row[RTE_IP_FRAG_DEATH_ROW_MBUF_LEN]; member
/dpdk/drivers/net/ice/base/
H A Dice_acl_ctrl.c431 u16 width, r_entries, row; in ice_acl_alloc_partition() local
471 row = hw->acl_tbl->first_tcam; in ice_acl_alloc_partition()
477 row = hw->acl_tbl->last_tcam + 1 - width; in ice_acl_alloc_partition()
498 for (w = row; w < row + width && avail; w++) { in ice_acl_alloc_partition()
515 start = (row * ICE_AQC_ACL_TCAM_DEPTH) + in ice_acl_alloc_partition()
529 row = dir > 0 ? row + width : row - width; in ice_acl_alloc_partition()
530 if (row > hw->acl_tbl->last_tcam || in ice_acl_alloc_partition()
531 row < hw->acl_tbl->first_tcam) { in ice_acl_alloc_partition()
545 row = dir > 0 ? off : in ice_acl_alloc_partition()
/dpdk/drivers/net/cxgbe/
H A Dsmt.c36 u8 row; in write_smt_entry() local
79 row = (e->hw_idx >> 1); in write_smt_entry()
92 row = e->hw_idx; in write_smt_entry()
102 V_SMTW_IDX(row) | in write_smt_entry()
/dpdk/doc/guides/sample_app_ug/
H A Dqos_metering.rst136 * In color blind mode, first row GREEN color is only valid.
H A Dvmdq_forwarding.rst121 Each row of the output is a single pool with the columns being the queue number within that pool.
H A Dvmdq_dcb_forwarding.rst141 Each row of the output is a single pool with the columns being the queue number within that pool.
/dpdk/drivers/net/qede/
H A Dqede_debug.c2851 u32 row, offset = 0; in qed_grc_dump_vfc_cam() local
2869 for (row = 0; row < VFC_CAM_NUM_ROWS; row++) { in qed_grc_dump_vfc_cam()
2870 SET_VAR_FIELD(cam_cmd, VFC_CAM_CMD, ROW, row); in qed_grc_dump_vfc_cam()
2896 u32 row, offset = 0; in qed_grc_dump_vfc_ram() local
2916 for (row = ram_defs->base_row; in qed_grc_dump_vfc_ram()
2917 row < ram_defs->base_row + ram_defs->num_rows; row++) { in qed_grc_dump_vfc_ram()
2918 SET_VAR_FIELD(ram_addr, VFC_RAM_ADDR, ROW, row); in qed_grc_dump_vfc_ram()