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Searched refs:pin (Results 1 – 13 of 13) sorted by relevance

/dpdk/doc/guides/howto/
H A Dpvp_reference_benchmark.rst171 You can use this `qmp-vcpu-pin <https://patchwork.kernel.org/patch/9361617/>`_
172 script to pin vCPUs.
174 It can be used as follows, for example to pin 3 vCPUs to CPUs 1, 6 and 7,
180 ./qmp-vcpu-pin -s /tmp/qmp.socket 1 6 7
H A Dlm_bond_virtio_sriov.rst256 capabilities: xbzrle: off rdma-pin-all: off auto-converge: off zero-blocks: off
277 capabilities: xbzrle: off rdma-pin-all: off auto-converge: off zero-blocks: off
H A Dlm_virtio_vhost_user.rst202 capabilities: xbzrle: off rdma-pin-all: off auto-converge: off zero-blocks: off
/dpdk/drivers/event/sw/
H A Dsw_evdev_xstats.c150 uint64_t pin = 0; in get_qid_port_stat() local
154 pin++; in get_qid_port_stat()
155 return pin; in get_qid_port_stat()
/dpdk/doc/guides/sample_app_ug/
H A Ddist_app.rst9 Intel Speed Select Technology - Base Frequency (Intel SST-BF) to pin the
118 cores and pin the workloads appropriately. The distributor core is usually
H A Dkernel_nic_interface.rst135 cores are used to pin the kernel threads in the ``rte_kni`` kernel module.
/dpdk/drivers/net/ice/base/
H A Dice_ptp_hw.c3230 bool pin; in ice_read_sma_ctrl_e810t() local
3233 &pin, NULL); in ice_read_sma_ctrl_e810t()
3236 *data |= (u8)(!pin) << i; in ice_read_sma_ctrl_e810t()
3260 bool pin; in ice_write_sma_ctrl_e810t() local
3262 pin = !(data & (1 << i)); in ice_write_sma_ctrl_e810t()
3264 pin, NULL); in ice_write_sma_ctrl_e810t()
/dpdk/doc/guides/nics/
H A Dice.rst232 signal outputs via SDP[20:23]. User can select GPIO pin index flexibly.
235 -a af:00.0,pps_out='[pin:0]'
H A Dmlx4.rst348 - '--socket-mem' is recommended to pin memory by predictable amount.
H A Dintel_vf.rst548 …For the expected benchmark performance, you must pin the cores from the Guest OS to the Host OS (t…
H A Dmlx5.rst1218 - '--socket-mem' is recommended to pin memory by predictable amount.
/dpdk/doc/guides/rawdevs/
H A Dcnxk_gpio.rst117 Message is used to set whether pin is active low.
/dpdk/doc/guides/rel_notes/
H A Drelease_22_03.rst178 also want to have fast and low latency access to GPIO pin state.