| /dpdk/drivers/net/ena/base/ |
| H A D | ena_eth_com.c | 16 expected_phase = io_cq->phase; in ena_com_get_next_rx_cdesc()
85 io_sq->phase ^= 1; in ena_com_write_bounce_buffer_to_dev()
221 io_sq->phase ^= 1; in ena_com_sq_update_tail()
299 meta_desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_create_meta()
457 desc->len_ctrl |= ((u32)io_sq->phase << ENA_ETH_IO_TX_DESC_PHASE_SHIFT) & in ena_com_prepare_tx()
512 desc->len_ctrl |= ((u32)io_sq->phase << in ena_com_prepare_tx()
633 (io_sq->phase & ENA_ETH_IO_RX_DESC_PHASE_MASK); in ena_com_add_single_rx_desc()
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| H A D | ena_com.h | 123 u8 phase; member
168 u8 phase; member
180 u8 phase; member
192 u8 phase; member
239 u8 phase; member
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| H A D | ena_com.c | 99 sq->phase = 1; in ena_com_admin_init_sq()
121 cq->phase = 1; in ena_com_admin_init_cq()
259 admin_queue->sq.phase = !admin_queue->sq.phase; in __ena_com_submit_admin_cmd()
482 u8 phase; in ena_com_handle_admin_completion() local
485 phase = admin_queue->cq.phase; in ena_com_handle_admin_completion()
502 phase = !phase; in ena_com_handle_admin_completion()
509 admin_queue->cq.phase = phase; in ena_com_handle_admin_completion()
2091 u8 phase; in ena_com_aenq_intr_handler() local
2094 phase = aenq->phase; in ena_com_aenq_intr_handler()
2125 phase = !phase; in ena_com_aenq_intr_handler()
[all …]
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| H A D | ena_eth_com.h | 221 io_cq->phase ^= 1; in ena_com_cq_inc_head()
232 expected_phase = io_cq->phase; in ena_com_tx_comp_req_id_get()
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| /dpdk/drivers/net/qede/base/ |
| H A D | ecore_init_ops.c | 457 u32 phase, u32 phase_id) argument
462 if (!(GET_FIELD(data, INIT_IF_PHASE_OP_PHASE) == phase &&
472 int phase, int phase_id, int modes) argument
475 bool b_dmae = (phase != PHASE_ENGINE);
511 cmd_num += ecore_init_cmd_phase(&cmd->if_phase, phase,
523 if (phase == PHASE_ENGINE &&
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| H A D | ecore_init_ops.h | 33 int phase,
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| H A D | ecore_hw.c | 1016 const char *phase) in ecore_dmae_sanity() argument
1028 phase); in ecore_dmae_sanity()
1046 phase, (unsigned long)p_phys, p_virt, in ecore_dmae_sanity()
1056 phase, rc); in ecore_dmae_sanity()
1070 phase, in ecore_dmae_sanity()
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| H A D | ecore_hw.h | 305 const char *phase);
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| /dpdk/doc/guides/prog_guide/ |
| H A D | power_man.rst | 159 * Training phase. This phase is used to measure the optimal frequency
163 In this phase, the user must ensure that no traffic can enter the
166 Once the training phase is complete, the threshold numbers are
172 * Normal phase. Every 10ms the run-time counters are compared
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| H A D | traffic_management.rst | 197 During this phase, some limited checks on the hierarchy specification can be
206 The hierarchy commit API is called during the port initialization phase (before
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| H A D | packet_classif_access_ctrl.rst | 317 Build phase (rte_acl_build()) creates for a given set of rules internal structure for further run-t…
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| H A D | packet_framework.rst | 1140 The presence of accelerators is usually detected during the initialization phase by inspecting the …
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| H A D | rte_flow.rst | 3614 An application may provide some parameters at the initialization phase about
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| /dpdk/app/test-pmd/ |
| H A D | txonly.c | 267 uint64_t phase; in pkt_burst_prepare() local
279 phase = tx_pkt_times_inter * fs->tx_queue / in pkt_burst_prepare()
286 tx_pkt_times_inter + phase; in pkt_burst_prepare()
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| /dpdk/doc/guides/contributing/ |
| H A D | design.rst | 135 application debug stage and are not relevant once debug phase is over. In this
137 statistics counters during the debug phase and at a later stage turn them off.
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| /dpdk/doc/guides/tools/ |
| H A D | comp_perf.rst | 15 data is compared against the original data (verification phase). After that,
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| /dpdk/doc/guides/sample_app_ug/ |
| H A D | l2_forward_job_stats.rst | 213 * stats_read_pending and lock are used during job stats read phase.
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| H A D | l3_forward.rst | 50 During the initialization phase route rules for IPv4 and IPv6 are read from rule files.
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| /dpdk/doc/guides/rel_notes/ |
| H A D | release_21_05.rst | 21 * **Added phase-fair lock.**
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