Searched refs:num_pools (Results 1 – 6 of 6) sorted by relevance
146 conf.nb_pool_maps = num_pools; in get_eth_conf()147 vmdq_conf.nb_pool_maps = num_pools; in get_eth_conf()220 if (num_pools > max_nb_pools) { in port_init()222 num_pools, max_nb_pools); in port_init()240 num_tcs, num_pools, num_vmdq_queues); in port_init()255 num_pools, queues_per_pool); in port_init()350 for (q = 0; q < num_pools; q++) { in port_init()384 num_pools = RTE_ETH_16_POOLS; in vmdq_parse_num_pools()386 num_pools = RTE_ETH_32_POOLS; in vmdq_parse_num_pools()528 if (q % (num_vmdq_queues / num_pools) == 0) in sighup_handler()[all …]
60 static uint32_t num_pools = 8; variable146 conf.nb_pool_maps = num_pools; in get_eth_conf()152 conf.pool_map[i].pools = (1UL << (i % num_pools)); in get_eth_conf()204 if (num_pools > max_nb_pools) { in port_init()206 num_pools, max_nb_pools); in port_init()219 num_vmdq_queues = num_pools * queues_per_pool; in port_init()226 num_pf_queues, num_pools, queues_per_pool); in port_init()326 for (q = 0; q < num_pools; q++) { in port_init()357 if (num_pools > num_vlans) { in vmdq_parse_num_pools()362 num_pools = n; in vmdq_parse_num_pools()[all …]
613 u16 num_pools = hw->iov.num_pools; in fm10k_queues_per_pool() local615 return (num_pools > 32) ? 2 : (num_pools > 16) ? 4 : (num_pools > 8) ? in fm10k_queues_per_pool()631 u16 num_pools = hw->iov.num_pools; in fm10k_vectors_per_pool() local633 return (num_pools > 32) ? 8 : (num_pools > 16) ? 16 : in fm10k_vectors_per_pool()656 u16 num_pools) in fm10k_iov_assign_resources_pf() argument663 if (num_pools > 64) in fm10k_iov_assign_resources_pf()667 if ((num_vfs > num_pools) || (num_vfs > hw->iov.total_vfs)) in fm10k_iov_assign_resources_pf()672 hw->iov.num_pools = num_pools; in fm10k_iov_assign_resources_pf()
701 u16 num_pools; member
3075 enum rte_eth_nb_pools num_pools; in txgbe_vmdq_dcb_configure() local3084 num_pools = cfg->nb_queue_pools; in txgbe_vmdq_dcb_configure()3086 if (num_pools != RTE_ETH_16_POOLS && num_pools != RTE_ETH_32_POOLS) { in txgbe_vmdq_dcb_configure()3091 nb_tcs = (uint8_t)(RTE_ETH_VMDQ_DCB_NUM_QUEUES / (int)num_pools); in txgbe_vmdq_dcb_configure()3114 if (num_pools == RTE_ETH_16_POOLS) { in txgbe_vmdq_dcb_configure()3154 num_pools == RTE_ETH_16_POOLS ? 0xFFFF : 0xFFFFFFFF); in txgbe_vmdq_dcb_configure()3742 enum rte_eth_nb_pools num_pools; in txgbe_vmdq_rx_hw_configure() local3750 num_pools = cfg->nb_queue_pools; in txgbe_vmdq_rx_hw_configure()3767 for (i = 0; i < (int)num_pools; i++) { in txgbe_vmdq_rx_hw_configure()3783 if (num_pools == RTE_ETH_64_POOLS) in txgbe_vmdq_rx_hw_configure()
3686 enum rte_eth_nb_pools num_pools; in ixgbe_vmdq_dcb_configure() local3695 num_pools = cfg->nb_queue_pools; in ixgbe_vmdq_dcb_configure()3697 if (num_pools != RTE_ETH_16_POOLS && num_pools != RTE_ETH_32_POOLS) { in ixgbe_vmdq_dcb_configure()3702 nb_tcs = (uint8_t)(RTE_ETH_VMDQ_DCB_NUM_QUEUES / (int)num_pools); in ixgbe_vmdq_dcb_configure()3736 mrqc = (num_pools == RTE_ETH_16_POOLS) ? in ixgbe_vmdq_dcb_configure()3776 num_pools == RTE_ETH_16_POOLS ? 0xFFFF : 0xFFFFFFFF); in ixgbe_vmdq_dcb_configure()4363 enum rte_eth_nb_pools num_pools; in ixgbe_vmdq_rx_hw_configure() local4371 num_pools = cfg->nb_queue_pools; in ixgbe_vmdq_rx_hw_configure()4388 for (i = 0; i < (int)num_pools; i++) { in ixgbe_vmdq_rx_hw_configure()4404 if (num_pools == RTE_ETH_64_POOLS) in ixgbe_vmdq_rx_hw_configure()