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Searched refs:nb_desc (Results 1 – 25 of 136) sorted by relevance

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/dpdk/drivers/net/fm10k/
H A Dfm10k_rxtx.c146 if (++next_dd == q->nb_desc) { in fm10k_recv_pkts()
180 q->nb_desc; in fm10k_recv_pkts()
338 q->nb_desc; in fm10k_recv_scattered_pkts()
389 rxq->nb_desc]; in fm10k_dev_rx_queue_count()
424 if (desc >= rxq->nb_desc) in fm10k_dev_rx_descriptor_status()
425 desc -= rxq->nb_desc; in fm10k_dev_rx_descriptor_status()
453 if (desc >= txq->nb_desc) { in fm10k_dev_tx_descriptor_status()
454 desc -= txq->nb_desc; in fm10k_dev_tx_descriptor_status()
455 if (desc >= txq->nb_desc) in fm10k_dev_tx_descriptor_status()
456 desc -= txq->nb_desc; in fm10k_dev_tx_descriptor_status()
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H A Dfm10k.h62 #define FM10K_RX_FREE_THRESH_MAX(rxq) ((rxq)->nb_desc - 1)
63 #define FM10K_RX_FREE_THRESH_DIV(rxq) ((rxq)->nb_desc)
67 #define FM10K_TX_FREE_THRESH_MAX(txq) ((txq)->nb_desc - 3)
81 RTE_MIN(((txq)->nb_desc - 2), (txq)->free_thresh)
82 #define FM10K_TX_RS_THRESH_DIV(txq) ((txq)->nb_desc)
166 uint16_t nb_desc; member
211 uint16_t nb_desc; member
H A Dfm10k_rxtx_vec.c341 if (rxq->rxrearm_start >= rxq->nb_desc) in fm10k_rxq_rearm()
347 (rxq->nb_desc - 1) : (rxq->rxrearm_start - 1)); in fm10k_rxq_rearm()
356 const unsigned mask = rxq->nb_desc - 1; in fm10k_rx_queue_release_mbufs_vec()
359 if (rxq->sw_ring == NULL || rxq->rxrearm_nb >= rxq->nb_desc) in fm10k_rx_queue_release_mbufs_vec()
364 for (i = 0; i < rxq->nb_desc; i++) in fm10k_rx_queue_release_mbufs_vec()
372 rxq->rxrearm_nb = rxq->nb_desc; in fm10k_rx_queue_release_mbufs_vec()
811 if (txq->next_dd >= txq->nb_desc) in fm10k_tx_free_bufs()
855 n = (uint16_t)(txq->nb_desc - tx_id); in fm10k_xmit_fixed_burst_vec()
899 for (i = 0; i < txq->nb_desc; i++) in fm10k_reset_tx_queue()
903 for (i = 0; i < txq->nb_desc; i++) in fm10k_reset_tx_queue()
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H A Dfm10k_ethdev.c208 for (i = 0; i < q->nb_desc; ++i) { in rx_queue_reset()
212 q->nb_desc); in rx_queue_reset()
226 q->hw_ring[q->nb_desc + i] = zero; in rx_queue_reset()
251 for (i = 0; i < q->nb_desc; ++i) in rx_queue_clean()
256 q->hw_ring[q->nb_desc + i] = zero; in rx_queue_clean()
265 for (i = 0; i < q->nb_desc; ++i) { in rx_queue_clean()
329 q->nb_free = q->nb_desc - 1; in tx_queue_reset()
346 for (i = 0; i < q->nb_desc; ++i) in tx_queue_clean()
350 for (i = 0; i < q->nb_desc; ++i) { in tx_queue_clean()
1840 q->nb_desc = nb_desc; in fm10k_rx_queue_setup()
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/dpdk/drivers/net/octeontx/
H A Docteontx_rxtx.h331 cmd_buf[nb_desc++] = 0x0; in __octeontx_xmit_prepare()
358 cmd_buf[nb_desc++] = iova; in __octeontx_xmit_prepare()
360 return nb_desc; in __octeontx_xmit_prepare()
376 cmd_buf[nb_desc++] = 0x0; in __octeontx_xmit_mseg_prepare()
393 cmd_buf[nb_desc] = 0; in __octeontx_xmit_mseg_prepare()
399 cmd_buf[nb_desc] |= in __octeontx_xmit_mseg_prepare()
423 nb_desc++; in __octeontx_xmit_mseg_prepare()
425 cmd_buf[nb_desc++] = iova; in __octeontx_xmit_mseg_prepare()
431 return nb_desc; in __octeontx_xmit_mseg_prepare()
441 uint16_t count = 0, nb_desc; in __octeontx_xmit_pkts() local
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/dpdk/drivers/net/axgbe/
H A Daxgbe_rxtx.c24 for (i = 0; i < rx_queue->nb_desc; i++) { in axgbe_rx_queue_release()
47 uint32_t rx_desc = nb_desc; in axgbe_dev_rx_queue_setup()
72 rxq->nb_desc = rx_desc; in axgbe_dev_rx_queue_setup()
86 if (rxq->free_thresh > rxq->nb_desc) in axgbe_dev_rx_queue_setup()
87 rxq->free_thresh = rxq->nb_desc >> 3; in axgbe_dev_rx_queue_setup()
218 if (unlikely(idx == rxq->nb_desc)) in axgbe_recv_pkts()
237 if (unlikely(pidx == rxq->nb_desc)) in axgbe_recv_pkts()
355 if (unlikely(idx == rxq->nb_desc)) in eth_axgbe_recv_scattered_pkts()
534 tx_desc = nb_desc; in axgbe_dev_tx_queue_setup()
554 txq->nb_desc = tx_desc; in axgbe_dev_tx_queue_setup()
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H A Daxgbe_rxtx.h39 ((_idx) & ((_queue)->nb_desc - 1)))
42 ((_idx) & ((_queue)->nb_desc - 1)) \
71 uint16_t nb_desc; member
111 uint16_t nb_desc; member
/dpdk/drivers/net/bnxt/
H A Dbnxt_txq.c121 uint16_t nb_desc, in bnxt_tx_queue_setup_op() argument
140 if (nb_desc < BNXT_MIN_RING_DESC || nb_desc > MAX_TX_DESC_CNT) { in bnxt_tx_queue_setup_op()
141 PMD_DRV_LOG(ERR, "nb_desc %d is invalid", nb_desc); in bnxt_tx_queue_setup_op()
161 sizeof(struct rte_mbuf *) * nb_desc, in bnxt_tx_queue_setup_op()
168 txq->nb_tx_desc = nb_desc; in bnxt_tx_queue_setup_op()
170 RTE_MIN(rte_align32pow2(nb_desc) / 4, RTE_BNXT_MAX_TX_BURST); in bnxt_tx_queue_setup_op()
H A Dbnxt_reps.c621 uint16_t nb_desc, in bnxt_rep_rx_queue_setup_op() argument
640 if (!nb_desc || nb_desc > MAX_RX_DESC_CNT) { in bnxt_rep_rx_queue_setup_op()
641 PMD_DRV_LOG(ERR, "nb_desc %d is invalid\n", nb_desc); in bnxt_rep_rx_queue_setup_op()
656 if (nb_desc != parent_rxq->nb_rx_desc) { in bnxt_rep_rx_queue_setup_op()
657 PMD_DRV_LOG(ERR, "nb_desc %d do not match parent rxq", nb_desc); in bnxt_rep_rx_queue_setup_op()
677 rxq->nb_rx_desc = nb_desc; in bnxt_rep_rx_queue_setup_op()
724 uint16_t nb_desc, in bnxt_rep_tx_queue_setup_op() argument
740 if (!nb_desc || nb_desc > MAX_TX_DESC_CNT) { in bnxt_rep_tx_queue_setup_op()
741 PMD_DRV_LOG(ERR, "nb_desc %d is invalid", nb_desc); in bnxt_rep_tx_queue_setup_op()
756 if (nb_desc != parent_txq->nb_tx_desc) { in bnxt_rep_tx_queue_setup_op()
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H A Dbnxt_reps.h34 __rte_unused uint16_t nb_desc,
41 __rte_unused uint16_t nb_desc,
/dpdk/drivers/regex/mlx5/
H A Dmlx5_regex_fastpath.c382 if (nb_desc) { in mlx5_regexdev_enqueue_gga()
384 if (nb_desc > nb_left) in mlx5_regexdev_enqueue_gga()
385 nb_desc = nb_left; in mlx5_regexdev_enqueue_gga()
389 nb_desc); in mlx5_regexdev_enqueue_gga()
391 nb_left -= nb_desc; in mlx5_regexdev_enqueue_gga()
395 ops += nb_desc; in mlx5_regexdev_enqueue_gga()
624 ptr = rte_calloc(__func__, qp->nb_desc, in setup_buffers()
649 MLX5_REGEX_KLMS_SIZE * qp->nb_desc, in setup_buffers()
660 for (i = 0; i < qp->nb_desc; i++) { in setup_buffers()
715 for (i = 0; i < qp->nb_desc; i++) { in mlx5_regexdev_setup_fastpath()
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H A Dmlx5_regex_control.c42 regex_ctrl_get_nb_obj(uint16_t nb_desc) in regex_ctrl_get_nb_obj() argument
44 return ((nb_desc / MLX5_REGEX_NUM_WQE_PER_PAGE) + in regex_ctrl_get_nb_obj()
45 !!(nb_desc % MLX5_REGEX_NUM_WQE_PER_PAGE)); in regex_ctrl_get_nb_obj()
214 log_desc = rte_log2_u32(cfg->nb_desc); in mlx5_regex_qp_setup()
222 qp->nb_desc = 1 << log_desc; in mlx5_regex_qp_setup()
235 log_desc = rte_log2_u32(qp->nb_desc / qp->nb_obj); in mlx5_regex_qp_setup()
/dpdk/drivers/net/ark/
H A Dark_ethdev_tx.c230 uint16_t nb_desc, in eth_ark_tx_queue_setup() argument
240 if (!rte_is_power_of_2(nb_desc)) { in eth_ark_tx_queue_setup()
244 nb_desc, __func__); in eth_ark_tx_queue_setup()
249 nb_desc = 2 * nb_desc; in eth_ark_tx_queue_setup()
264 queue->queue_size = nb_desc; in eth_ark_tx_queue_setup()
265 queue->queue_mask = nb_desc - 1; in eth_ark_tx_queue_setup()
274 nb_desc * sizeof(union ark_tx_meta), in eth_ark_tx_queue_setup()
279 nb_desc * sizeof(struct rte_mbuf *), in eth_ark_tx_queue_setup()
H A Dark_ethdev_rx.c118 uint16_t nb_desc, in eth_ark_dev_rx_queue_setup() argument
151 if (!rte_is_power_of_2(nb_desc)) { in eth_ark_dev_rx_queue_setup()
154 nb_desc, __func__); in eth_ark_dev_rx_queue_setup()
175 queue->queue_size = nb_desc; in eth_ark_dev_rx_queue_setup()
176 queue->queue_mask = nb_desc - 1; in eth_ark_dev_rx_queue_setup()
182 nb_desc * sizeof(struct rte_mbuf *), in eth_ark_dev_rx_queue_setup()
187 nb_desc * sizeof(rte_iova_t), in eth_ark_dev_rx_queue_setup()
217 if (queue->seed_index != nb_desc) { in eth_ark_dev_rx_queue_setup()
219 nb_desc, qidx); in eth_ark_dev_rx_queue_setup()
/dpdk/drivers/net/octeontx_ep/
H A Dotx_ep_rxtx.c106 iq->nb_desc = num_descs; in otx_ep_init_instr_queue()
113 (iq->nb_desc * OTX_EP_IQREQ_LIST_SIZE), in otx_ep_init_instr_queue()
123 iq->nb_desc); in otx_ep_init_instr_queue()
194 for (idx = 0; idx < droq->nb_desc; idx++) { in otx_ep_droq_destroy_ring_buffers()
281 droq->nb_desc = num_descs; in otx_ep_init_droq()
284 droq->nb_desc / 2); in otx_ep_init_droq()
414 new_idx &= (iq->nb_desc - 1); in otx_vf_update_read_index()
820 droq->nb_desc); in otx_ep_droq_refill()
863 droq->nb_desc); in otx_ep_droq_read_packet()
893 droq->nb_desc); in otx_ep_droq_read_packet()
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/dpdk/drivers/dma/ioat/
H A Dioat_dmadev.c48 uint16_t max_desc = qconf->nb_desc; in ioat_vchan_setup()
59 ioat->qcfg.nb_desc = max_desc; in ioat_vchan_setup()
84 for (i = 0; i < ioat->qcfg.nb_desc; i++) { in ioat_vchan_setup()
86 (((i + 1) % ioat->qcfg.nb_desc) * DESC_SZ); in ioat_vchan_setup()
97 uint16_t mask = ioat->qcfg.nb_desc - 1; in __ioat_recover()
138 if (ioat->qcfg.nb_desc == 0 || ioat->desc_ring == NULL) in ioat_dev_start()
251 const unsigned short mask = ioat->qcfg.nb_desc - 1; in __write_desc()
312 uint64_t mask = (ioat->qcfg.nb_desc - 1); in __dev_dump()
524 unsigned short size = ioat->qcfg.nb_desc - 1; in ioat_burst_capacity()
565 const uint16_t mask = ioat->qcfg.nb_desc - 1; in ioat_vchan_status()
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/dpdk/drivers/common/cnxk/
H A Droc_cpt.c19 (PLT_DIV_CEIL(nb_desc, CPT_IQ_NB_DESC_MULTIPLIER) + 1 + 8)
22 (CPT_IQ_NB_DESC_SIZE_DIV40(nb_desc) * CPT_IQ_GRP_LEN)
202 plt_cpt_dbg("NB DESC: %d", lf->nb_desc); in cpt_lf_dump()
430 cpt_lf_iq_mem_calc(uint32_t nb_desc) in cpt_lf_iq_mem_calc() argument
435 len = CPT_IQ_GRP_SIZE(nb_desc); in cpt_lf_iq_mem_calc()
444 len += PLT_ALIGN(CPT_IQ_NB_DESC_SIZE_DIV40(nb_desc) * in cpt_lf_iq_mem_calc()
466 PLT_ALIGN(CPT_IQ_GRP_SIZE(lf->nb_desc), ROC_ALIGN); in cpt_iq_init()
477 lf->fc_hyst_bits = plt_log2_u32(lf->nb_desc) / 2; in cpt_iq_init()
478 lf->fc_thresh = lf->nb_desc - (lf->nb_desc % (1 << lf->fc_hyst_bits)); in cpt_iq_init()
571 if (lf->nb_desc == 0 || lf->nb_desc > CPT_LF_MAX_NB_DESC) in cpt_lf_init()
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/dpdk/drivers/net/nfp/
H A Dnfp_rxtx.c489 uint16_t queue_idx, uint16_t nb_desc, in nfp_net_rx_queue_setup() argument
506 nb_desc > NFP_NET_MAX_RX_DESC || in nfp_net_rx_queue_setup()
507 nb_desc < NFP_NET_MIN_RX_DESC) { in nfp_net_rx_queue_setup()
545 rxq->rx_count = nb_desc; in nfp_net_rx_queue_setup()
573 sizeof(*rxq->rxbufs) * nb_desc, in nfp_net_rx_queue_setup()
680 uint16_t nb_desc, unsigned int socket_id, in nfp_net_tx_queue_setup() argument
696 nb_desc > NFP_NET_MAX_TX_DESC || in nfp_net_tx_queue_setup()
697 nb_desc < NFP_NET_MIN_TX_DESC) { in nfp_net_tx_queue_setup()
706 if (tx_free_thresh > (nb_desc)) { in nfp_net_tx_queue_setup()
752 txq->tx_count = nb_desc; in nfp_net_tx_queue_setup()
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/dpdk/drivers/net/mvneta/
H A Dmvneta_rxtx.c80 uint16_t nb_desc = *num; in mvneta_buffs_refill() local
91 for (i = 0; i < nb_desc; i++) { in mvneta_buffs_refill()
106 for (i = *num; i < nb_desc; i++) in mvneta_buffs_refill()
122 uint16_t nb_desc, nb_desc_burst, sent = 0; in mvneta_buffs_alloc() local
125 nb_desc = *num; in mvneta_buffs_alloc()
129 (nb_desc < MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX) ? in mvneta_buffs_alloc()
130 nb_desc : MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX; in mvneta_buffs_alloc()
137 nb_desc -= nb_desc_burst; in mvneta_buffs_alloc()
139 } while (nb_desc); in mvneta_buffs_alloc()
1004 qinfo->nb_desc = q->size; in mvneta_rxq_info_get()
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/dpdk/drivers/net/liquidio/
H A Dlio_rxtx.c138 (droq->nb_desc * in lio_alloc_info_buffer()
202 droq->nb_desc); in lio_init_droq()
211 (droq->nb_desc * in lio_init_droq()
311 droq->nb_desc); in lio_droq_refill_pullup_descs()
371 droq->nb_desc); in lio_droq_refill()
418 droq->nb_desc); in lio_droq_fast_process_packet()
431 droq->nb_desc); in lio_droq_fast_process_packet()
525 1, droq->nb_desc); in lio_droq_fast_process_packet()
725 iq->nb_desc); in lio_init_instr_queue()
925 iq->nb_desc); in post_command2()
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/dpdk/drivers/dma/skeleton/
H A Dskeleton_dmadev.c163 vchan_setup(struct skeldma_hw *hw, uint16_t nb_desc) in vchan_setup() argument
173 nb_desc * sizeof(struct skeldma_desc), in vchan_setup()
180 empty = rte_ring_create("dma_skeleton_desc_empty", nb_desc, in vchan_setup()
182 pending = rte_ring_create("dma_skeleton_desc_pending", nb_desc, in vchan_setup()
184 running = rte_ring_create("dma_skeleton_desc_running", nb_desc, in vchan_setup()
186 completed = rte_ring_create("dma_skeleton_desc_completed", nb_desc, in vchan_setup()
203 for (i = 0; i < nb_desc - 1; i++) in vchan_setup()
251 if (!rte_is_power_of_2(conf->nb_desc)) { in skeldma_vchan_setup()
257 return vchan_setup(hw, conf->nb_desc); in skeldma_vchan_setup()
/dpdk/drivers/net/e1000/
H A Dem_rxtx.c1135 uint16_t i, nb_desc, prev; in em_reset_tx_queue() local
1140 nb_desc = txq->nb_tx_desc; in em_reset_tx_queue()
1144 prev = (uint16_t) (nb_desc - 1); in em_reset_tx_queue()
1146 for (i = 0; i < nb_desc; i++) { in em_reset_tx_queue()
1200 uint16_t nb_desc, in eth_em_tx_queue_setup() argument
1220 if (nb_desc % EM_TXD_ALIGN != 0 || in eth_em_tx_queue_setup()
1300 txq->nb_tx_desc = nb_desc; in eth_em_tx_queue_setup()
1400 uint16_t nb_desc, in eth_em_rx_queue_setup() argument
1464 rxq->nb_rx_desc = nb_desc; in eth_em_rx_queue_setup()
1986 qinfo->nb_desc = rxq->nb_rx_desc; in em_rxq_info_get()
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/dpdk/drivers/net/ionic/
H A Dionic_rxtx.c63 qinfo->nb_desc = q->num_descs; in ionic_txq_info_get()
162 uint16_t nb_desc, uint32_t socket_id, in ionic_dev_tx_queue_setup() argument
180 socket_id, tx_queue_id, nb_desc, offloads); in ionic_dev_tx_queue_setup()
183 if (!rte_is_power_of_2(nb_desc) || nb_desc < IONIC_MIN_RING_DESC) in ionic_dev_tx_queue_setup()
643 qinfo->nb_desc = q->num_descs; in ionic_rxq_info_get()
690 uint16_t nb_desc, in ionic_dev_rx_queue_setup() argument
710 socket_id, rx_queue_id, nb_desc, offloads); in ionic_dev_rx_queue_setup()
716 if (!rte_is_power_of_2(nb_desc) || in ionic_dev_rx_queue_setup()
717 nb_desc < IONIC_MIN_RING_DESC || in ionic_dev_rx_queue_setup()
718 nb_desc > IONIC_MAX_RING_DESC) { in ionic_dev_rx_queue_setup()
[all …]
H A Dionic_rxtx.h26 uint16_t nb_desc, uint32_t socket_id,
33 uint16_t nb_desc, uint32_t socket_id,
/dpdk/drivers/net/netvsc/
H A Dhn_var.h208 uint16_t nb_desc, unsigned int socket_id,
220 uint16_t queue_idx, uint16_t nb_desc,
264 uint16_t queue_idx, uint16_t nb_desc,
271 uint16_t queue_idx, uint16_t nb_desc,

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