| /dpdk/examples/vhost_crypto/ |
| H A D | main.c | 97 struct lcore_option *lo; in parse_socket_arg() local 117 lo->lcore_id = lcore_id; in parse_socket_arg() 120 lo = &options.los[idx]; in parse_socket_arg() 135 lo->nb_sockets++; in parse_socket_arg() 143 struct lcore_option *lo; in parse_config() local 189 lo = &options.los[i]; in parse_config() 192 lo->cid = flds[FLD_CID]; in parse_config() 503 lo->lcore_id)); in main() 509 info->cid = lo->cid; in main() 510 info->qid = lo->qid; in main() [all …]
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| /dpdk/drivers/net/qede/base/ |
| H A D | ecore_utils.h | 27 (x).lo = DMA_LO_LE((val)) 29 #define HILO_GEN(hi, lo, type) ((((type)(hi)) << 32) + (lo)) argument 30 #define HILO_DMA(hi, lo) HILO_GEN(hi, lo, dma_addr_t) argument 31 #define HILO_64(hi, lo) HILO_GEN(hi, lo, u64) argument 32 #define HILO_DMA_REGPAIR(regpair) (HILO_DMA(regpair.hi, regpair.lo)) 33 #define HILO_64_REGPAIR(regpair) (HILO_64(regpair.hi, regpair.lo))
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| H A D | ecore_init_fw_funcs.c | 1780 SET_FIELD(ram_line.lo, GFT_RAM_LINE_TUNNEL_DST_PORT, 1); in ecore_gft_config() 1781 SET_FIELD(ram_line.lo, GFT_RAM_LINE_TUNNEL_OVER_IP_PROTOCOL, 1); in ecore_gft_config() 1787 SET_FIELD(ram_line.lo, GFT_RAM_LINE_ETHERTYPE, 1); in ecore_gft_config() 1788 SET_FIELD(ram_line.lo, GFT_RAM_LINE_SRC_PORT, 1); in ecore_gft_config() 1789 SET_FIELD(ram_line.lo, GFT_RAM_LINE_DST_PORT, 1); in ecore_gft_config() 1792 SET_FIELD(ram_line.lo, GFT_RAM_LINE_ETHERTYPE, 1); in ecore_gft_config() 1793 SET_FIELD(ram_line.lo, GFT_RAM_LINE_DST_PORT, 1); in ecore_gft_config() 1796 SET_FIELD(ram_line.lo, GFT_RAM_LINE_ETHERTYPE, 1); in ecore_gft_config() 1799 SET_FIELD(ram_line.lo, GFT_RAM_LINE_ETHERTYPE, 1); in ecore_gft_config() 1801 SET_FIELD(ram_line.lo, GFT_RAM_LINE_TUNNEL_ETHERTYPE, 1); in ecore_gft_config() [all …]
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| /dpdk/drivers/net/ice/ |
| H A D | ice_rxtx.h | 331 uint32_t hi, lo, lo2, delta; in ice_tstamp_convert_32b_64b() local 335 lo = ICE_READ_REG(hw, GLTSYN_TIME_L(0)); in ice_tstamp_convert_32b_64b() 342 if (lo > (UINT32_MAX - ICE_TIMESYNC_REG_WRAP_GUARD_BAND)) in ice_tstamp_convert_32b_64b() 345 lo2 = lo; in ice_tstamp_convert_32b_64b() 347 if (lo2 < lo) { in ice_tstamp_convert_32b_64b() 348 lo = ICE_READ_REG(hw, GLTSYN_TIME_L(0)); in ice_tstamp_convert_32b_64b() 352 ad->time_hw = ((uint64_t)hi << 32) | lo; in ice_tstamp_convert_32b_64b()
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| /dpdk/lib/acl/ |
| H A D | acl_vect.h | 21 #define ACL_TR_HILO(P, TC, tr0, tr1, lo, hi) do { \ argument 22 lo = (typeof(lo))_##P##_shuffle_ps((TC)(tr0), (TC)(tr1), 0x88); \
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| H A D | acl_bld.c | 803 acl_add_ptr_range(context, root, node, lo, hi); in acl_gen_range_mdl() 821 acl_add_ptr_range(context, root, node, lo[n], lo[n]); in acl_gen_range_low() 824 acl_gen_range_low(context, node, end, lo, n, level); in acl_gen_range_low() 827 if (n > 1 && lo[n - 1] != UINT8_MAX) in acl_gen_range_low() 865 const uint8_t *lo; in acl_gen_range_trie() local 868 lo = min; in acl_gen_range_trie() 876 for (n = size - 1; n > 0 && lo[n] == hi[n]; n--) { in acl_gen_range_trie() 878 acl_add_ptr_range(context, prev, node, lo[n], hi[n]); in acl_gen_range_trie() 884 acl_add_ptr_range(context, prev, *pend, lo[0], hi[0]); in acl_gen_range_trie() 893 lo_00 |= lo[k]; in acl_gen_range_trie() [all …]
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| H A D | acl_run_avx2.h | 95 ymm_t lo, hi; in acl_process_matches_avx2x8() local 126 ACL_TR_HILO(mm256, __m256, t0, t1, lo, hi); in acl_process_matches_avx2x8() 129 *tr_lo = _mm256_blendv_epi8(*tr_lo, lo, matches); in acl_process_matches_avx2x8()
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| /dpdk/drivers/net/cxgbe/ |
| H A D | clip_tbl.c | 17 u64 lo = ((u64)lip[3]) << 32 | lip[2]; in clip6_get_mbox() local 24 c.ip_lo = lo; in clip6_get_mbox() 36 u64 lo = ((u64)lip[3]) << 32 | lip[2]; in clip6_release_mbox() local 43 c.ip_lo = lo; in clip6_release_mbox()
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| /dpdk/drivers/bus/dpaa/include/ |
| H A D | fsl_bman.h | 49 u32 lo; /* Low 32-bits of 48-bit address */ member 51 u32 lo; 83 __buf931->lo = lower_32_bits(v); \
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| H A D | fsl_qman.h | 503 u32 lo; member 505 u32 lo; 544 (u64)fqd->context_a.lo; in qm_fqd_context_a_get64() 556 fqd->context_a.lo = lower_32_bits(addr); in qm_fqd_context_a_set64()
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| /dpdk/lib/ethdev/ |
| H A D | ethdev_private.c | 76 uint16_t lo, hi, val; in rte_eth_devargs_process_range() local 80 result = sscanf(str, "%hu%n-%hu%n", &lo, &n, &hi, &n); in rte_eth_devargs_process_range() 82 if (rte_eth_devargs_enlist(list, len_list, max_list, lo) != 0) in rte_eth_devargs_process_range() 85 if (lo > hi) in rte_eth_devargs_process_range() 87 for (val = lo; val <= hi; val++) { in rte_eth_devargs_process_range()
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| /dpdk/drivers/net/ngbe/ |
| H A D | ngbe_rxtx.h | 19 } lo; member 34 } lo; member 85 #define NGBE_RXD_STATUS(rxd) ((rxd)->qw1.lo.status)
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| H A D | ngbe_rxtx.c | 1010 status = rxdp->qw1.lo.status; in ngbe_rx_scan_hw_ring() 1023 s[j] = rte_le_to_cpu_32(rxdp[j].qw1.lo.status); in ngbe_rx_scan_hw_ring() 1270 staterr = rxdp->qw1.lo.status; in ngbe_recv_pkts() 1494 staterr = rte_le_to_cpu_32(rxdp->qw1.lo.status); in ngbe_recv_pkts_sc() 2388 (rxdp->qw1.lo.status & in ngbe_dev_rx_queue_count() 2418 status = &rxq->rx_ring[desc].qw1.lo.status; in ngbe_dev_rx_descriptor_status()
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| /dpdk/drivers/net/bnx2x/ |
| H A D | bnx2x_stats.h | 453 diff.lo, new->s##_lo, pstats->mac_stx[0].t##_lo); \ 457 pstats->mac_stx[1].t##_lo, diff.lo); \ 463 diff.lo, new->s##_lo, old->s##_lo); \ 465 estats->t##_lo, diff.lo); \ 527 qstats->t##_lo = qstats_old->t##_lo + le32toh(s.lo); \
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| H A D | bnx2x_stats.c | 539 uint32_t lo; in bnx2x_bmac_stats_update() member 781 uint32_t lo; in bnx2x_hw_stats_update() member 1045 tfunc->rcv_error_bytes.lo); in bnx2x_storm_stats_update() 1050 tfunc->rcv_error_bytes.lo); in bnx2x_storm_stats_update() 1357 stats_hdr->stats_counters_addrs.lo = htole32(U64_LO(cur_data_offset)); in bnx2x_prep_fw_stats_req() 1378 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); in bnx2x_prep_fw_stats_req() 1391 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); in bnx2x_prep_fw_stats_req() 1411 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); in bnx2x_prep_fw_stats_req()
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| /dpdk/drivers/net/txgbe/ |
| H A D | txgbe_rxtx.h | 19 } lo; member 34 } lo; member 89 #define TXGBE_RXD_STATUS(rxd) ((rxd)->qw1.lo.status)
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| /dpdk/drivers/net/ice/base/ |
| H A D | ice_ptp_hw.c | 93 u32 lo, hi; in ice_ptp_read_src_incval() local 98 lo = rd32(hw, GLTSYN_INCVAL_L(tmr_idx)); in ice_ptp_read_src_incval() 101 return ((u64)(hi & INCVAL_HIGH_M) << 32) | lo; in ice_ptp_read_src_incval() 639 u32 lo, hi; in ice_read_phy_tstamp_e822() local 2312 u32 zo, lo; in ice_read_phy_and_phc_time_e822() local 2330 lo = rd32(hw, GLTSYN_SHTIME_L(tmr_idx)); in ice_read_phy_and_phc_time_e822() 2331 *phc_time = (u64)lo << 32 | zo; in ice_read_phy_and_phc_time_e822() 2488 u32 lo, hi, val; in ice_start_phy_timer_e822() local 2508 lo = rd32(hw, GLTSYN_INCVAL_L(tmr_idx)); in ice_start_phy_timer_e822() 2510 incval = (u64)hi << 32 | lo; in ice_start_phy_timer_e822() [all …]
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| /dpdk/app/test/ |
| H A D | test_acl.c | 652 uint32_t hi, lo, mask; in convert_rule_2() local 658 lo = ro->field[RTE_ACL_IPV4VLAN_SRC_FIELD].value.u32 & mask; in convert_rule_2() 659 hi = lo + ~mask; in convert_rule_2() 660 ro->field[RTE_ACL_IPV4VLAN_SRC_FIELD].value.u32 = lo; in convert_rule_2() 665 lo = ro->field[RTE_ACL_IPV4VLAN_DST_FIELD].value.u32 & mask; in convert_rule_2() 666 hi = lo + ~mask; in convert_rule_2() 667 ro->field[RTE_ACL_IPV4VLAN_DST_FIELD].value.u32 = lo; in convert_rule_2()
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| /dpdk/drivers/vdpa/ifc/base/ |
| H A D | ifcvf.c | 188 io_write64_twopart(u64 val, u32 *lo, u32 *hi) in io_write64_twopart() argument 190 IFCVF_WRITE_REG32(val & ((1ULL << 32) - 1), lo); in io_write64_twopart()
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| /dpdk/drivers/net/ark/ |
| H A D | ark_ethdev_rx.c | 21 static void dump_mbuf_data(struct rte_mbuf *mbuf, uint16_t lo, uint16_t hi); 652 dump_mbuf_data(struct rte_mbuf *mbuf, uint16_t lo, uint16_t hi) in dump_mbuf_data() argument 658 for (i = lo; i < hi; i += 16) { in dump_mbuf_data()
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| /dpdk/drivers/crypto/virtio/ |
| H A D | virtio_pci.c | 53 io_write64_twopart(uint64_t val, uint32_t *lo, uint32_t *hi) in io_write64_twopart() argument 55 rte_write32(val & ((1ULL << 32) - 1), lo); in io_write64_twopart()
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| /dpdk/drivers/net/qede/ |
| H A D | qede_rxtx.h | 40 (bd)->addr.lo = rte_cpu_to_le_32(U64_LO(maddr)); \
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| /dpdk/drivers/net/virtio/ |
| H A D | virtio_pci.c | 342 io_write64_twopart(uint64_t val, uint32_t *lo, uint32_t *hi) in io_write64_twopart() argument 344 rte_write32(val & ((1ULL << 32) - 1), lo); in io_write64_twopart()
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| /dpdk/drivers/crypto/caam_jr/ |
| H A D | caam_jr_hw_specific.h | 317 } __rte_packed lo; member
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| /dpdk/lib/mbuf/ |
| H A D | rte_mbuf_core.h | 670 uint32_t lo; member
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