| /dpdk/app/test/ |
| H A D | test_acl.c | 227 layout[RTE_ACL_IPV4VLAN_PROTO]; in acl_ipv4vlan_config()
229 layout[RTE_ACL_IPV4VLAN_VLAN]; in acl_ipv4vlan_config()
231 layout[RTE_ACL_IPV4VLAN_VLAN] + in acl_ipv4vlan_config()
234 layout[RTE_ACL_IPV4VLAN_SRC]; in acl_ipv4vlan_config()
236 layout[RTE_ACL_IPV4VLAN_DST]; in acl_ipv4vlan_config()
238 layout[RTE_ACL_IPV4VLAN_PORTS]; in acl_ipv4vlan_config()
240 layout[RTE_ACL_IPV4VLAN_PORTS] + in acl_ipv4vlan_config()
767 layout[RTE_ACL_IPV4VLAN_PROTO]; in ipv4vlan_config()
769 layout[RTE_ACL_IPV4VLAN_VLAN]; in ipv4vlan_config()
774 layout[RTE_ACL_IPV4VLAN_SRC]; in ipv4vlan_config()
[all …]
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| /dpdk/drivers/net/dpaa2/base/ |
| H A D | dpaa2_hw_dpni.c | 468 struct dpni_buffer_layout layout; in dpaa2_attach_bp_list() local
479 memset(&layout, 0, sizeof(struct dpni_buffer_layout)); in dpaa2_attach_bp_list()
480 layout.options = DPNI_BUF_LAYOUT_OPT_DATA_HEAD_ROOM | in dpaa2_attach_bp_list()
487 layout.pass_timestamp = true; in dpaa2_attach_bp_list()
488 layout.pass_frame_status = 1; in dpaa2_attach_bp_list()
489 layout.private_data_size = DPAA2_FD_PTA_SIZE; in dpaa2_attach_bp_list()
490 layout.pass_parser_result = 1; in dpaa2_attach_bp_list()
491 layout.data_align = DPAA2_PACKET_LAYOUT_ALIGN; in dpaa2_attach_bp_list()
492 layout.data_head_room = tot_size - DPAA2_FD_PTA_SIZE - in dpaa2_attach_bp_list()
495 DPNI_QUEUE_RX, &layout); in dpaa2_attach_bp_list()
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| /dpdk/drivers/net/dpaa2/mc/ |
| H A D | dpni.c | 655 struct dpni_buffer_layout *layout) in dpni_get_buffer_layout() argument
676 layout->pass_timestamp = in dpni_get_buffer_layout()
678 layout->pass_parser_result = in dpni_get_buffer_layout()
680 layout->pass_frame_status = in dpni_get_buffer_layout()
682 layout->pass_sw_opaque = in dpni_get_buffer_layout()
685 layout->data_align = le16_to_cpu(rsp_params->data_align); in dpni_get_buffer_layout()
708 const struct dpni_buffer_layout *layout) in dpni_set_buffer_layout() argument
2914 layout->num_ss = i; in dpni_extract_sw_sequence_layout()
2918 layout->ss[i].ss_offset = ss_offset; in dpni_extract_sw_sequence_layout()
2919 layout->ss[i].ss_size = ss_size; in dpni_extract_sw_sequence_layout()
[all …]
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| H A D | fsl_dpni.h | 556 struct dpni_buffer_layout *layout);
562 const struct dpni_buffer_layout *layout);
1840 void dpni_extract_sw_sequence_layout(struct dpni_sw_sequence_layout *layout,
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| /dpdk/doc/guides/prog_guide/ |
| H A D | trace_lib.rst | 263 trace's binary streams of events without CTF specifying any fixed layout.
264 The only stream layout known in advance is, in fact, the metadata stream's one.
279 Trace memory layout
284 .. table:: Trace memory layout. argument
309 .. table:: Packet header layout.
322 .. table:: Packet context layout.
335 .. table:: Trace header layout.
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| H A D | rawdev.rst | 49 Figure below outlines the layout of the rawdevice library and device vis-a-vis
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| H A D | graph_lib.rst | 318 Graph object memory layout
324 Memory layout
326 Understanding the memory layout helps to debug the graph library and
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| H A D | mempool_lib.rst | 40 The physical layout of the DRAM chips on the DIMM itself does not necessarily relate to the number …
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| /dpdk/drivers/net/bnxt/hcapi/cfa/ |
| H A D | hcapi_cfa_defs.h | 256 struct hcapi_cfa_key_layout *layout; member
332 struct hcapi_cfa_action_layout *layout; member
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| /dpdk/doc/guides/vdpadevs/features/ |
| H A D | sfc.ini | 13 any layout = Y
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| H A D | mlx5.ini | 14 any layout = Y
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| H A D | default.ini | 23 any layout =
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| /dpdk/doc/guides/vdpadevs/ |
| H A D | features_overview.rst | 48 any layout
49 Device can handle any descriptor layout.
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| /dpdk/drivers/net/dpaa2/ |
| H A D | dpaa2_ethdev.c | 2586 struct dpni_buffer_layout layout; in dpaa2_dev_init() local
2728 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS | in dpaa2_dev_init()
2730 layout.pass_timestamp = true; in dpaa2_dev_init()
2732 layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; in dpaa2_dev_init()
2734 layout.pass_frame_status = 1; in dpaa2_dev_init()
2736 DPNI_QUEUE_TX, &layout); in dpaa2_dev_init()
2745 layout.options = DPNI_BUF_LAYOUT_OPT_TIMESTAMP; in dpaa2_dev_init()
2746 layout.pass_timestamp = true; in dpaa2_dev_init()
2748 layout.options |= DPNI_BUF_LAYOUT_OPT_FRAME_STATUS; in dpaa2_dev_init()
2749 layout.pass_frame_status = 1; in dpaa2_dev_init()
[all …]
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| /dpdk/doc/guides/rawdevs/ |
| H A D | ntb.rst | 95 based on ntb ring should avoid remote read. The ring layout for ntb is
136 Based on this ring layout, enqueue reads rx_tail to get how many free
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| /dpdk/examples/ip_pipeline/examples/ |
| H A D | flow_crypto.cli | 14 ; Packet buffer layout:
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| H A D | firewall.cli | 18 ; Packet buffer layout:
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| H A D | flow.cli | 18 ; Packet buffer layout:
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| H A D | route.cli | 18 ; Packet buffer layout:
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| H A D | route_ecmp.cli | 8 ; Packet buffer layout:
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| /dpdk/doc/guides/linux_gsg/ |
| H A D | build_sample_apps.rst | 132 it is recommended that the core layout for each platform be considered when choosing the coremask/c…
141 A more graphical view of the logical core layout
154 …The logical core layout can change between different board layouts and should be checked before se…
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| H A D | nic_perf_intel_platform.rst | 150 2. Check the CPU layout using the DPDK ``cpu_layout`` utility:
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| /dpdk/doc/guides/contributing/ |
| H A D | unit_test.rst | 51 EAL: Static memory layout is selected, amount of reserved memory...
73 EAL: Static memory layout is selected, amount of reserved memory can be...
97 EAL: Static memory layout is selected, amount of reserved memory can be...
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| /dpdk/doc/guides/howto/ |
| H A D | virtio_user_for_container_networking.rst | 47 memory shared? In VM's case, qemu always shares the whole physical layout of VM
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| /dpdk/config/ppc/ |
| H A D | meson.build | 21 # Suppress the gcc warning "note: the layout of aggregates containing
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