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/dpdk/drivers/net/ipn3ke/
H A Dipn3ke_flow.h89 uint32_t high, low; in ipn3ke_swap32() local
92 high = (x >> 16) & 0xffff; in ipn3ke_swap32()
96 low1 = ipn3ke_swap16(high); in ipn3ke_swap32()
/dpdk/lib/eal/common/
H A Drte_random.c37 uint64_t high; in __rte_rand_lcg64() local
44 high = __rte_rand_lcg32(seed); in __rte_rand_lcg64()
46 return low | (high << 32); in __rte_rand_lcg64()
/dpdk/lib/cmdline/
H A Dcmdline_parse_portlist.c24 parse_set_list(cmdline_portlist_t *pl, size_t low, size_t high) in parse_set_list() argument
28 } while (low <= high); in parse_set_list()
/dpdk/lib/eal/windows/
H A Deal_file.c50 LONG high = (LONG)((size_t)size >> 32); in eal_file_truncate() local
58 ret = SetFilePointer(handle, low, &high, FILE_BEGIN); in eal_file_truncate()
/dpdk/drivers/net/nfp/
H A Dnfp_common.h251 uint32_t low, high; in nn_readq() local
253 high = nn_readl((volatile const void *)(p + 1)); in nn_readq()
256 return low + ((uint64_t)high << 32); in nn_readq()
/dpdk/drivers/net/ice/base/
H A Dice_ptp_hw.c306 u32 low, high; in ice_read_40b_phy_reg_e822() local
325 status = ice_read_phy_reg_e822(hw, port, high_addr, &high); in ice_read_40b_phy_reg_e822()
353 u32 low, high; in ice_read_64b_phy_reg_e822() local
372 status = ice_read_phy_reg_e822(hw, port, high_addr, &high); in ice_read_64b_phy_reg_e822()
379 *val = (u64)high << 32 | low; in ice_read_64b_phy_reg_e822()
435 u32 low, high; in ice_write_40b_phy_reg_e822() local
448 high = (u32)(val >> P_REG_40B_HIGH_S); in ice_write_40b_phy_reg_e822()
483 u32 low, high; in ice_write_64b_phy_reg_e822() local
496 high = ICE_HI_DWORD(val); in ice_write_64b_phy_reg_e822()
2958 u32 high, low; in ice_ptp_prep_phy_incval_e810() local
[all …]
/dpdk/examples/ipsec-secgw/
H A Dparser.c108 parse_range(const char *token, uint16_t *low, uint16_t *high) in parse_range() argument
116 if (!low || !high) in parse_range()
142 *high = (uint16_t)range_high; in parse_range()
H A Dsp4.c335 uint16_t low, high; in parse_sp4_tokens() local
344 APP_CHECK(parse_range(tokens[ti], &low, &high) in parse_sp4_tokens()
353 APP_CHECK(high <= 0xff, status, "proto high " in parse_sp4_tokens()
359 rule_ipv4->field[0].mask_range.u8 = (uint8_t)high; in parse_sp4_tokens()
H A Dparser.h68 parse_range(const char *token, uint16_t *low, uint16_t *high);
H A Dsp6.c440 uint16_t low, high; in parse_sp6_tokens() local
449 APP_CHECK(parse_range(tokens[ti], &low, &high) in parse_sp6_tokens()
458 APP_CHECK(high <= 0xff, status, "proto high " in parse_sp6_tokens()
464 rule_ipv6->field[0].mask_range.u8 = (uint8_t)high; in parse_sp6_tokens()
/dpdk/doc/guides/rawdevs/
H A Dcnxk_gpio.rst83 Message is used to set output to low or high. This does not work for GPIOs
88 Payload must be an integer set to 0 (low) or 1 (high).
128 Message is used to read GPIO value. Value can be 0 (low) or 1 (high).
/dpdk/doc/guides/prog_guide/
H A Dprofile_app.rst77 The alternative method to enable ``rte_rdtsc()`` for a high resolution wall
110 The PMU based scheme is useful for high accuracy performance profiling with
H A Dreorder_lib.rst23 number of 350, the sequence window has low and high limits of 350 and 550
31 * early: the sequence number is outside the window and greater than the high
/dpdk/doc/guides/nics/
H A Denetfec.rst32 to achieve both high performance and low power consumption.
34 to provide high performance Ethernet interface.
/dpdk/config/ppc/
H A Dmeson.build111 # Certain POWER9 systems can scale as high as 1536 LCORES, but setting such a
112 # high value can waste memory, cause timeouts in time limited autotests, and is
/dpdk/doc/guides/eventdevs/
H A Ddlb2.rst33 writing high-performance code. This section describes the places where the
161 This can be used if the default allocation is too low or too high for the
176 defined by its low watermark, high watermark, and refill quanta. These three
179 - The load-balanced high watermark is set to the port's enqueue_depth.
180 The directed high watermark is set to the minimum of the enqueue_depth and
182 - The refill quanta is set to half the high watermark.
185 When the eventdev is started, each port is pre-allocated a high watermark's
H A Dopdl.rst9 processing workloads that have high throughput and low latency requirements.\
87 that the implementation can achieve such high throughput and low latency
/dpdk/drivers/raw/ifpga/base/
H A Difpga_fme_error.c250 u64 *val, bool high) in fme_err_get_seu_emr() argument
259 if (high) in fme_err_get_seu_emr()
/dpdk/drivers/net/hns3/
H A Dhns3_cmd.h353 uint16_t high; member
371 uint32_t high; member
376 uint32_t high; member
H A Dhns3_ethdev.c3183 buf_alloc->s_buf.self.high = in hns3_is_rx_buf_ok()
3233 priv->wl.high = 0; in hns3_rx_buf_calc_all()
3279 priv->wl.high = 0; in hns3_drop_nopfc_buf_till_fit()
3316 priv->wl.high = 0; in hns3_drop_pfc_buf_till_fit()
3367 priv->wl.high = 0; in hns3_only_alloc_priv_buff()
3375 priv->wl.high = rx_priv - pf->dv_buf_size; in hns3_only_alloc_priv_buff()
3497 req->tc_wl[j].high = rte_cpu_to_le_16(priv->wl.high >> in hns3_rx_priv_wl_config()
3499 req->tc_wl[j].high |= in hns3_rx_priv_wl_config()
3544 req->com_thrd[j].high = in hns3_common_thrd_config()
3546 req->com_thrd[j].high |= in hns3_common_thrd_config()
[all …]
/dpdk/doc/guides/faq/
H A Dfaq.rst78 …trade-off between throughput and latency. An application can be tuned to achieve a high throughput,
87 This behavior is desirable when tuning for high throughput because the cost of tail pointer updates…
155 Unfortunately, the protection comes with an extremely high performance cost for high speed NICs.
/dpdk/drivers/common/sfc_efx/base/
H A Defx_mac.c671 unsigned int high; in efx_mac_stats_mask_add_range() local
692 high = MIN((unsigned int)rngp->last, el_max); in efx_mac_stats_mask_add_range()
693 width = high - low + 1; in efx_mac_stats_mask_add_range()
/dpdk/doc/guides/linux_gsg/
H A Dsys_reqs.rst16 and high performance of small packets, BIOS setting changes may be needed.
144 and therefore less Translation Lookaside Buffers (TLBs, high speed translation caches),
146 Without hugepages, high TLB miss rates would occur with the standard 4k page size, slowing performa…
H A Dnic_perf_intel_platform.rst7 This document is a step-by-step guide for getting high performance from DPDK applications on Intel …
70 Use a `DPDK supported <https://core.dpdk.org/supported/>`_ high end NIC such as the Intel XL710 40G…
/dpdk/drivers/net/igc/base/
H A Digc_regs.h219 #define IGC_QUEUE_REG(n, low, high) ( \ argument
222 _n < 4 ? ((low) + _n * 0x100) : ((high) + _n * 0x40); \

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