| /dpdk/doc/guides/prog_guide/ |
| H A D | dmadev.rst | 8 of hardware and software DMA poll mode drivers, defining generic API which
16 physical (hardware) and virtual (software) DMA devices, as well as a generic DMA
26 * The DMA controller could have multiple hardware DMA channels (aka. hardware
27 DMA queues), each hardware DMA channel should be represented by a dmadev.
45 ``rte_dma_pmd_allocate`` based on the number of hardware DMA channels.
77 enqueue operations to hardware. If an enqueue is successful, a ``ring_idx`` is
81 The ``rte_dma_submit`` API is used to issue doorbell to hardware.
83 APIs to also issue the doorbell to hardware.
86 device and start the hardware processing of them:
|
| H A D | mbuf_lib.rst | 115 and a flag indicating that the checksum was computed by hardware.
125 processing to the hardware if it supports it. For instance, the
140 This is supported on hardware advertising RTE_ETH_TX_OFFLOAD_IPV4_CKSUM.
150 This is supported on hardware advertising RTE_ETH_TX_OFFLOAD_IPV4_CKSUM
161 on hardware advertising RTE_ETH_TX_OFFLOAD_IPV4_CKSUM.
173 on hardware advertising RTE_ETH_TX_OFFLOAD_IPV4_CKSUM and
188 This is supported on hardware advertising RTE_ETH_TX_OFFLOAD_TCP_TSO.
203 This is supported on hardware advertising RTE_ETH_TX_OFFLOAD_IPV4_CKSUM,
|
| H A D | service_cores.rst | 18 For example, the Eventdev has hardware and software PMDs. Of these the software
19 PMD requires an lcore to perform the scheduling operations, while the hardware
|
| /dpdk/doc/guides/cryptodevs/ |
| H A D | dpaa2_sec.rst | 10 hardware accelerator.
16 acceleration and offloading hardware. It combines functions previously
20 integrity checking, and a hardware random number generator. SEC performs
24 DPAA2_SEC is one of the hardware resource in DPAA2 Architecture. More information
28 portal to access the hardware object - DPSECI. The MC provides access to create,
31 DPAA2_SEC PMD also uses some of the other hardware resources like buffer pools,
32 queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
|
| H A D | dpaa_sec.rst | 10 hardware accelerator.
16 acceleration and offloading hardware. It combines functions previously
20 integrity checking, and a hardware random number generator. SEC performs
24 DPAA_SEC is one of the hardware resource in DPAA Architecture. More information
30 DPAA_SEC PMD also uses some of the other hardware resources like buffer pools,
31 queues, queue portals to store and to enqueue/dequeue data to the hardware SEC.
|
| H A D | caam_jr.rst | 9 hardware accelerator. More information is available at:
17 acceleration and offloading hardware. It combines functions previously
21 integrity checking, and a hardware random number generator. SEC performs
|
| H A D | mlx5.rst | 23 MKEY is a memory region object in the hardware,
25 Its ID must be tied to addresses provided to the hardware.
43 The credential and the AES-XTS keys should be provided to the hardware, as ciphertext
47 and will be validated when the hardware attempts to access it.
|
| /dpdk/doc/guides/nics/ |
| H A D | dpaa2.rst | 33 DPAA2 is a hardware architecture designed for high-speed network
41 software drivers to use the DPAA2 hardware.
43 The MC uses DPAA2 hardware resources such as queues, buffer pools, and
164 efficient use of finite hardware resources, flexibility, and
199 hardware device that connects to an Ethernet PHY and allows
229 DPBP (Datapath Buffer Pool): represents a hardware buffer
277 interrupts. At the hardware level message interrupts
279 1) a non-spoofable 'device-id' expressed on the hardware
383 create a hardware offloaded packet buffer mempool.
405 - Port hardware statistics
[all …]
|
| H A D | ark.rst | 25 the GPP host software *dictate*, while the FPGA hardware *copes*,
29 understand what the FPGA hardware is and is not. The Arkville RTL
36 One popular way to imagine Arkville's FPGA hardware aspect is as the
52 hardware queue-pairs are negotiated; the driver is designed to
88 hardware components. The features of the Pkt_dir are only used for
100 packet generator is an internal Arkville hardware component.
110 packet checker is an internal Arkville hardware component.
156 during RX from user meta data coming from FPGA hardware.
170 /* RX tuser field based on user's hardware */
|
| H A D | pfe.rst | 31 PFE is a hardware programmable packet forwarding engine to provide
75 The HIF, PFE, MAC and PHY are the hardware blocks, the pfe.ko is a kernel
79 The PFE hardware supports one HIF (host interface) RX ring and one TX ring
86 hardware independent and register with the HIF client driver to transmit and
|
| H A D | bnxt.rst | 212 The BNXT PMD supports hardware-based packet filtering:
335 The BNXT PMD supports hardware-based CRC offload:
368 TSS distributes network transmit processing across several hardware-based
418 The BNXT PMD supports hardware-based TSO.
431 The BNXT PMD also supports hardware-based tunneled TSO.
453 The BNXT PMD supports hardware-based LRO.
507 inserts the VLAN tag (via hardware) using the provided TCI along with the
637 hardware. For example, applications can offload packet classification only
640 DPDK offers the Generic Flow API (rte_flow API) to configure hardware to
667 application will be flushed from the hardware and any tables maintained
[all …]
|
| H A D | nfb.rst | 42 Kernel modules manage initialization of hardware, allocation and
60 The PMD supports hardware timestamps of frame receipt on physical network interface. In order to use
61 the timestamps, the hardware timestamping unit must be enabled (follow the documentation of the NFB
|
| H A D | dpaa.rst | 33 The QorIQ Data Path Acceleration Architecture (DPAA) is a set of hardware
48 - The Queue Manager (QMan) is a hardware accelerator that manages frame queues.
52 - The Buffer Manager (BMan) is a hardware buffer pool management block that
155 DPAA has a hardware offloaded buffer pool manager, called BMan, or Buffer
162 Each Tx frame can be automatically released by hardware, if allocated from
|
| /dpdk/doc/guides/howto/ |
| H A D | flow_bifurcation.rst | 7 Flow Bifurcation is a mechanism which uses hardware capable Ethernet devices
9 hardware assisted feature this approach can provide line rate processing
30 Packet classification filtering is a hardware capability available on most
32 given receive queue by hardware. Different NICs may have different filter
|
| /dpdk/doc/guides/eventdevs/ |
| H A D | dlb2.rst | 8 hardware versions 2.0 and 2.5.
28 However, the DLB hardware is not a perfect match to the eventdev API. Some DLB
32 detailed understanding of the hardware, but these details are important when
41 directed queues, ports, credits, and other hardware resources. Some
140 DLB uses a hardware credit scheme to prevent software from overflowing hardware
196 replenished asynchronously by the DLB hardware.
228 - -ENOSPC: Credit exhaustion (either hardware or software)
347 - Class 4 corresponds to 40% of the DLB hardware bandwidth
348 - Class 3 corresponds to 30% of the DLB hardware bandwidth
349 - Class 2 corresponds to 20% of the DLB hardware bandwidth
[all …]
|
| /dpdk/doc/guides/dmadevs/ |
| H A D | ioat.rst | 13 This PMD, when used on supported hardware, allows data copies, for example,
14 cloning packet data, to be accelerated by IOAT hardware rather than having to
21 presence of supported hardware. Running ``dpdk-devbind.py --status-dev dma``
23 list. For Intel\ |reg| IOAT devices, the hardware will often be listed as
28 Error handling is not supported by this driver on hardware prior to
|
| /dpdk/doc/guides/sample_app_ug/ |
| H A D | dma.rst | 38 In order to run the hardware copy application, the copying device
58 * c CT: Performed packet copy type: software (sw) or hardware using
61 * s RS: Size of dmadev descriptor ring for hardware copy mode or rte_ring for
93 plus one forwarding core), 2 ports (ports 0 and 1), hardware copying and no MAC
202 When using hardware copy each Rx queue of the port is assigned a DMA device
212 The initialization of hardware device is done by ``rte_dma_configure()`` and
224 If initialization is successful, memory for hardware device
266 then invoke copy process (hardware copy), or perform software copy of each
276 function. When using hardware copy mode the packets are enqueued in
|
| H A D | rxtx_callbacks.rst | 16 If hardware timestamping is supported by the NIC, the sample application will
17 also display the average latency since the packet was timestamped in hardware,
38 Use -t to enable hardware timestamping. If not supported by the NIC, an error
|
| H A D | vhost.rst | 12 traffic from an external switch is performed in hardware by the Virtual
121 - 2 means hardware mode packet forwarding between guests, it allows packets
122 go to the NIC port, hardware L2 switch will determine which guest the
157 when disabling VLAN strip. Such feature, which heavily depends on hardware,
|
| H A D | vmdq_forwarding.rst | 9 The traffic splitting is performed in hardware by the VMDq feature of the Intel® 82599 and X710/XL7…
77 The VMDq hardware feature is configured at port initialization time by setting the appropriate valu…
110 the initialization of the port's RX and TX hardware rings is performed similarly to that
|
| /dpdk/doc/guides/rel_notes/ |
| H A D | release_2_0.rst | 30 .. note:: The software is intended to run on pre-release hardware and may contain unknown or unreso…
32 …iver is also pre-release and will be updated to a released version post hardware and base driver r…
33 …Should the official hardware release be made between DPDK releases an updated poll-mode driver wil…
|
| /dpdk/doc/guides/windows_gsg/ |
| H A D | run_apps.rst | 50 by hardware PMDs.
67 NetUIO kernel-mode driver provides access to the device hardware resources.
68 It is mandatory for all hardware PMDs, except for mlx5 PMD.
|
| /dpdk/lib/pcapng/ |
| H A D | rte_pcapng.h | 60 const char *osname, const char *hardware,
|
| /dpdk/doc/guides/testpmd_app_ug/ |
| H A D | intro.rst | 10 and also to access NIC hardware features such as Flow Director.
|
| /dpdk/doc/guides/rawdevs/ |
| H A D | ioat.rst | 19 This PMD, when used on supported hardware, allows data copies, for example,
20 cloning packet data, to be accelerated by that hardware rather than having to
27 can be used to show the presence of supported hardware.
30 For Intel\ |reg| QuickData Technology devices, the hardware will be often listed as "Crystal Beach …
232 informs the device hardware of the elements enqueued on the ring, and the
238 a burst of copies to the device and start the hardware processing of them:
|