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Searched refs:dev_debug (Results 1 – 18 of 18) sorted by relevance

/dpdk/drivers/raw/ifpga/base/
H A Dopae_intel_max10.c14 dev_debug(dev, "%s: bus:0x%x, reg:0x%x\n", __func__, dev->bus, reg); in max10_reg_read()
28 dev_debug(dev, "%s: bus:0x%x, reg:0x%x, val:0x%x\n", __func__, in max10_reg_write()
393 dev_debug(dev, "%s: sensor:%s invalid 0x%x at:%d\n", in max10_add_sensor()
443 dev_debug(dev, "skip sensor init as not find Device Tree\n"); in max10_sensor_init()
455 dev_debug(dev, "%s is not a sensor node\n", ptr); in max10_sensor_init()
459 dev_debug(dev, "found sensor node %s\n", ptr); in max10_sensor_init()
484 dev_debug(dev, "no found %d: sensor node %s, %s\n", in max10_sensor_init()
517 dev_debug(dev, "found sensor from DTB: %s: %s: %u: %u\n", in max10_sensor_init()
522 dev_debug(dev, "sensor reg[%d]: %x: %zu\n", in max10_sensor_init()
583 dev_debug(dev, in max10_staging_area_init()
[all …]
H A Dopae_eth_group.c56 dev_debug(dev, "%s type %s index %u addr 0x%x\n", in eth_group_write_reg()
85 dev_debug(dev, "%s type %s index %u addr 0x%x\n", in eth_group_read_reg()
111 dev_debug(dev, "%s data 0x%x\n", __func__, *data); in eth_group_read_reg()
H A Difpga_fme.c974 dev_debug(fme, "FME SPI base addr %p.\n", in fme_spi_init()
976 dev_debug(fme, "spi param=0x%llx\n", in fme_spi_init()
1044 dev_debug(dev, "read NIOS_INIT: 0x%x\n", val); in nios_spi_wait_init_done()
1073 dev_debug(dev, "read NIOS_INIT: 0x%x\n", val); in nios_spi_wait_init_done()
1089 dev_debug(dev, "PKVL A Mode Status 0x%x\n", value); in nios_spi_check_error()
1097 dev_debug(dev, "PKVL B Mode Status 0x%x\n", value); in nios_spi_check_error()
1123 dev_debug(fme, "FME SPI base addr %p.\n", in fme_nios_spi_init()
1125 dev_debug(fme, "spi param=0x%llx\n", in fme_nios_spi_init()
1475 dev_debug(dev, "get retimer status: speed:%d. line_link_bitmap:0x%x\n", in fme_mgr_get_retimer_status()
H A Difpga_enumerate.c98 dev_debug(binfo, "%s: id=0x%llx, phys_addr=0x%llx, size=%u\n", in build_info_add_sub_feature()
438 dev_debug(binfo, "UAFU doesn't support interrupt\n"); in parse_feature_irqs()
449 dev_debug(&binfo, "Port error doesn't support interrupt\n"); in parse_feature_irqs()
461 dev_debug(&binfo, "FME error doesn't support interrupt\n"); in parse_feature_irqs()
550 …dev_debug(binfo, "%s: address=0x%p, val=0x%llx, header.id=0x%x, header.next_offset=0x%x, header.eo… in parse_feature_list()
H A Difpga_sec_mgr.c72 dev_debug(dev, in poll_timeout()
83 dev_debug(dev, in poll_timeout()
112 dev_debug(dev, "Current RSU progress is %s\n", in n3000_secure_update_start()
562 dev_debug(dev, "Current RSU status is %s, progress is %s\n", in n3000_get_hw_errinfo()
H A Dopae_osdep.h59 #define dev_debug(x, args...) dev_printf(DEBUG, args) macro
H A Dopae_i2c.c302 dev_debug(dev, "could not get ACK\n"); in altera_handle_i2c_status()
337 dev_debug(dev, "message done\n"); in altera_handle_i2c_status()
/dpdk/drivers/net/enic/
H A Denic_res.c121 dev_debug(NULL, "Max supported VIC descriptors: WQ:%u, RQ:%u\n", in enic_get_vnic_config()
200 dev_debug(NULL, "Supported CQ entry sizes:%s%s%s\n", in enic_get_vnic_config()
207 dev_debug(NULL, "Using %sB CQ entry size\n", enic->cq64 ? "64" : "16"); in enic_get_vnic_config()
H A Denic_compat.h37 #define dev_debug(x, args...) dev_printk(DEBUG, args) macro
H A Denic_main.c60 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL"); in enic_rxmbuf_queue_release()
291 dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index, in enic_alloc_rx_queue_mbufs()
352 dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n", in enic_initial_post_rx()
852 dev_debug(enic, "Set queue_id:%u free thresh:%u\n", queue_idx, in enic_alloc_rq()
1911 dev_debug(enic, "Initializing ENIC PMD\n"); in enic_probe()
1951 dev_debug(enic, "Set ig_vlan_rewrite_mode=%u\n", in enic_probe()
/dpdk/drivers/net/cxgbe/
H A Dclip_tbl.c61 dev_debug(adap, "CLIP FW DEL CMD failed: %d", ret); in cxgbe_clip_release()
125 dev_debug(adap, in t4_clip_alloc()
H A Dcxgbe_ethdev.c472 dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id); in cxgbe_dev_tx_queue_start()
487 dev_debug(NULL, "%s: tx_queue_id = %d\n", __func__, tx_queue_id); in cxgbe_dev_tx_queue_stop()
509 …dev_debug(adapter, "%s: eth_dev->data->nb_tx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id … in cxgbe_dev_tx_queue_setup()
543 dev_debug(adapter, "%s: txq->q.cntxt_id= %u txq->q.abs_id= %u err = %d\n", in cxgbe_dev_tx_queue_setup()
557 dev_debug(adapter, "%s: pi->port_id = %d; tx_queue_id = %d\n", in cxgbe_dev_tx_queue_release()
571 dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n", in cxgbe_dev_rx_queue_start()
589 dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n", in cxgbe_dev_rx_queue_stop()
617 …dev_debug(adapter, "%s: eth_dev->data->nb_rx_queues = %d; queue_idx = %d; nb_desc = %d; socket_id … in cxgbe_dev_rx_queue_setup()
671 dev_debug(adapter, "%s: err = %d; port_id = %d; cntxt_id = %u; abs_id = %u\n", in cxgbe_dev_rx_queue_setup()
686 dev_debug(adapter, "%s: pi->port_id = %d; rx_queue_id = %d\n", in cxgbe_dev_rx_queue_release()
H A Dcxgbe_compat.h37 #define dev_debug(x, fmt, ...) \ macro
H A Dl2t.c162 dev_debug(adap, "Failed to write L2T entry: %d", in t4_l2t_alloc_switching()
H A Dcxgbe_main.c1275 dev_debug(adapter, "%s: returning ret = %d ..\n", __func__, ret); in adap_init0_config()
1381 dev_debug(adap, "%s: adap->params.nports = %u\n", __func__, in adap_init0()
1564 dev_debug(adap, "%s: returning zero..\n", __func__); in adap_init0()
1807 dev_debug(adapter, "%s: pi->rss_size = %u; pi->n_rx_qsets = %u\n", in cxgbe_setup_rss()
H A Dsge.c318 dev_debug(adap, "%s: failed to allocated fl entries in bulk ..\n", in refill_fl_usembufs()
330 dev_debug(adap, "%s: mbuf alloc failed\n", __func__); in refill_fl_usembufs()
1109 dev_debug(adap, "%s: Tx ring %u full; credits = %d\n", in t4_eth_xmit()
1398 dev_debug(adapter, "%s: nelem = %zu; elem_size = %zu; sw_size = %zu; " in alloc_ring()
/dpdk/drivers/net/cxgbe/base/
H A Dt4vf_hw.c396 dev_debug(adapter, "%s: vpd_params->cclk = %u\n", in t4vf_get_vpd_params()
H A Dt4_hw.c2457 dev_debug(adapter, "%s: p->cclk = %u\n", __func__, p->cclk); in t4_get_core_clock()