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Searched refs:delay (Results 1 – 25 of 29) sorted by relevance

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/dpdk/app/test/
H A Dtest_link_bonding_mode4.c617 rte_delay_ms(delay); in bond_handshake()
814 unsigned delay; in test_mode4_rx() local
932 delay = bond_get_update_timeout_ms(); in test_mode4_rx()
947 rte_delay_ms(delay); in test_mode4_rx()
1006 unsigned delay; in test_mode4_tx_burst() local
1074 delay = bond_get_update_timeout_ms(); in test_mode4_tx_burst()
1089 rte_delay_ms(delay); in test_mode4_tx_burst()
1194 unsigned delay; in test_mode4_marker() local
1222 rte_delay_ms(delay); in test_mode4_marker()
1468 rte_delay_ms(delay); in test_mode4_ext_lacp()
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H A Dtest_timer.c276 uint64_t delay = rte_get_timer_hz() / 20; in timer_stress2_main_loop() local
305 ret = rte_timer_reset(&timers[i], delay, SINGLE, main_lcore, in timer_stress2_main_loop()
353 rte_timer_reset(&timers[i], delay, SINGLE, main_lcore, in timer_stress2_main_loop()
361 rte_timer_reset(&timers[r], delay, SINGLE, main_lcore, in timer_stress2_main_loop()
/dpdk/drivers/net/cxgbe/base/
H A Dt4vf_hw.c79 static const int delay[] = { in t4vf_wr_mbox_core() local
122 ms = delay[0]; in t4vf_wr_mbox_core()
149 ms = delay[delay_idx]; /* last element may repeat */ in t4vf_wr_mbox_core()
150 if (delay_idx < ARRAY_SIZE(delay) - 1) in t4vf_wr_mbox_core()
185 ms = delay[0]; in t4vf_wr_mbox_core()
192 ms = delay[delay_idx]; /* last element may repeat */ in t4vf_wr_mbox_core()
193 if (delay_idx < ARRAY_SIZE(delay) - 1) in t4vf_wr_mbox_core()
H A Dcommon.h293 int attempts, int delay, u32 *valp);
296 int polarity, int attempts, int delay) in t4_wait_op_done() argument
299 delay, NULL); in t4_wait_op_done()
H A Dt4_hw.c132 int polarity, int attempts, int delay, u32 *valp) in t4_wait_op_done_val() argument
144 if (delay) in t4_wait_op_done_val()
145 udelay(delay); in t4_wait_op_done_val()
302 static const int delay[] = { in t4_wr_mbox_meat_timeout() local
339 ms = delay[0]; in t4_wr_mbox_meat_timeout()
369 ms = delay[delay_idx]; /* last element may repeat */ in t4_wr_mbox_meat_timeout()
370 if (delay_idx < ARRAY_SIZE(delay) - 1) in t4_wr_mbox_meat_timeout()
441 ms = delay[0]; in t4_wr_mbox_meat_timeout()
450 ms = delay[delay_idx]; /* last element may repeat */ in t4_wr_mbox_meat_timeout()
451 if (delay_idx < ARRAY_SIZE(delay) - 1) in t4_wr_mbox_meat_timeout()
/dpdk/app/test-crypto-perf/
H A Dcperf_test_pmd_cyclecount.c45 uint64_t delay; member
360 if (state->delay) in pmd_cyclecount_bench_burst_sz()
361 rte_delay_us_block(state->delay); in pmd_cyclecount_bench_burst_sz()
412 state.delay = 1000 * opts->pmdcc_delay; in cperf_pmd_cyclecount_test_runner()
/dpdk/doc/guides/vdpadevs/
H A Dmlx5.rst53 delay time.
65 dynamic delay change steps according to this value. Default value is 1us.
67 - 1, A value to set fixed timer delay in micro-seconds. Default value is 0us.
/dpdk/drivers/net/qede/base/
H A Decore_init_ops.c351 u32 delay = ECORE_INIT_POLL_PERIOD_US, val; local
361 delay *= 100;
388 OSAL_UDELAY(delay);
518 OSAL_UDELAY(cmd->delay.delay);
H A Decore_hsi_init_tool.h237 __le32 delay /* delay in us */; member
383 struct init_delay_op delay /* delay init operation */; member
H A Decore_mcp.c354 delay = ECORE_EMUL_MCP_RESP_ITER_US; in ecore_mcp_reset()
376 OSAL_UDELAY(delay); in ecore_mcp_reset()
386 "MCP was reset after %d usec\n", cnt * delay); in ecore_mcp_reset()
570 u32 delay = ECORE_MCP_RESP_ITER_US; in ecore_mcp_print_cpu_info() local
574 delay = ECORE_EMUL_MCP_RESP_ITER_US; in ecore_mcp_print_cpu_info()
579 OSAL_UDELAY(delay); in ecore_mcp_print_cpu_info()
581 OSAL_UDELAY(delay); in ecore_mcp_print_cpu_info()
592 u32 max_retries, u32 delay) in _ecore_mcp_cmd_and_union() argument
618 OSAL_UDELAY(delay); in _ecore_mcp_cmd_and_union()
648 OSAL_UDELAY(delay); in _ecore_mcp_cmd_and_union()
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/dpdk/drivers/raw/ifpga/base/
H A Difpga_fme_pr.c89 int delay, pr_credit; in fme_pr_write() local
110 delay = 0; in fme_pr_write()
112 if (delay++ > PR_WAIT_TIMEOUT) { in fme_pr_write()
/dpdk/doc/guides/tools/
H A Dcomp_perf.rst21 dequeue_burst, for both compression and decompression. An optional delay can be
95 …``--cc-delay-us N``: delay between enqueue and dequeue operations in microseconds, valid only for …
H A Dcryptoperf.rst308 * ``--pmd-cyclecount-delay-ms <n>``
310 Add a delay (in milliseconds) between enqueue and dequeue in
/dpdk/doc/guides/sample_app_ug/
H A Dvhost.rst137 rates, by allowing it to delay and retry in the receive path. This option is
144 **--rx-retry-delay msec**
145 The rx-retry-delay option specifies the timeout (in micro seconds) between
H A Dqos_scheduler.rst209 delay and jitter requirements; such as data voice, video or data transfers.
/dpdk/drivers/net/enic/base/
H A Dvnic_dev.c311 int delay; in _vnic_dev_cmd() local
337 for (delay = 0; delay < wait; delay++) { in _vnic_dev_cmd()
/dpdk/doc/guides/nics/
H A Dnfp.rst72 The PMD PF has extra work to do which will delay the DPDK app initialization
H A Dmlx5.rst40 - Rx queue delay drop.
600 Bitmask value for the Rx queue delay drop attribute. Bit 0 is used for the
602 delay drop is disabled for all Rx queues. It will be ignored if the port does
606 exhausted in a Rx queue with delay drop enabled.
609 dropping a packet. Once the timer is expired, the delay drop will be
614 To enable / disable the delay drop rearming, the private flag ``dropless_rq``
872 the average delay between beginning of the transmitting descriptor processing
H A Dfeatures.rst499 improves signal quality but also brings a delay to signals. This function can be enabled or disable…
/dpdk/doc/guides/prog_guide/
H A Dmetrics_lib.rst242 the jitter in processing delay. These statistics are then reported
H A Dlink_bonding_poll_mode_drv_lib.rst458 * up_delay: Optional parameter which adds a delay in milli-seconds to the
466 * down_delay: Optional parameter which adds a delay in milli-seconds to the
H A Dqos_framework.rst135 delay and jitter requirements, such as voice, video or data transfers.
516 The scheduler round trip delay (SRTD) is the time (number of CPU cycles) between two consecutive ex…
1281 | Queue delay reference | 1 | uint16 | 15 |
/dpdk/doc/guides/contributing/
H A Dvulnerability.rst235 with only a few days delay between the pre-release and the public disclosure.
/dpdk/drivers/net/ice/base/
H A Dice_common.c2021 u32 delay = ICE_RES_POLLING_DELAY_MS; in ice_acquire_res() local
2043 ice_msec_delay(delay, true); in ice_acquire_res()
2044 timeout = (timeout > delay) ? timeout - delay : 0; in ice_acquire_res()
/dpdk/drivers/net/bnxt/
H A Dbnxt_ethdev.c4155 uint32_t delay = info->delay_after_reset[index]; in bnxt_write_fw_reset_reg() local
4182 if (delay) in bnxt_write_fw_reset_reg()
4183 rte_delay_ms(delay); in bnxt_write_fw_reset_reg()

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