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Searched refs:cycle (Results 1 – 24 of 24) sorted by relevance

/dpdk/app/test/
H A Dtest_member_perf.c62 unsigned int cycle; member
105 hashtest_key_lens[params->cycle]); in shuffle_input_keys()
107 hashtest_key_lens[params->cycle]); in shuffle_input_keys()
140 params->key_size = hashtest_key_lens[cycle]; in setup_keys_and_data()
141 params->cycle = cycle; in setup_keys_and_data()
251 false_data[type][params->cycle] = 0; in timed_lookups()
270 false_data[type][params->cycle]++; in timed_lookups()
290 false_data_bulk[type][params->cycle] = 0; in timed_lookups_bulk()
335 false_data_multi[type][params->cycle] = 0; in timed_lookups_multimatch()
456 false_hit[type][params->cycle] = 0; in timed_miss_lookup()
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H A Dtest_efd_perf.c67 unsigned int cycle; member
104 memcpy(temp_key, keys[i], hashtest_key_lens[params->cycle]); in shuffle_input_keys()
107 memcpy(keys[i], keys[swap_idx], hashtest_key_lens[params->cycle]); in shuffle_input_keys()
110 memcpy(keys[swap_idx], temp_key, hashtest_key_lens[params->cycle]); in shuffle_input_keys()
133 params->key_size = hashtest_key_lens[cycle]; in setup_keys_and_data()
134 params->cycle = cycle; in setup_keys_and_data()
201 cycles[params->cycle][ADD] = time_taken / KEYS_TO_ADD; in timed_adds()
234 cycles[params->cycle][LOOKUP] = time_taken / NUM_LOOKUPS; in timed_lookups()
278 cycles[params->cycle][LOOKUP_MULTI] = time_taken / NUM_LOOKUPS; in timed_lookups_multi()
307 cycles[params->cycle][DELETE] = time_taken / KEYS_TO_ADD; in timed_deletes()
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/dpdk/doc/guides/prog_guide/
H A Dprofile_app.rst74 High-resolution cycle counter
78 clock counter is through the ARMv8 PMU subsystem. The PMU cycle counter runs
79 at CPU frequency. However, access to the PMU cycle counter from user space is
81 cycle counter for user space access by configuring the PMU from the privileged
87 The example below shows the steps to configure the PMU based cycle counter on
H A Dservice_cores.rst53 cycle count collection is dynamically configurable, allowing any application to
H A Drawdev.rst39 has different semantics than a start-stop-start cycle.
H A Dtrace_lib.rst38 Typical trace overhead is ~20 cycles and instrumentation overhead is 1 cycle.
/dpdk/doc/guides/sample_app_ug/
H A Drxtx_callbacks.rst107 The DPDK function ``rte_rdtsc()`` is used to add a cycle count timestamp to
125 transmitted the average cycle count per packet is printed out and the counters
/dpdk/doc/guides/tools/
H A Dtestbbdev.rst111 (a) *SW Enq Offload Cost*: Software only enqueue offload cost, the cycle
114 (b) *Acc Enq Offload Cost*: The cycle count and time (us) from the
117 (c) *SW Deq Offload Cost*: Software dequeue cost, the cycle counts and
119 (d) *Empty Queue Enq Offload Cost*: The cycle count and time (us)
H A Dcryptoperf.rst19 On hardware devices the cycle-count doesn't always represent the actual offload
20 cost. The cycle-count only represents the offload cost when the hardware
22 offload are still consumed by the test tool and included in the cycle-count.
25 in a larger cycle-count measurement and should not be interpreted as an offload
H A Dcomp_perf.rst26 the trade-off between throughput and cycle-count.
/dpdk/doc/guides/contributing/
H A Dstable.rst41 The duration of a stable is one complete release cycle (4 months). It can be
44 for one release cycle.
H A Dabi_policy.rst295 is then dropped for the duration of this release cycle.
297 and some amended rules apply during this cycle:
H A Dpatches.rst619 patch accepted. The general cycle for patch review and acceptance is:
674 concrete definitions and expectations for a typical release cycle.
675 An average cycle lasts 3 months and have 4 release candidates in the last month.
H A Dabi_versioning.rst123 at the start of each release cycle, and are managed at the project level.
H A Ddocumentation.rst77 Issues that are introduced and then fixed within a release cycle do not have to be included here.
/dpdk/doc/guides/vdpadevs/
H A Dmlx5.rst71 A nonzero value defines the traffic off time, in polling cycle time units,
/dpdk/doc/guides/rel_notes/
H A Drelease_18_08.rst40 * Add low cycle count Tx handler for no-offload Tx.
41 * Add low cycle count Rx handler for non-scattered Rx.
H A Drelease_20_02.rst197 * **Added cycle-count mode to the compression performance tool.**
199 Enhanced the compression performance tool by adding a cycle-count mode
H A Drelease_20_05.rst18 instrumentation overhead is 1 cycle. Added tracepoints in ``EAL``,
H A Drelease_16_04.rst270 * Added CPU utilization measurement and idle cycle rate computation.
H A Dknown_issues.rst101 but specific to an lcore and is a cycle reference, not a time reference.
H A Drelease_2_1.rst521 * **eal/ppc: Fix cpu cycle count for little endian.**
/dpdk/doc/guides/nics/
H A Ddpaa2.rst478 of the packet pull command which is issued in the previous cycle.
/dpdk/doc/guides/testpmd_app_ug/
H A Dtestpmd_funcs.rst1305 Set the cycle to flush the GROed packets from reassembly tables::