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Searched refs:ctrl (Results 1 – 25 of 125) sorted by relevance

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/dpdk/drivers/net/enic/base/
H A Dvnic_cq.c14 cq->ctrl = NULL; in vnic_cq_free()
28 cq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index); in vnic_cq_alloc()
29 if (!cq->ctrl) { in vnic_cq_alloc()
52 writeq(paddr, &cq->ctrl->ring_base); in vnic_cq_init()
55 iowrite32(color_enable, &cq->ctrl->color_enable); in vnic_cq_init()
56 iowrite32(cq_head, &cq->ctrl->cq_head); in vnic_cq_init()
57 iowrite32(cq_tail, &cq->ctrl->cq_tail); in vnic_cq_init()
58 iowrite32(cq_tail_color, &cq->ctrl->cq_tail_color); in vnic_cq_init()
73 iowrite32(0, &cq->ctrl->cq_head); in vnic_cq_clean()
74 iowrite32(0, &cq->ctrl->cq_tail); in vnic_cq_clean()
[all …]
H A Dvnic_rq.c18 rq->ctrl = NULL; in vnic_rq_free()
32 if (!rq->ctrl) { in vnic_rq_alloc()
54 writeq(paddr, &rq->ctrl->ring_base); in vnic_rq_init_start()
55 iowrite32(count, &rq->ctrl->ring_size); in vnic_rq_init_start()
56 iowrite32(cq_index, &rq->ctrl->cq_index); in vnic_rq_init_start()
59 iowrite32(0, &rq->ctrl->error_status); in vnic_rq_init_start()
64 &rq->ctrl->data_ring); in vnic_rq_init_start()
66 iowrite32(0, &rq->ctrl->data_ring); in vnic_rq_init_start()
100 iowrite32(1, &rq->ctrl->enable); in vnic_rq_enable()
107 iowrite32(0, &rq->ctrl->enable); in vnic_rq_disable()
[all …]
H A Dvnic_wq.c14 if (!wq->ctrl) in vnic_wq_get_ctrl()
54 wq->ctrl = NULL; in vnic_wq_free()
96 writeq(paddr, &wq->ctrl->ring_base); in vnic_wq_init_start()
97 iowrite32(count, &wq->ctrl->ring_size); in vnic_wq_init_start()
103 iowrite32(0, &wq->ctrl->error_status); in vnic_wq_init_start()
127 iowrite32(1, &wq->ctrl->enable); in vnic_wq_enable()
134 iowrite32(0, &wq->ctrl->enable); in vnic_wq_disable()
138 if (!(ioread32(&wq->ctrl->running))) in vnic_wq_disable()
170 iowrite32(0, &wq->ctrl->fetch_index); in vnic_wq_clean()
171 iowrite32(0, &wq->ctrl->posted_index); in vnic_wq_clean()
[all …]
H A Dvnic_intr.c11 intr->ctrl = NULL; in vnic_intr_free()
20 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index); in vnic_intr_alloc()
21 if (!intr->ctrl) { in vnic_intr_alloc()
33 iowrite32(coalescing_type, &intr->ctrl->coalescing_type); in vnic_intr_init()
34 iowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion); in vnic_intr_init()
35 iowrite32(0, &intr->ctrl->int_credits); in vnic_intr_init()
42 coalescing_timer), &intr->ctrl->coalescing_timer); in vnic_intr_coalescing_timer_set()
47 iowrite32(0, &intr->ctrl->int_credits); in vnic_intr_clean()
H A Dvnic_intr.h36 struct vnic_intr_ctrl __iomem *ctrl; /* memory-mapped */ member
41 iowrite32(0, &intr->ctrl->mask); in vnic_intr_unmask()
46 iowrite32(1, &intr->ctrl->mask); in vnic_intr_mask()
51 return ioread32(&intr->ctrl->mask); in vnic_intr_masked()
64 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); in vnic_intr_return_credits()
69 return ioread32(&intr->ctrl->int_credits); in vnic_intr_credits()
/dpdk/drivers/net/e1000/base/
H A De1000_82543.c599 u32 ctrl, mask; in e1000_shift_out_mdi_bits_82543() local
650 u32 ctrl; in e1000_shift_in_mdi_bits_82543() local
670 ctrl &= ~E1000_CTRL_MDIO; in e1000_shift_in_mdi_bits_82543()
869 u32 ctrl; in e1000_reset_hw_82543() local
926 u32 ctrl; in e1000_init_hw_82543() local
1028 u32 ctrl; in e1000_setup_copper_link_82543() local
1116 u32 ctrl; in e1000_setup_fiber_link_82543() local
1302 u32 rxcw, ctrl, status; in e1000_check_for_fiber_link_82543() local
1371 u32 ctrl; in e1000_config_mac_to_phy_82543() local
1393 ctrl &= ~E1000_CTRL_FD; in e1000_config_mac_to_phy_82543()
[all …]
H A De1000_mac.c750 u32 ctrl; in e1000_check_for_fiber_link_generic() local
817 u32 ctrl; in e1000_check_for_serdes_link_generic() local
1150 u32 ctrl; in e1000_setup_fiber_serdes_link_generic() local
1158 ctrl &= ~E1000_CTRL_LRST; in e1000_setup_fiber_serdes_link_generic()
1263 u32 ctrl; in e1000_force_mac_fc_generic() local
1293 ctrl &= (~E1000_CTRL_TFCE); in e1000_force_mac_fc_generic()
1294 ctrl |= E1000_CTRL_RFCE; in e1000_force_mac_fc_generic()
1298 ctrl |= E1000_CTRL_TFCE; in e1000_force_mac_fc_generic()
1973 u32 ctrl; in e1000_led_on_generic() local
2002 u32 ctrl; in e1000_led_off_generic() local
[all …]
H A De1000_82542.c166 u32 ctrl; in e1000_reset_hw_82542() local
188 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_reset_hw_82542()
218 u32 ctrl; in e1000_init_hw_82542() local
259 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_init_hw_82542()
345 u32 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_led_on_82542() local
349 ctrl |= E1000_CTRL_SWDPIN0; in e1000_led_on_82542()
350 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_on_82542()
351 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_led_on_82542()
368 ctrl &= ~E1000_CTRL_SWDPIN0; in e1000_led_off_82542()
369 ctrl |= E1000_CTRL_SWDPIO0; in e1000_led_off_82542()
[all …]
H A De1000_82540.c242 u32 ctrl, manc; in e1000_reset_hw_82540() local
260 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_reset_hw_82540()
266 E1000_WRITE_REG(hw, E1000_CTRL_DUP, ctrl | E1000_CTRL_RST); in e1000_reset_hw_82540()
274 E1000_WRITE_REG_IO(hw, E1000_CTRL, ctrl | E1000_CTRL_RST); in e1000_reset_hw_82540()
383 u32 ctrl; in e1000_setup_copper_link_82540() local
389 ctrl = E1000_READ_REG(hw, E1000_CTRL); in e1000_setup_copper_link_82540()
390 ctrl |= E1000_CTRL_SLU; in e1000_setup_copper_link_82540()
391 ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); in e1000_setup_copper_link_82540()
392 E1000_WRITE_REG(hw, E1000_CTRL, ctrl); in e1000_setup_copper_link_82540()
/dpdk/drivers/net/nfp/
H A Dnfp_common.c109 ctrl, update); in nfp_net_reconfig()
130 ctrl, update); in nfp_net_reconfig()
228 hw->ctrl = new_ctrl; in nfp_net_disable_queues()
273 uint32_t update, ctrl; in nfp_set_mac_addr() local
288 ctrl = hw->ctrl; in nfp_set_mac_addr()
350 uint32_t ctrl = 0; in nfp_check_offloads() local
375 ctrl |= NFP_NET_CFG_CTRL_L2BC; in nfp_check_offloads()
399 return ctrl; in nfp_check_offloads()
434 hw->ctrl = new_ctrl; in nfp_net_promisc_enable()
464 hw->ctrl = new_ctrl; in nfp_net_promisc_disable()
[all …]
/dpdk/drivers/net/ixgbe/
H A Drte_pmd_ixgbe.c55 uint32_t ctrl; in rte_pmd_ixgbe_ping_vf() local
71 ctrl = IXGBE_PF_CONTROL_MSG; in rte_pmd_ixgbe_ping_vf()
143 uint32_t ctrl; in rte_pmd_ixgbe_set_vf_vlan_insert() local
164 ctrl = vlan_id; in rte_pmd_ixgbe_set_vf_vlan_insert()
167 ctrl = 0; in rte_pmd_ixgbe_set_vf_vlan_insert()
179 uint32_t ctrl; in rte_pmd_ixgbe_set_tx_loopback() local
563 uint32_t ctrl; in rte_pmd_ixgbe_macsec_config_txsc() local
588 uint32_t ctrl; in rte_pmd_ixgbe_macsec_config_rxsc() local
615 uint32_t ctrl, i; in rte_pmd_ixgbe_macsec_select_txsa() local
671 uint32_t ctrl, i; in rte_pmd_ixgbe_macsec_select_rxsa() local
[all …]
H A Dixgbe_ethdev.c1998 uint32_t ctrl; in ixgbe_vlan_hw_strip_disable() local
2022 uint32_t ctrl; in ixgbe_vlan_hw_strip_enable() local
2034 ctrl |= IXGBE_RXDCTL_VME; in ixgbe_vlan_hw_strip_enable()
2046 uint32_t ctrl; in ixgbe_vlan_hw_extend_disable() local
2067 uint32_t ctrl; in ixgbe_vlan_hw_extend_enable() local
2102 uint32_t ctrl; in ixgbe_vlan_hw_strip_config() local
5560 uint32_t ctrl; in ixgbevf_vlan_strip_queue_set() local
7593 uint32_t ctrl; in ixgbe_e_tag_forwarding_en_dis() local
8135 uint32_t ctrl; in ixgbe_dev_macsec_register_enable() local
8166 ctrl |= 0x3; in ixgbe_dev_macsec_register_enable()
[all …]
/dpdk/drivers/raw/ifpga/base/
H A Dopae_spi.c11 u64 ctrl = 0; in nios_spi_indirect_read() local
15 ctrl = NIOS_SPI_RD | ((u64)reg << 32); in nios_spi_indirect_read()
31 u64 ctrl = 0; in nios_spi_indirect_write() local
35 ctrl |= NIOS_SPI_WR | (u64)reg << 32; in nios_spi_indirect_write()
36 ctrl |= value & NIOS_SPI_WRITE_DATA; in nios_spi_indirect_write()
50 u64 ctrl; in spi_indirect_write() local
54 ctrl = CTRL_W | (reg >> 2); in spi_indirect_write()
55 opae_writeq(ctrl, dev->regs + SPI_CTRL); in spi_indirect_write()
64 u64 ctrl; in spi_indirect_read() local
66 ctrl = CTRL_R | (reg >> 2); in spi_indirect_read()
[all …]
/dpdk/drivers/net/igc/base/
H A Digc_mac.c748 u32 ctrl; in igc_check_for_fiber_link_generic() local
815 u32 ctrl; in igc_check_for_serdes_link_generic() local
1143 u32 ctrl; in igc_setup_fiber_serdes_link_generic() local
1151 ctrl &= ~IGC_CTRL_LRST; in igc_setup_fiber_serdes_link_generic()
1256 u32 ctrl; in igc_force_mac_fc_generic() local
1286 ctrl &= (~IGC_CTRL_TFCE); in igc_force_mac_fc_generic()
1287 ctrl |= IGC_CTRL_RFCE; in igc_force_mac_fc_generic()
1291 ctrl |= IGC_CTRL_TFCE; in igc_force_mac_fc_generic()
1848 u32 ctrl; in igc_led_on_generic() local
1877 u32 ctrl; in igc_led_off_generic() local
[all …]
/dpdk/drivers/net/hinic/base/
H A Dhinic_pmd_api_cmd.c176 u64 ctrl; in prepare_cell_ctrl() local
180 ctrl = be64_to_cpu(*cell_ctrl); in prepare_cell_ctrl()
181 ctrl = HINIC_API_CMD_CELL_CTRL_CLEAR(ctrl, CELL_LEN) & in prepare_cell_ctrl()
190 chksum = xor_chksum_set(&ctrl); in prepare_cell_ctrl()
195 *cell_ctrl = cpu_to_be64(ctrl); in prepare_cell_ctrl()
477 u32 reg_addr, ctrl; in api_cmd_ctrl_init() local
488 ctrl = HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, AEQE_EN) & in api_cmd_ctrl_init()
587 u32 addr, ctrl; in api_cmd_chain_hw_clean() local
591 ctrl = hinic_hwif_read_reg(hwif, addr); in api_cmd_chain_hw_clean()
592 ctrl = HINIC_API_CMD_CHAIN_CTRL_CLEAR(ctrl, RESTART_EN) & in api_cmd_chain_hw_clean()
[all …]
H A Dhinic_pmd_cmdq.c285 struct hinic_ctrl *ctrl; in cmdq_prepare_wqe_ctrl() local
295 ctrl = &wqe_lcmd->ctrl; in cmdq_prepare_wqe_ctrl()
301 ctrl = &wqe_scmd->ctrl; in cmdq_prepare_wqe_ctrl()
305 ctrl->ctrl_info = CMDQ_CTRL_SET(prod_idx, PI) | in cmdq_prepare_wqe_ctrl()
401 struct hinic_ctrl *ctrl; in clear_wqe_complete_bit() local
409 ctrl = &wqe_lcmd->ctrl; in clear_wqe_complete_bit()
413 ctrl = &wqe_scmd->ctrl; in clear_wqe_complete_bit()
417 ctrl->ctrl_info = 0; in clear_wqe_complete_bit()
717 struct hinic_ctrl *ctrl; in hinic_cmdq_poll_msg() local
742 ctrl = &wqe_lcmd->ctrl; in hinic_cmdq_poll_msg()
[all …]
/dpdk/drivers/net/pfe/
H A Dpfe_hif_lib.h80 u32 ctrl; /*0-7: number of Rx queues, 8-15: number of tx queues */ member
90 #define CLIENT_CTRL_RX_Q_CNT(ctrl) (((ctrl) >> CLIENT_CTRL_RX_Q_CNT_OFST) \ argument
92 #define CLIENT_CTRL_TX_Q_CNT(ctrl) (((ctrl) >> CLIENT_CTRL_TX_Q_CNT_OFST) \ argument
125 u32 ctrl; /*0-15bit len, 16-20bit flags, 31bit owner*/ member
131 u32 ctrl; /*0-15bit len, 16-20bit flags, 31bit owner*/ member
H A Dpfe_hif.c74 writel(0, &desc->ctrl); in pfe_hif_release_buffers()
176 writel(0, &desc->ctrl); in pfe_hif_init_buffers()
309 if (readl(&desc->ctrl) & CL_DESC_OWN) { in client_put_rxpacket()
369 len = BD_BUF_LEN(local_desc.ctrl); in pfe_hif_rx_process()
388 if (local_desc.ctrl & BD_CTRL_LIFM) { in pfe_hif_rx_process()
456 &desc->ctrl); in pfe_hif_rx_process()
460 if (local_desc.ctrl & BD_CTRL_LIFM) { in pfe_hif_rx_process()
490 if (readl(&desc->ctrl) & CL_DESC_OWN) { in client_ack_txpacket()
491 writel((readl(&desc->ctrl) & ~CL_DESC_OWN), &desc->ctrl); in client_ack_txpacket()
604 &desc->ctrl); in hif_xmit_pkt()
[all …]
H A Dpfe_hif_lib.c122 desc->ctrl = 0; in hif_lib_client_release_rx_buffers()
169 desc->ctrl = CL_DESC_OWN; in hif_lib_client_init_rx_buffers()
358 if (!(desc->ctrl & CL_DESC_OWN)) in hif_lib_event_handler_start()
408 if ((desc->ctrl & CL_DESC_OWN)) { in hif_lib_receive_pkt()
420 if (desc->ctrl & CL_DESC_FIRST) { in hif_lib_receive_pkt()
425 mbuf->pkt_len = CL_DESC_BUF_LEN(desc->ctrl) in hif_lib_receive_pkt()
440 mbuf->data_len = CL_DESC_BUF_LEN(desc->ctrl); in hif_lib_receive_pkt()
450 if (desc->ctrl & CL_DESC_LAST) in hif_lib_receive_pkt()
466 desc->ctrl = CL_DESC_OWN; in hif_lib_receive_pkt()
547 if (desc->ctrl & CL_DESC_OWN) in hif_lib_tx_get_next_complete()
[all …]
/dpdk/drivers/net/mlx4/
H A Dmlx4_rxtx.c717 ctrl->fence_size = tinfo.fence_size; in mlx4_tx_burst_tso()
752 ctrl->fence_size = 1 + nb_segs; in mlx4_tx_burst_segs()
863 ((volatile uint8_t *)ctrl + wqe_size); in mlx4_tx_burst_segs()
890 volatile struct mlx4_wqe_ctrl_seg *ctrl; in mlx4_tx_burst() local
905 ctrl = elt->wqe; in mlx4_tx_burst()
960 ctrl->fence_size = 0x2; in mlx4_tx_burst()
963 ctrl_next = ctrl + 0x4; in mlx4_tx_burst()
1021 ctrl->imm = 0; in mlx4_tx_burst()
1023 ctrl->srcrb_flags = srcrb.flags; in mlx4_tx_burst()
1033 ctrl = ctrl_next; in mlx4_tx_burst()
[all …]
/dpdk/drivers/net/ngbe/base/
H A Dngbe_phy_yt.c321 u16 ctrl = 0; in ngbe_reset_phy_yt() local
329 ngbe_read_phy_reg_ext_yt(hw, YT_CHIP, 0, &ctrl); in ngbe_reset_phy_yt()
330 if (ctrl & YT_CHIP_MODE_MASK) { in ngbe_reset_phy_yt()
332 status = hw->phy.read_reg(hw, YT_BCR, 0, &ctrl); in ngbe_reset_phy_yt()
334 ctrl |= YT_BCR_RESET; in ngbe_reset_phy_yt()
335 status = hw->phy.write_reg(hw, YT_BCR, 0, ctrl); in ngbe_reset_phy_yt()
338 status = hw->phy.read_reg(hw, YT_BCR, 0, &ctrl); in ngbe_reset_phy_yt()
339 if (!(ctrl & YT_BCR_RESET)) in ngbe_reset_phy_yt()
345 status = ngbe_read_phy_reg_mdi(hw, YT_BCR, 0, &ctrl); in ngbe_reset_phy_yt()
347 ctrl |= YT_BCR_RESET; in ngbe_reset_phy_yt()
[all …]
H A Dngbe_phy_mvl.c232 u16 ctrl = 0; in ngbe_reset_phy_mvl() local
243 ctrl = MVL_GEN_CTL_MODE_COPPER; in ngbe_reset_phy_mvl()
245 ctrl = MVL_GEN_CTL_MODE_FIBER; in ngbe_reset_phy_mvl()
246 status = ngbe_write_phy_reg_mdi(hw, MVL_GEN_CTL, 0, ctrl); in ngbe_reset_phy_mvl()
248 ctrl |= MVL_GEN_CTL_RESET; in ngbe_reset_phy_mvl()
249 status = ngbe_write_phy_reg_mdi(hw, MVL_GEN_CTL, 0, ctrl); in ngbe_reset_phy_mvl()
252 status = ngbe_read_phy_reg_mdi(hw, MVL_GEN_CTL, 0, &ctrl); in ngbe_reset_phy_mvl()
253 if (!(ctrl & MVL_GEN_CTL_RESET)) in ngbe_reset_phy_mvl()
/dpdk/drivers/net/virtio/
H A Dvirtio_ethdev.c330 ctrl->status = status; in virtio_send_command()
365 struct virtio_pmd_ctrl ctrl; in virtio_set_multiple_queues_rss() local
397 struct virtio_pmd_ctrl ctrl; in virtio_set_multiple_queues_auto() local
814 struct virtio_pmd_ctrl ctrl; in virtio_dev_promiscuous_enable() local
825 ctrl.data[0] = 1; in virtio_dev_promiscuous_enable()
841 struct virtio_pmd_ctrl ctrl; in virtio_dev_promiscuous_disable() local
852 ctrl.data[0] = 0; in virtio_dev_promiscuous_disable()
868 struct virtio_pmd_ctrl ctrl; in virtio_dev_allmulticast_enable() local
879 ctrl.data[0] = 1; in virtio_dev_allmulticast_enable()
895 struct virtio_pmd_ctrl ctrl; in virtio_dev_allmulticast_disable() local
[all …]
/dpdk/drivers/net/ark/
H A Dark_pktdir.c25 inst->regs->ctrl = ARK_PKT_DIR_INIT_VAL; /* POR state */ in ark_pktdir_init()
41 inst->regs->ctrl = v; in ark_pktdir_setup()
48 return inst->regs->ctrl; in ark_pktdir_status()
/dpdk/drivers/crypto/virtio/
H A Dvirtio_cryptodev.c108 switch (ctrl->u.sym_create_session.op_type) { in virtio_crypto_send_command()
111 = ctrl->u.sym_create_session.u.cipher in virtio_crypto_send_command()
116 = ctrl->u.sym_create_session.u.chain in virtio_crypto_send_command()
152 memcpy(virt_addr_started, ctrl, len_ctrl_req); in virtio_crypto_send_command()
937 struct virtio_crypto_op_ctrl_req *ctrl; in virtio_crypto_sym_clear_session() local
989 ctrl->header.queue_id = 0; in virtio_crypto_sym_clear_session()
1170 struct virtio_crypto_op_ctrl_req *ctrl, in virtio_crypto_sym_pad_auth_param() argument
1175 &(ctrl->u.sym_create_session.u.chain.para); in virtio_crypto_sym_pad_auth_param()
1207 struct virtio_crypto_op_ctrl_req *ctrl, in virtio_crypto_sym_pad_op_ctrl_req() argument
1233 &ctrl->u.sym_create_session.u.chain.para in virtio_crypto_sym_pad_op_ctrl_req()
[all …]

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