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Searched refs:csr_base_addr (Results 1 – 3 of 3) sorted by relevance

/dpdk/drivers/common/qat/qat_adf/
H A Dadf_transport_access_macros.h94 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument
95 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
97 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument
98 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
100 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument
101 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
104 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
111 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \
122 #define WRITE_CSR_INT_SRCSEL(csr_base_addr, bank) \ argument
129 #define WRITE_CSR_INT_COL_EN(csr_base_addr, bank, value) \ argument
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H A Dadf_transport_access_macros_gen4vf.h13 #define WRITE_CSR_RING_BASE_GEN4VF(csr_base_addr, bank, ring, value) \ argument
18 ADF_CSR_WR(csr_base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4VF, \
22 ADF_CSR_WR(csr_base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4VF, \
28 #define WRITE_CSR_RING_CONFIG_GEN4VF(csr_base_addr, bank, ring, value) \ argument
29 ADF_CSR_WR(csr_base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4VF, \
33 #define WRITE_CSR_RING_TAIL_GEN4VF(csr_base_addr, bank, ring, value) \ argument
34 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET_GEN4VF, \
38 #define WRITE_CSR_RING_HEAD_GEN4VF(csr_base_addr, bank, ring, value) \ argument
39 ADF_CSR_WR((csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET_GEN4VF, \
43 #define WRITE_CSR_RING_SRV_ARB_EN_GEN4VF(csr_base_addr, bank, value) \ argument
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H A Dadf_transport_access_macros_gen4.h22 #define WRITE_CSR_RING_BASE_GEN4(csr_base_addr, bank, ring, value) \ argument
27 ADF_CSR_WR(csr_base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4, \
31 ADF_CSR_WR(csr_base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4, \
37 #define WRITE_CSR_RING_CONFIG_GEN4(csr_base_addr, bank, ring, value) \ argument
38 ADF_CSR_WR(csr_base_addr + ADF_RING_CSR_ADDR_OFFSET_GEN4, \
42 #define WRITE_CSR_RING_TAIL_GEN4(csr_base_addr, bank, ring, value) \ argument
43 ADF_CSR_WR((u8 *)(csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET_GEN4, \
47 #define WRITE_CSR_RING_HEAD_GEN4(csr_base_addr, bank, ring, value) \ argument
48 ADF_CSR_WR((u8 *)(csr_base_addr) + ADF_RING_CSR_ADDR_OFFSET_GEN4, \