Home
last modified time | relevance | path

Searched refs:ci (Results 1 – 25 of 34) sorted by relevance

12

/dpdk/examples/vm_power_manager/
H A Doob_monitor_x86.c35 struct core_info *ci; in apply_policy() local
45 ci = get_core_info(); in apply_policy()
144 struct core_info *ci; in add_core_to_monitor() local
148 ci = get_core_info(); in add_core_to_monitor()
150 if (core < ci->core_count) { in add_core_to_monitor()
187 close(ci->cd[core].msr_fd); in add_core_to_monitor()
204 struct core_info *ci; in remove_core_from_monitor() local
208 ci = get_core_info(); in remove_core_from_monitor()
248 ci->cd[core].msr_fd = 0; in remove_core_from_monitor()
263 struct core_info *ci; in run_branch_monitor() local
[all …]
H A Dpower_manager.c43 struct core_info ci; variable
50 return &ci; in get_core_info()
56 struct core_info *ci; in core_info_init() local
59 ci = get_core_info(); in core_info_init()
62 ci->cd = malloc(ci->core_count * sizeof(struct core_details)); in core_info_init()
63 memset(ci->cd, 0, ci->core_count * sizeof(struct core_details)); in core_info_init()
64 if (!ci->cd) { in core_info_init()
81 struct core_info *ci; in power_manager_init() local
86 ci = get_core_info(); in power_manager_init()
87 if (!ci) { in power_manager_init()
[all …]
H A Dmain.c152 struct core_info *ci; in parse_args() local
162 ci = get_core_info(); in parse_args()
178 oob_enable = malloc(ci->core_count * sizeof(uint16_t)); in parse_args()
183 cnt = parse_set(optarg, oob_enable, ci->core_count); in parse_args()
204 for (i = 0; i < ci->core_count; i++) { in parse_args()
209 ci->cd[i].oob_enabled = 1; in parse_args()
210 ci->cd[i].global_enabled_cpus = 1; in parse_args()
211 ci->cd[i].branch_ratio_threshold = in parse_args()
335 struct core_info *ci; in main() local
342 ci = get_core_info(); in main()
[all …]
H A Dchannel_manager.c560 struct core_info *ci; in add_host_channels() local
567 ci = get_core_info(); in add_host_channels()
568 if (ci == NULL) { in add_host_channels()
573 for (i = 0; i < ci->core_count; i++) { in add_host_channels()
577 if (ci->cd[i].global_enabled_cpus == 0) in add_host_channels()
613 for (i = 0; i < ci->core_count; i++) { in add_host_channels()
H A Dchannel_monitor.c366 pcpu_monitor(struct policy *pol, struct core_info *ci, int pcpu, int count) in pcpu_monitor() argument
371 ci->cd[pcpu].oob_enabled = 1; in pcpu_monitor()
398 struct core_info *ci; in get_pcpu_to_control() local
400 ci = get_core_info(); in get_pcpu_to_control()
419 pcpu_monitor(pol, ci, pcpu, count); in get_pcpu_to_control()
428 pcpu_monitor(pol, ci, pcpu, count); in get_pcpu_to_control()
/dpdk/drivers/net/ice/base/
H A Dice_pg_cam.c170 ci->idx = idx; in _pg_cam_parse_item()
172 _pg_cam_key_init(&ci->key, buf); in _pg_cam_parse_item()
176 ice_pg_cam_dump(hw, ci); in _pg_cam_parse_item()
191 ci->idx = idx; in _pg_sp_cam_parse_item()
197 ice_pg_cam_dump(hw, ci); in _pg_sp_cam_parse_item()
212 ci->idx = idx; in _pg_nm_cam_parse_item()
214 _pg_nm_cam_key_init(&ci->key, d64); in _pg_nm_cam_parse_item()
219 ice_pg_nm_cam_dump(hw, ci); in _pg_nm_cam_parse_item()
234 ci->idx = idx; in _pg_nm_sp_cam_parse_item()
238 _pg_nm_cam_key_init(&ci->key, d64); in _pg_nm_sp_cam_parse_item()
[all …]
/dpdk/drivers/bus/dpaa/base/qbman/
H A Dqman.h56 (qm)->ci + (o))
260 old_ci = eqcr->ci; in qm_eqcr_start_stash()
380 u8 diff, old_ci = eqcr->ci; in qm_eqcr_cci_update()
398 u8 diff, old_ci = eqcr->ci; in qm_eqcr_cce_update()
547 dqrr->ci = (dqrr->ci + num) & (QM_DQRR_SIZE - 1); in qm_dqrr_cci_consume()
580 dqrr->ci = (dqrr->ci + num) & (QM_DQRR_SIZE - 1); in qm_dqrr_cce_consume()
581 qm_cl_out(DQRR_CI, dqrr->ci); in qm_dqrr_cce_consume()
676 return dqrr->ci; in qm_dqrr_get_ci()
789 mr->ci = (mr->ci + num) & (QM_MR_SIZE - 1); in qm_mr_cci_consume()
790 qm_out(MR_CI_CINH, mr->ci); in qm_mr_cci_consume()
[all …]
H A Dbman.h41 (bm)->ci + (o))
102 u8 ci, available, ithresh, vbit; member
128 void __iomem *ci; /* cache-inhibited */ member
174 rcr->ci = bm_in(RCR_CI_CINH) & (BM_RCR_SIZE - 1); in bm_rcr_init()
180 - bm_cyc_diff(BM_RCR_SIZE, rcr->ci, pi); in bm_rcr_init()
196 u8 ci = bm_in(RCR_CI_CINH) & (BM_RCR_SIZE - 1); in bm_rcr_finish() local
203 if (ci != rcr->ci) in bm_rcr_finish()
205 if (rcr->ci != RCR_PTR2IDX(rcr->cursor)) in bm_rcr_finish()
324 u8 diff, old_ci = rcr->ci; in bm_rcr_cci_update()
348 u8 diff, old_ci = rcr->ci; in bm_rcr_cce_update()
[all …]
H A Dqman.c357 qm_cyc_diff(QM_EQCR_SIZE, eqcr->ci, pi); in qm_eqcr_init()
374 u8 pi, ci; in qm_eqcr_finish() local
392 ci = qm_in(EQCR_CI_CINH) & (QM_EQCR_SIZE - 1); in qm_eqcr_finish()
403 if (ci != eqcr->ci) in qm_eqcr_finish()
405 if (eqcr->ci != EQCR_PTR2IDX(eqcr->cursor)) in qm_eqcr_finish()
425 dqrr->cursor = dqrr->ring + dqrr->ci; in qm_dqrr_init()
455 (dqrr->ci != DQRR_PTR2IDX(dqrr->cursor))) in qm_dqrr_finish()
470 mr->cursor = mr->ring + mr->ci; in qm_mr_init()
532 p->addr.ci = c->addr_virt[DPAA_PORTAL_CI]; in qman_init_portal()
2318 old_ci = eqcr->ci; in qman_enqueue_multi()
[all …]
/dpdk/drivers/baseband/la12xx/
H A Dbbdev_la12xx.c151 ch->md.ci = 0; in ipc_queue_configure()
348 if (pi == ci) { in is_bd_ring_full()
423 uint32_t ci, ci_flag, pi, pi_flag; in enqueue_single_op() local
575 uint32_t ci, ci_flag; in dequeue_single_op() local
589 op = q_priv->bbdev_op[ci]; in dequeue_single_op()
595 ci++; in dequeue_single_op()
597 if (q_priv->queue_size == ci) { in dequeue_single_op()
598 ci = 0; in dequeue_single_op()
602 IPC_SET_CI_FLAG(ci); in dequeue_single_op()
604 IPC_RESET_CI_FLAG(ci); in dequeue_single_op()
[all …]
H A Dbbdev_la12xx_ipc.h100 volatile uint32_t ci; /**< Consumer index and flag (MSB) member
226 volatile uint32_t ci; member
/dpdk/drivers/bus/fslmc/qbman/
H A Dqbman_portal.c802 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_ring_mode_direct()
842 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_ring_mode_cinh_read_direct()
880 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_ring_mode_cinh_direct()
917 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_ring_mode_mem_back()
978 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_multiple_direct()
1048 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_multiple_cinh_read_direct()
1117 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_multiple_cinh_direct()
1177 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_multiple_mem_back()
1246 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_multiple_fd_direct()
1316 eqcr_ci = s->eqcr.ci; in qbman_swp_enqueue_multiple_fd_cinh_read_direct()
[all …]
H A Dqbman_portal.h102 uint32_t ci; member
/dpdk/drivers/net/mlx5/
H A Dmlx5_txpp.c168 wq->sq_ci = ci + 1; in mlx5_txpp_doorbell_rearm_queue()
170 (wqe[ci & (wq->sq_size - 1)].ctrl[0]) | (ci - 1) << 8); in mlx5_txpp_doorbell_rearm_queue()
558 uint64_t ts, uint64_t ci) in mlx5_txpp_cache_timestamp() argument
560 ci = ci << (64 - MLX5_CQ_INDEX_WIDTH); in mlx5_txpp_cache_timestamp()
579 uint16_t ci; in mlx5_txpp_update_timestamp() local
598 ci = rte_be_to_cpu_16(to.cts.wqe_counter); in mlx5_txpp_update_timestamp()
601 wq->cq_ci += (ci - wq->sq_ci) & UINT16_MAX; in mlx5_txpp_update_timestamp()
602 wq->sq_ci = ci; in mlx5_txpp_update_timestamp()
1082 uint64_t ts, ci; in mlx5_txpp_read_tsa() local
1093 __ATOMIC_RELAXED) != ci) in mlx5_txpp_read_tsa()
[all …]
/dpdk/drivers/regex/mlx5/
H A Dmlx5_regex.h24 size_t ci; member
31 size_t ci; member
45 size_t ci, pi; member
H A Dmlx5_regex_fastpath.c189 return (qp_size_get(qp) - ((qp->pi - qp->ci) & in get_free()
490 next_cqe_offset = (cq->ci & (cq_size_get(cq) - 1)); in poll_one()
494 int ret = check_cqe(cqe, cq_size_get(cq), cq->ci); in poll_one()
543 while (qp_obj->ci != wq_counter) { in mlx5_regexdev_dequeue()
549 qp_size_get(qp_obj), qp_obj->ci); in mlx5_regexdev_dequeue()
551 qp_obj->ci = (qp_obj->ci + 1) & (priv->has_umr ? in mlx5_regexdev_dequeue()
556 cq->ci = (cq->ci + 1) & 0xffffff; in mlx5_regexdev_dequeue()
558 cq->cq_obj.db_rec[0] = rte_cpu_to_be_32(cq->ci); in mlx5_regexdev_dequeue()
563 queue->ci += i; in mlx5_regexdev_dequeue()
H A Dmlx5_regex_control.c84 cq->ci = 0; in regex_ctrl_create_cq()
150 qp_obj->ci = 0; in regex_ctrl_create_hw_qp()
/dpdk/drivers/compress/mlx5/
H A Dmlx5_compress.c64 uint16_t ci; member
478 uint16_t remain = qp->entries_n - (qp->pi - qp->ci); in mlx5_compress_enqueue_burst()
558 const uint32_t idx = qp->ci & (qp->entries_n - 1); in mlx5_compress_cqe_err_handle()
600 uint32_t next_idx = qp->ci & mask; in mlx5_compress_dequeue_burst()
601 const uint16_t max = RTE_MIN((uint16_t)(qp->pi - qp->ci), nb_ops); in mlx5_compress_dequeue_burst()
609 next_idx = (qp->ci + 1) & mask; in mlx5_compress_dequeue_burst()
614 ret = check_cqe(cqe, cq_size, qp->ci); in mlx5_compress_dequeue_burst()
651 qp->ci++; in mlx5_compress_dequeue_burst()
655 qp->cq.db_rec[0] = rte_cpu_to_be_32(qp->ci); in mlx5_compress_dequeue_burst()
/dpdk/drivers/net/mlx4/
H A Dmlx4_intr.c234 uint32_t ci = cq->cons_index & MLX4_CQ_DB_CI_MASK; in mlx4_arm_cq() local
237 *cq->arm_db = rte_cpu_to_be_32(sn << 28 | cmd | ci); in mlx4_arm_cq()
245 doorbell |= ci; in mlx4_arm_cq()
/dpdk/drivers/crypto/mlx5/
H A Dmlx5_crypto.c439 uint16_t remain = qp->entries_n - (qp->pi - qp->ci); in mlx5_crypto_enqueue_burst()
474 const uint32_t idx = qp->ci & (qp->entries_n - 1); in mlx5_crypto_cqe_err_handle()
493 uint32_t next_idx = qp->ci & mask; in mlx5_crypto_dequeue_burst()
494 const uint16_t max = RTE_MIN((uint16_t)(qp->pi - qp->ci), nb_ops); in mlx5_crypto_dequeue_burst()
502 next_idx = (qp->ci + 1) & mask; in mlx5_crypto_dequeue_burst()
505 ret = check_cqe(cqe, cq_size, qp->ci); in mlx5_crypto_dequeue_burst()
514 qp->ci++; in mlx5_crypto_dequeue_burst()
518 qp->cq_obj.db_rec[0] = rte_cpu_to_be_32(qp->ci); in mlx5_crypto_dequeue_burst()
H A Dmlx5_crypto.h54 uint16_t ci; member
/dpdk/drivers/net/hinic/base/
H A Dhinic_pmd_cmdq.c720 u16 ci; in hinic_cmdq_poll_msg() local
726 wqe = hinic_read_wqe(cmdq->wq, 1, &ci); in hinic_cmdq_poll_msg()
732 cmd_info = &cmdq->cmd_infos[ci]; in hinic_cmdq_poll_msg()
736 ci); in hinic_cmdq_poll_msg()
757 cmdq_update_errcode(cmdq, ci, errcode); in hinic_cmdq_poll_msg()
761 PMD_DRV_LOG(ERR, "Poll cmdq msg time out, ci: %u", ci); in hinic_cmdq_poll_msg()
H A Dhinic_pmd_eqs.c452 u32 addr, ci, pi; in hinic_dump_aeq_info() local
458 ci = hinic_hwif_read_reg(hwdev->hwif, addr); in hinic_dump_aeq_info()
462 q_id, ci, pi); in hinic_dump_aeq_info()
/dpdk/
H A D.travis.yml39 before_install: ./.ci/${TRAVIS_OS_NAME}-setup.sh
40 script: ./.ci/${TRAVIS_OS_NAME}-build.sh
/dpdk/.github/workflows/
H A Dbuild.yml144 .ci/linux-setup.sh
148 run: .ci/linux-build.sh
284 run: docker exec -i dpdk .ci/linux-setup.sh
286 run: docker exec -i dpdk .ci/linux-build.sh

12