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Searched refs:bandwidth (Results 1 – 25 of 33) sorted by relevance

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/dpdk/drivers/common/sfc_efx/base/
H A Dhunt_nic.c23 uint32_t bandwidth; in hunt_nic_get_required_pcie_bandwidth() local
35 bandwidth = 0; in hunt_nic_get_required_pcie_bandwidth()
45 EFX_PCIE_LINK_SPEED_GEN3, &bandwidth)) != 0) in hunt_nic_get_required_pcie_bandwidth()
49 bandwidth = 40000; in hunt_nic_get_required_pcie_bandwidth()
51 bandwidth = 4 * 10000; in hunt_nic_get_required_pcie_bandwidth()
54 bandwidth = 2 * 10000; in hunt_nic_get_required_pcie_bandwidth()
59 *bandwidth_mbpsp = bandwidth; in hunt_nic_get_required_pcie_bandwidth()
76 uint32_t bandwidth; in hunt_board_cfg() local
188 if ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0) in hunt_board_cfg()
190 encp->enc_required_pcie_bandwidth_mbps = bandwidth; in hunt_board_cfg()
H A Dmedford2_nic.c18 uint32_t bandwidth; in medford2_nic_get_required_pcie_bandwidth() local
24 &bandwidth)) != 0) in medford2_nic_get_required_pcie_bandwidth()
27 *bandwidth_mbpsp = bandwidth; in medford2_nic_get_required_pcie_bandwidth()
44 uint32_t bandwidth; in medford2_board_cfg() local
149 rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth); in medford2_board_cfg()
152 encp->enc_required_pcie_bandwidth_mbps = bandwidth; in medford2_board_cfg()
H A Dmedford_nic.c18 uint32_t bandwidth; in medford_nic_get_required_pcie_bandwidth() local
22 &bandwidth)) != 0) in medford_nic_get_required_pcie_bandwidth()
25 *bandwidth_mbpsp = bandwidth; in medford_nic_get_required_pcie_bandwidth()
42 uint32_t bandwidth; in medford_board_cfg() local
147 rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth); in medford_board_cfg()
150 encp->enc_required_pcie_bandwidth_mbps = bandwidth; in medford_board_cfg()
H A Def10_nic.c137 uint32_t bandwidth; in ef10_nic_get_port_mode_bandwidth() local
163 bandwidth = single_lane; in ef10_nic_get_port_mode_bandwidth()
167 bandwidth = dual_lane; in ef10_nic_get_port_mode_bandwidth()
174 bandwidth = 4 * single_lane; in ef10_nic_get_port_mode_bandwidth()
180 bandwidth = dual_lane + dual_lane; in ef10_nic_get_port_mode_bandwidth()
188 bandwidth = 4 * single_lane; in ef10_nic_get_port_mode_bandwidth()
192 bandwidth = quad_lane; in ef10_nic_get_port_mode_bandwidth()
196 bandwidth = 2 * dual_lane; in ef10_nic_get_port_mode_bandwidth()
204 bandwidth = quad_lane + dual_lane; in ef10_nic_get_port_mode_bandwidth()
207 bandwidth = quad_lane + quad_lane; in ef10_nic_get_port_mode_bandwidth()
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H A Drhead_nic.c19 uint32_t bandwidth; in rhead_board_cfg() local
169 rc = ef10_nic_get_port_mode_bandwidth(enp, &bandwidth); in rhead_board_cfg()
172 encp->enc_required_pcie_bandwidth_mbps = bandwidth; in rhead_board_cfg()
H A Defx_nic.c1262 uint32_t bandwidth; in efx_nic_check_pcie_link_speed() local
1280 pcie_link_gen, &bandwidth); in efx_nic_check_pcie_link_speed()
1284 if (bandwidth < encp->enc_required_pcie_bandwidth_mbps) { in efx_nic_check_pcie_link_speed()
/dpdk/doc/guides/howto/
H A Dvfd.rst335 VF max bandwidth
341 set vf tx max-bandwidth 0 0 2000
343 The maximum bandwidth is an absolute value in Mbps.
346 VF TC bandwidth allocation
350 bandwidth allocation for a specific VF::
352 set vf tc tx min-bandwidth 0 0 (20,20,20,40)
354 The allocated bandwidth should be set for all the TCs. The allocated bandwidth
355 is a relative value as a percentage. The sum of all the bandwidth should
359 VF TC max bandwidth
365 set vf tc tx max-bandwidth 0 0 0 10000
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/dpdk/doc/guides/compressdevs/
H A Dmlx5.rst21 such they do not use NIC related resources (e.g. RX/TX bandwidth).
22 They do share the same PCI and memory bandwidth.
/dpdk/doc/guides/nics/
H A Di40e.rst666 VF & TC max bandwidth setting
669 The per VF max bandwidth and per TC max bandwidth cannot be enabled in parallel.
670 The behavior is different when handling per VF and per TC max bandwidth setting.
671 When enabling per VF max bandwidth, SW will check if per TC max bandwidth is
673 When enabling per TC max bandwidth, SW will check if per VF max bandwidth
674 is enabled. If so, disable per VF max bandwidth and continue with per TC max
675 bandwidth setting.
681 If a TC is set to strict priority mode, it can consume unlimited bandwidth.
682 It means if APP has set the max bandwidth for that TC, it comes to no
685 sensitive but no consuming much bandwidth.
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H A Dmlx5.rst279 buffers from other devices) with high bandwidth, a mbuf flag is used.
562 allows to save PCI bandwidth and improve performance. Enabled by default.
586 transaction. This feature would waste PCI bandwidth but could improve
630 Multi-Packet Rx Queue (MPRQ a.k.a Striding RQ) can further save PCIe bandwidth
703 enough CPU cores and PCI bandwidth is getting more critical and CPU
766 data will be copied into WQE. This may improve PCI bandwidth utilization for
790 bandwidth utilization for short packets significantly but requires the extra
836 in a single descriptor session in order to save PCI bandwidth
1186 to put both adapters on the same NUMA node without PCI bandwidth degradation,
H A Dfm10k.rst29 It improves load/store bandwidth efficiency of L1 data cache by using a wider
H A Dice.rst247 degradation due to the PCI bandwidth limitation.
/dpdk/doc/guides/prog_guide/
H A Dqos_framework.rst469 then some slots will be left unused and bandwidth will be wasted.
511 so NIC bandwidth is wasted due to poor packet supply to the NIC TX.
518 To keep up with the output port (that is, avoid bandwidth loss),
524 as this would result in credit loss (and therefore bandwidth loss) for the pipe.
931 more bandwidth is allocated for traffic class X at the level of subport member pipes than
962 …| | | are served first will use up as much bandwidth for TC X as the…
964 …| | | bandwidth for TC X at the subport level being scarce. …
967 …| 2 | Scale down all pipes | All pipes within the subport have their bandwidth limit for TC…
971 …| | | pipes (that is, pipes configured with low bandwidth) can poten…
973 …| | | unusable (if available bandwidth for these pipes drops below t…
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/dpdk/drivers/event/dlb2/
H A Ddlb2_user.h289 __u32 bandwidth; member
/dpdk/doc/guides/eventdevs/
H A Ddlb2.rst345 DLB supports provisioning the DLB bandwidth into 4 classes of service.
347 - Class 4 corresponds to 40% of the DLB hardware bandwidth
348 - Class 3 corresponds to 30% of the DLB hardware bandwidth
349 - Class 2 corresponds to 20% of the DLB hardware bandwidth
350 - Class 1 corresponds to 10% of the DLB hardware bandwidth
/dpdk/doc/guides/contributing/
H A Ddesign.rst149 cache bandwidth, memory bandwidth, etc) that depends on:
/dpdk/doc/guides/rel_notes/
H A Drelease_17_05.rst82 * **Added VF max bandwidth setting in i40e.**
84 Enabled capability to set the max bandwidth for a VF in i40e.
86 * **Added VF TC min and max bandwidth setting in i40e.**
88 Enabled capability to set the min and max allocated bandwidth for a TC on a
H A Drelease_21_08.rst44 * Added Tx QoS TC bandwidth configuration in DCF.
/dpdk/doc/guides/bbdevs/
H A Dfpga_5gnr_fec.rst151 queues, priorities, load balance, bandwidth and other settings necessary for the
180 allocates different bandwidth to UL and DL. The weight is configured by this
H A Dfpga_lte_fec.rst150 queues, priorities, load balance, bandwidth and other settings necessary for the
179 allocates different bandwidth to UL and DL. The weight is configured by this
H A Dacc100.rst166 queues, priorities, load balance, bandwidth and other settings necessary for the
/dpdk/drivers/event/dlb2/pf/base/
H A Ddlb2_resource.h1752 int dlb2_hw_set_cos_bandwidth(struct dlb2_hw *hw, u32 cos_id, u8 bandwidth);
/dpdk/doc/guides/linux_gsg/
H A Dnic_perf_intel_platform.rst74 …3 slots, such as Gen3 ``x8`` or Gen3 ``x16`` because PCIe Gen2 slots don't provide enough bandwidth
/dpdk/doc/guides/testpmd_app_ug/
H A Dtestpmd_funcs.rst1481 set tx max bandwidth (for VF)
1484 Set TX max absolute bandwidth (Mbps) for a VF from PF::
1486 testpmd> set vf tx max-bandwidth (port_id) (vf_id) (max_bandwidth)
1488 set tc tx min bandwidth (for VF)
1491 Set all TCs' TX min relative bandwidth (%) for a VF from PF::
1493 testpmd> set vf tc tx min-bandwidth (port_id) (vf_id) (bw1, bw2, ...)
1495 set tc tx max bandwidth (for VF)
1498 Set a TC's TX max absolute bandwidth (Mbps) for a VF from PF::
1509 set tc tx min bandwidth
1514 testpmd> set tc tx min-bandwidth (port_id) (bw1, bw2, ...)
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/dpdk/doc/guides/faq/
H A Dfaq.rst119 …riptor rings are allocated from both memory domains, thus incurring QPI bandwidth accessing the ot…

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