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Searched refs:access (Results 1 – 25 of 122) sorted by relevance

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/dpdk/lib/eal/linux/
H A Deal_lcore.c27 if (access(path, F_OK) != 0) in eal_cpu_detected()
50 if (access(path, F_OK) == 0) in eal_cpu_socket_id()
/dpdk/drivers/regex/mlx5/
H A Dmlx5_rxp.c32 uint32_t access, struct mlx5_regex_mkey *mkey);
53 uint32_t access, struct mlx5_regex_mkey *mkey) in rxp_create_mkey() argument
58 mkey->umem = mlx5_glue->devx_umem_reg(priv->cdev->ctx, ptr, size, access); in rxp_create_mkey()
/dpdk/drivers/common/mlx5/linux/
H A Dmlx5_common_os.h209 mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access) in mlx5_os_umem_reg() argument
211 return mlx5_glue->devx_umem_reg(ctx, addr, size, access); in mlx5_os_umem_reg()
H A Dmlx5_glue.c260 mlx5_glue_reg_mr(struct ibv_pd *pd, void *addr, size_t length, int access) in mlx5_glue_reg_mr() argument
262 return ibv_reg_mr(pd, addr, length, access); in mlx5_glue_reg_mr()
267 uint64_t iova, int access) in mlx5_glue_reg_mr_iova() argument
270 return ibv_reg_mr_iova(pd, addr, length, iova, access); in mlx5_glue_reg_mr_iova()
276 (void)access; in mlx5_glue_reg_mr_iova()
1082 uint32_t access) in mlx5_glue_devx_umem_reg() argument
1085 return mlx5dv_devx_umem_reg(context, addr, size, access); in mlx5_glue_devx_umem_reg()
1090 (void)access; in mlx5_glue_devx_umem_reg()
H A Dmlx5_glue.h203 size_t length, int access);
206 int access);
327 uint32_t access);
/dpdk/doc/guides/prog_guide/
H A Dasan.rst9 is a widely-used debugging tool to detect memory access errors.
52 …r-overflow error if ASan is enabled, because apply 9 bytes of memory but access the tenth byte, de…
81 …after-free error if ASan is enabled, because apply 9 bytes of memory but access the first byte aft…
H A Dmempool_lib.rst27 Statistics are per-lcore to avoid concurrent access to statistics counters.
78 since each access requires a compare-and-set (CAS) operation.
79 To avoid having too many access requests to the memory pool's ring,
82 In this way, each core has full access to its own cache (with locks) of free objects and
87 the speed at which a core can access its own cache for a specific memory pool without locks provide…
H A Dbpf_lib.rst34 and ``(BPF_IND | size | BPF_LD)`` which are used to access packet data.
42 eBPF program is trying to access the data beyond the packet boundary,
H A Dwriting_efficient_code.rst43 lockless access to objects, NUMA awareness, bulk get/put and per-lcore cache.
49 Read-Write (RW) access operations by several lcores to the same memory area can generate a lot of d…
63 On a NUMA system, it is preferable to access local memory since remote memory access is slower.
77 meaning that if all memory access operations are done on the first channel only, there is a potenti…
102 The ring supports bulk and burst access,
105 Performance is greatly improved when using bulk access operations.
H A Dprofile_app.rst79 at CPU frequency. However, access to the PMU cycle counter from user space is
81 cycle counter for user space access by configuring the PMU from the privileged
/dpdk/drivers/net/mlx4/
H A Dmlx4_glue.c186 mlx4_glue_reg_mr(struct ibv_pd *pd, void *addr, size_t length, int access) in mlx4_glue_reg_mr() argument
188 return ibv_reg_mr(pd, addr, length, access); in mlx4_glue_reg_mr()
H A Dmlx4_glue.h70 size_t length, int access);
/dpdk/drivers/bus/dpaa/
H A Ddpaa_bus.c490 if ((access(DPAA_DEV_PATH1, F_OK) != 0) && in rte_dpaa_bus_scan()
491 (access(DPAA_DEV_PATH2, F_OK) != 0)) { in rte_dpaa_bus_scan()
751 if ((access(DPAA_DEV_PATH1, F_OK) != 0) && in rte_dpaa_get_iommu_class()
752 (access(DPAA_DEV_PATH2, F_OK) != 0)) { in rte_dpaa_get_iommu_class()
/dpdk/doc/guides/sample_app_ug/
H A Dl2_forward_cat.rst22 exclusive, shared, or mixed access to the CPU's last level cache.
114 * cpus 4, 5 and 6 have exclusive access to 4 out of 8 ways;
116 * cpu 7 has exclusive access to all of its 4 ways;
120 * cpus 1 and 3 have access to 2 ways for code and 2 ways for data, code and
/dpdk/doc/guides/testpmd_app_ug/
H A Dintro.rst10 and also to access NIC hardware features such as Flow Director.
/dpdk/drivers/common/mlx5/windows/
H A Dmlx5_common_os.h252 void *mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access);
H A Dmlx5_common_os.c285 mlx5_os_umem_reg(void *ctx, void *addr, size_t size, uint32_t access) in mlx5_os_umem_reg() argument
295 umem->umem_hdl = mlx5_glue->devx_umem_reg(ctx, addr, size, access, in mlx5_os_umem_reg()
H A Dmlx5_glue.h76 uint32_t access, uint32_t *id);
H A Dmlx5_glue.c205 uint32_t access, uint32_t *id) in mlx5_glue_devx_umem_reg() argument
214 if (access) in mlx5_glue_devx_umem_reg()
/dpdk/doc/guides/nics/
H A Denetfec.rst71 ENETFEC PMD uses standard UIO interface to access kernel
74 which gives access to non-cacheable memory for buffer descriptor.
/dpdk/drivers/bus/pci/linux/
H A Dpci.c276 if (!access(filename, F_OK) && in pci_scan_one()
283 if (!access(filename, F_OK) && in pci_scan_one()
292 if (access(filename, F_OK) != -1) { in pci_scan_one()
/dpdk/drivers/bus/auxiliary/linux/
H A Dauxiliary.c45 if (access(filename, F_OK) != -1) { in auxiliary_scan_one()
/dpdk/drivers/net/ice/base/
H A Dice_nvm.h86 ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);
/dpdk/lib/eal/unix/
H A Deal_firmware.c141 if (access(path, F_OK) == 0) { in rte_firmware_read()
/dpdk/drivers/raw/ifpga/base/
H A DREADME45 6. Instruding and exposing APIs to DPDK PMD to access networking

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