| /dpdk/drivers/net/axgbe/ |
| H A D | axgbe_common.h | 1460 _prefix##_##_field##_WIDTH)
1470 _prefix##_##_field##_WIDTH)
1490 _reg##_##_field##_WIDTH)
1516 _reg##_##_field##_WIDTH)
1541 _reg##_##_field##_WIDTH)
1562 _prefix##_##_field##_WIDTH)
1602 _reg##_##_field##_WIDTH)
1623 _reg##_##_field##_WIDTH)
1647 _reg##_##_field##_WIDTH)
1681 _reg##_##_field##_WIDTH)
[all …]
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| /dpdk/drivers/common/sfc_efx/base/ |
| H A D | efx_types.h | 128 (EFX_LOW_BIT(_field) + EFX_WIDTH(_field) - 1)
509 EFX_HIGH_BIT(_field)) & EFX_MASK32(_field))
513 EFX_HIGH_BIT(_field)) & EFX_MASK32(_field))
517 EFX_HIGH_BIT(_field)) & EFX_MASK32(_field))
521 EFX_HIGH_BIT(_field)) & EFX_MASK32(_field))
525 EFX_HIGH_BIT(_field)) & EFX_MASK32(_field))
529 EFX_HIGH_BIT(_field)) & EFX_MASK32(_field))
533 EFX_HIGH_BIT(_field)) & EFX_MASK32(_field))
537 EFX_HIGH_BIT(_field)) & EFX_MASK16(_field))
541 EFX_HIGH_BIT(_field)) & EFX_MASK8(_field))
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| H A D | efx_mcdi.h | 336 MC_CMD_ ## _field, _value)
490 MC_CMD_ ## _field)
498 MC_CMD_ ## _field)
505 (_idx)), _field)
543 _field)
551 _field)
559 _field)
561 #define MCDI_EV_FIELD(_eqp, _field) \ argument
562 EFX_QWORD_FIELD(*_eqp, MCDI_EVENT_ ## _field)
564 #define MCDI_CMD_DWORD_FIELD(_edp, _field) \ argument
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| H A D | mcdi_mon.c | 18 #define MCDI_STATIC_SENSOR_ASSERT(_field) \ argument
19 EFX_STATIC_ASSERT(MC_CMD_SENSOR_STATE_ ## _field \
20 == EFX_MON_STAT_STATE_ ## _field)
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| H A D | rhead_rx.c | 341 #define EFX_MCDI_TO_RX_PREFIX_FIELD(_field) \ in efx_mcdi_rx_prefix_field_map() argument
342 [RX_PREFIX_FIELD_INFO_ ## _field] = EFX_RX_PREFIX_FIELD_ ## _field in efx_mcdi_rx_prefix_field_map()
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| H A D | siena_mac.c | 239 #define SIENA_MAC_STAT_READ(_esmp, _field, _eqp) \ argument
240 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
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| H A D | ef10_mac.c | 574 #define EF10_MAC_STAT_READ(_esmp, _field, _eqp) \ argument
575 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
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| H A D | efx.h | 26 #define EFX_FIELD_OFFSET(_type, _field) \ argument
27 ((size_t)&(((_type *)0)->_field))
3017 #define EFX_RX_PREFIX_FIELD(_efx, _field, _big_endian) \ argument
3019 .erpfi_offset_bits = EFX_LOW_BIT(_field), \
3020 .erpfi_width_bits = EFX_WIDTH(_field), \
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| /dpdk/drivers/raw/ifpga/base/ |
| H A D | ifpga_compat.h | 38 #define fpga_wait_register_field(_field, _expect, _reg_addr, _timeout, _invl)\ argument
45 if (_expect._field == value._field) { \
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| /dpdk/drivers/net/cxgbe/ |
| H A D | cxgbe_filter.c | 75 #define S(_field) \ in cxgbe_validate_filter() argument
76 (fs->val._field || fs->mask._field) in cxgbe_validate_filter()
77 #define U(_mask, _field) \ in cxgbe_validate_filter() argument
78 (!(fconf & (_mask)) && S(_field)) in cxgbe_validate_filter()
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| /dpdk/drivers/net/sfc/ |
| H A D | sfc_mae.c | 2395 #define FIELD_ID_NO_REMAP(_field) \ argument
2396 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_##_field
2428 #define FIELD_ID_REMAP_TO_ENCAP(_field) \ argument
2429 [EFX_MAE_FIELD_##_field] = EFX_MAE_FIELD_ENC_##_field
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| /dpdk/drivers/net/qede/base/ |
| H A D | ecore_mcp.c | 49 #define DRV_MB_WR(_p_hwfn, _p_ptt, _field, _val) \ argument
51 OFFSETOF(struct public_drv_mb, _field), _val)
53 #define DRV_MB_RD(_p_hwfn, _p_ptt, _field) \ argument
55 OFFSETOF(struct public_drv_mb, _field))
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