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Searched refs:____cacheline_aligned (Results 1 – 5 of 5) sorted by relevance

/dpdk/drivers/net/ena/base/
H A Dena_com.h126 } ____cacheline_aligned; variable
172 } ____cacheline_aligned; variable
H A Dena_plat_dpdk.h61 #define ____cacheline_aligned __rte_cache_aligned macro
/dpdk/drivers/common/dpaax/
H A Dcompat.h61 #define ____cacheline_aligned __rte_aligned(L1_CACHE_BYTES) macro
/dpdk/drivers/bus/dpaa/base/qbman/
H A Dbman.h136 } ____cacheline_aligned; variable
H A Dqman.h191 #define QM_PORTAL_ALIGNMENT ____cacheline_aligned