| /dpdk/drivers/net/bnxt/tf_ulp/generic_templates/ |
| H A D | ulp_template_db_tbl.c | 564 .direction = TF_DIR_RX 572 .direction = TF_DIR_RX 580 .direction = TF_DIR_RX 588 .direction = TF_DIR_RX 596 .direction = TF_DIR_RX 604 .direction = TF_DIR_RX 612 .direction = TF_DIR_RX 620 .direction = TF_DIR_RX 628 .direction = TF_DIR_RX 636 .direction = TF_DIR_RX [all …]
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| H A D | ulp_template_db_wh_plus_act.c | 83 .direction = TF_DIR_RX, 105 .direction = TF_DIR_RX, 125 .direction = TF_DIR_RX, 147 .direction = TF_DIR_RX, 168 .direction = TF_DIR_RX, 186 .direction = TF_DIR_RX, 201 .direction = TF_DIR_RX, 222 .direction = TF_DIR_RX, 243 .direction = TF_DIR_RX, 265 .direction = TF_DIR_RX, [all …]
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| H A D | ulp_template_db_wh_plus_class.c | 73 .direction = TF_DIR_RX, 94 .direction = TF_DIR_RX, 113 .direction = TF_DIR_RX, 126 .direction = TF_DIR_RX, 153 .direction = TF_DIR_RX, 176 .direction = TF_DIR_RX, 195 .direction = TF_DIR_RX, 207 .direction = TF_DIR_RX, 226 .direction = TF_DIR_RX, 252 .direction = TF_DIR_RX, [all …]
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| H A D | ulp_template_db_thor_act.c | 83 .direction = TF_DIR_RX, 105 .direction = TF_DIR_RX, 125 .direction = TF_DIR_RX, 145 .direction = TF_DIR_RX, 165 .direction = TF_DIR_RX, 182 .direction = TF_DIR_RX, 197 .direction = TF_DIR_RX, 218 .direction = TF_DIR_RX, 239 .direction = TF_DIR_RX, 261 .direction = TF_DIR_RX, [all …]
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| H A D | ulp_template_db_thor_class.c | 72 .direction = TF_DIR_RX, 94 .direction = TF_DIR_RX, 115 .direction = TF_DIR_RX, 134 .direction = TF_DIR_RX, 147 .direction = TF_DIR_RX, 174 .direction = TF_DIR_RX, 194 .direction = TF_DIR_RX, 207 .direction = TF_DIR_RX, 226 .direction = TF_DIR_RX, 238 .direction = TF_DIR_RX, [all …]
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| /dpdk/drivers/net/bnxt/tf_core/ |
| H A D | tf_device_p58.c | 52 [TF_DIR_RX][TF_TBL_TYPE_EM_FKB] = { 56 [TF_DIR_RX][TF_TBL_TYPE_WC_FKB] = { 60 [TF_DIR_RX][TF_TBL_TYPE_METER_PROF] = { 64 [TF_DIR_RX][TF_TBL_TYPE_METER_INST] = { 72 [TF_DIR_RX][TF_TBL_TYPE_MIRROR_CONFIG] = { 76 [TF_DIR_RX][TF_TBL_TYPE_METADATA] = { 93 [TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_8B] = { 98 [TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_16B] = { 104 [TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_32B] = { 142 [TF_DIR_RX][TF_TBL_TYPE_ACT_SP_SMAC] = { [all …]
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| H A D | tf_device_p4.c | 63 [TF_DIR_RX][TF_TBL_TYPE_FULL_ACT_RECORD] = { 67 [TF_DIR_RX][TF_TBL_TYPE_MCAST_GROUPS] = { 71 [TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_8B] = { 75 [TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_16B] = { 79 [TF_DIR_RX][TF_TBL_TYPE_ACT_ENCAP_64B] = { 83 [TF_DIR_RX][TF_TBL_TYPE_ACT_SP_SMAC] = { 95 [TF_DIR_RX][TF_TBL_TYPE_ACT_STATS_64] = { 99 [TF_DIR_RX][TF_TBL_TYPE_ACT_MODIFY_IPV4] = { 103 [TF_DIR_RX][TF_TBL_TYPE_METER_PROF] = { 107 [TF_DIR_RX][TF_TBL_TYPE_METER_INST] = { [all …]
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| H A D | tf_em_common.c | 538 tbl_scope_cb->em_caps[TF_DIR_RX].max_entries_supported) { in tf_em_validate_num_entries() 543 tbl_scope_cb->em_caps[TF_DIR_RX].max_entries_supported); in tf_em_validate_num_entries() 633 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_KEY0_TABLE].num_entries = in tf_em_validate_num_entries() 635 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_KEY0_TABLE].entry_size = in tf_em_validate_num_entries() 638 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_KEY1_TABLE].num_entries = in tf_em_validate_num_entries() 640 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_KEY1_TABLE].entry_size = in tf_em_validate_num_entries() 643 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_RECORD_TABLE].num_entries = in tf_em_validate_num_entries() 645 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_RECORD_TABLE].entry_size = in tf_em_validate_num_entries() 648 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_EFC_TABLE].num_entries = in tf_em_validate_num_entries() 651 tbl_scope_cb->em_ctx_info[TF_DIR_RX].em_tables[TF_ACTION_TABLE].num_entries = in tf_em_validate_num_entries() [all …]
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| H A D | tf_device.c | 131 tf_tbl_p4[TF_DIR_RX], in tf_dev_bind_p4() 135 tbl_cfg.cfg = tf_tbl_p4[TF_DIR_RX]; in tf_dev_bind_p4() 415 tf_tbl_p58[TF_DIR_RX], in tf_dev_bind_p58() 422 tbl_cfg.cfg = tf_tbl_p58[TF_DIR_RX]; in tf_dev_bind_p58()
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| H A D | tf_em_host.c | 405 aparms.rm_db = ext_db->eem_db[TF_DIR_RX]; in tf_em_ext_alloc() 526 fparms.rm_db = ext_db->eem_db[TF_DIR_RX]; in tf_em_ext_alloc() 571 aparms.rm_db = ext_db->eem_db[TF_DIR_RX]; in tf_em_ext_free()
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| H A D | tf_util.c | 14 case TF_DIR_RX: in tf_dir_2_str()
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| H A D | tf_em_internal.c | 250 if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { in tf_em_int_bind() 252 return db_rc[TF_DIR_RX]; in tf_em_int_bind()
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| H A D | tf_identifier.c | 97 if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { in tf_ident_bind() 99 return db_rc[TF_DIR_RX]; in tf_ident_bind()
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| H A D | tf_if_tbl.c | 79 if_tbl_db->if_tbl_cfg_db[TF_DIR_RX] = parms->cfg; in tf_if_tbl_bind()
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| H A D | tf_global_cfg.c | 91 global_cfg_db->global_cfg_db[TF_DIR_RX] = parms->cfg; in tf_global_cfg_bind()
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| H A D | tf_tcam.c | 78 if ((tcam_cnt[TF_DIR_RX].cnt[TF_TCAM_TBL_TYPE_WC_TCAM] % num_slices) || in tf_tcam_bind() 117 if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { in tf_tcam_bind() 119 return db_rc[TF_DIR_RX]; in tf_tcam_bind()
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| H A D | tf_tbl.c | 75 if (db_rc[TF_DIR_RX] && db_rc[TF_DIR_TX]) { in tf_tbl_bind() 79 return db_rc[TF_DIR_RX]; in tf_tbl_bind()
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| H A D | tf_core.h | 31 TF_DIR_RX, /**< Receive */ enumerator
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| /dpdk/drivers/net/bnxt/tf_ulp/ |
| H A D | ulp_ha_mgr.c | 24 #define ULP_HA_IF_TBL_DIR TF_DIR_RX 228 cparms.dir = TF_DIR_RX; in ulp_ha_mgr_timer_cb() 276 cparms.dir = TF_DIR_RX; in ulp_ha_mgr_timer_cb() 286 mparms.dir = TF_DIR_RX; in ulp_ha_mgr_timer_cb()
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| H A D | bnxt_ulp.c | 1259 (void)bnxt_ulp_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP, in bnxt_ulp_deinit() 1354 rc = bnxt_ulp_global_cfg_update(bp, TF_DIR_RX, TF_TUNNEL_ENCAP, in bnxt_ulp_init()
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| H A D | ulp_mapper.c | 3909 for (dir = TF_DIR_RX; dir < TF_DIR_MAX; dir++) { in ulp_mapper_glb_resource_info_deinit()
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