| /dpdk/lib/eal/common/ |
| H A D | malloc_elem.h | 82 #define MALLOC_ELEM_TRAILER(elem) (*((uint64_t*)RTE_PTR_ADD(elem, \ 134 RTE_PTR_ADD(ASAN_MEM_SHIFT(mem), ASAN_SHADOW_OFFSET) 201 elem = RTE_PTR_ADD(elem, elem->pad); in asan_set_redzone() 206 head_redzone = (uintptr_t)RTE_PTR_ADD(elem, in asan_set_redzone() 215 tail_redzone = (uintptr_t)RTE_PTR_ADD(elem, in asan_set_redzone() 242 elem = RTE_PTR_ADD(elem, elem->pad); in asan_clear_redzone() 245 head_redzone = (uintptr_t)RTE_PTR_ADD(elem, in asan_clear_redzone() 254 tail_redzone = (uintptr_t)RTE_PTR_ADD(elem, in asan_clear_redzone() 268 elem = RTE_PTR_ADD(elem, elem->pad); in old_malloc_size()
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| H A D | malloc_elem.c | 44 data_start = RTE_PTR_ADD(elem, MALLOC_ELEM_HEADER_LEN); in malloc_elem_find_max_iova_contig() 68 page_end = RTE_PTR_ADD(cur_page, page_sz); in malloc_elem_find_max_iova_contig() 77 cur_page = RTE_PTR_ADD(cur_page, page_sz); in malloc_elem_find_max_iova_contig() 80 page_end = RTE_PTR_ADD(cur_page, page_sz); in malloc_elem_find_max_iova_contig() 310 elem = RTE_PTR_ADD(elem, elem->pad); in split_elem() 344 return elem->next == RTE_PTR_ADD(elem, elem->size) && in next_elem_is_adjacent() 356 return elem == RTE_PTR_ADD(elem->prev, elem->prev->size) && in prev_elem_is_adjacent() 442 RTE_PTR_ADD(new_elem, size + MALLOC_ELEM_OVERHEAD); in malloc_elem_alloc() 506 struct malloc_elem *inner = RTE_PTR_ADD(elem1, elem1->pad); in join_elem() 575 ptr = RTE_PTR_ADD(elem, MALLOC_ELEM_HEADER_LEN); in malloc_elem_free() [all …]
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| H A D | eal_common_memory.c | 108 next_baseaddr = RTE_PTR_ADD(next_baseaddr, page_sz); in eal_get_virtual_area() 156 next_baseaddr = RTE_PTR_ADD(aligned_addr, *size); in eal_get_virtual_area() 175 map_end = RTE_PTR_ADD(mapped_addr, (size_t)map_sz); in eal_get_virtual_area() 176 aligned_end = RTE_PTR_ADD(aligned_addr, *size); in eal_get_virtual_area() 288 addr = RTE_PTR_ADD(addr, page_sz); in eal_memseg_list_populate() 304 end = RTE_PTR_ADD(start, msl->len); in virt2memseg() 327 end = RTE_PTR_ADD(start, msl->len); in virt2memseg_list() 354 vi->virt = RTE_PTR_ADD(ms->addr, offset); in find_virt() 367 vi->virt = RTE_PTR_ADD(ms->addr, offset); in find_virt_legacy() 1220 mz_end = RTE_PTR_ADD(cur_addr, mz->len); in handle_eal_memzone_info_request() [all …]
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| H A D | eal_common_trace_ctf.c | 44 memcpy(RTE_PTR_ADD(ptr, count), str, rc); in meta_copy() 314 str = RTE_PTR_ADD(meta, trace->ctf_meta_offset_freq); in meta_fix_freq() 338 str = RTE_PTR_ADD(meta, trace->ctf_meta_offset_freq_off_s); in meta_fix_freq_offset() 341 str = RTE_PTR_ADD(meta, trace->ctf_meta_offset_freq_off); in meta_fix_freq_offset()
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| H A D | malloc_heap.c | 203 void *data_start = RTE_PTR_ADD(elem, in find_biggest_element() 205 void *data_end = RTE_PTR_ADD(elem, elem->size - in find_biggest_element() 880 void *asan_ptr = RTE_PTR_ADD(elem, MALLOC_ELEM_HEADER_LEN + elem->pad); in malloc_heap_free() 912 end = RTE_PTR_ADD(elem, len); in malloc_heap_free() 931 aligned_start = RTE_PTR_ADD(tmp->addr, tmp->len); in malloc_heap_free() 959 aligned_start = RTE_PTR_ADD(aligned_start, page_sz); in malloc_heap_free() 1043 void *asan_end = RTE_PTR_ADD(asan_ptr, asan_data_len); in malloc_heap_free() 1044 void *aligned_end = RTE_PTR_ADD(aligned_start, aligned_len); in malloc_heap_free() 1215 ms->addr = RTE_PTR_ADD(va_addr, i * page_sz); in malloc_heap_create_external_seg()
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| H A D | eal_common_memalloc.c | 85 end = RTE_PTR_ADD(start, len); in eal_memalloc_is_contig() 101 aligned_start = RTE_PTR_ADD(aligned_start, pgsz); in eal_memalloc_is_contig() 107 aligned_start = RTE_PTR_ADD(aligned_start, pgsz); in eal_memalloc_is_contig()
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| /dpdk/drivers/baseband/fpga_5gnr_fec/ |
| H A D | fpga_5gnr_fec.h | 299 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_8() 307 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_16() 315 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_32() 323 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_write_64() 353 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_read_32() 364 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_read_16() 375 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_read_8() 383 void *reg_addr = RTE_PTR_ADD(mmio_base, offset); in fpga_reg_read_64()
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| /dpdk/lib/eal/include/ |
| H A D | rte_trace_point.h | 323 void *mem = RTE_PTR_ADD(&trace->mem[0], offset); in __rte_trace_mem_get() 343 return RTE_PTR_ADD(mem, __RTE_TRACE_EVENT_HEADER_SZ); in __rte_trace_point_emit_ev_header() 366 mem = RTE_PTR_ADD(mem, sizeof(in)); \ 374 mem = RTE_PTR_ADD(mem, __RTE_TRACE_EMIT_STRING_LEN_MAX); \
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| /dpdk/drivers/net/ark/ |
| H A D | ark_ethdev_rx.c | 202 queue->udm = RTE_PTR_ADD(ark->udm.v, qidx * ARK_UDM_QOFFSET); in eth_ark_dev_rx_queue_setup() 203 queue->mpu = RTE_PTR_ADD(ark->mpurx.v, qidx * ARK_MPU_QOFFSET); in eth_ark_dev_rx_queue_setup() 279 meta = RTE_PTR_ADD(mbuf->buf_addr, ARK_RX_META_OFFSET); in eth_ark_recv_pkts() 329 meta = RTE_PTR_ADD(mbuf->buf_addr, ARK_RX_META_OFFSET); in eth_ark_recv_pkts() 484 *(uint16_t *)RTE_PTR_ADD(mbuf_init->buf_addr, 4) = in eth_ark_rx_seed_mbufs() 659 uint8_t *dp = RTE_PTR_ADD(mbuf->buf_addr, i); in dump_mbuf_data()
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| H A D | ark_ethdev.c | 528 mpu = RTE_PTR_ADD(mpu, ARK_MPU_QOFFSET); in ark_config_device() 540 mpu = RTE_PTR_ADD(mpu, ARK_MPU_QOFFSET); in ark_config_device() 694 mpu = RTE_PTR_ADD(mpu, ARK_MPU_QOFFSET); in eth_ark_dev_stop() 713 mpu = RTE_PTR_ADD(mpu, ARK_MPU_QOFFSET); in eth_ark_dev_stop() 772 struct ark_mpu_t *tx_mpu = RTE_PTR_ADD(ark->bar0, ARK_MPU_TX_BASE); in eth_ark_dev_info_get() 773 struct ark_mpu_t *rx_mpu = RTE_PTR_ADD(ark->bar0, ARK_MPU_RX_BASE); in eth_ark_dev_info_get()
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| /dpdk/drivers/dma/idxd/ |
| H A D | idxd_pci.c | 53 return RTE_PTR_ADD(pci->wq_regs_base, in idxd_get_wq_cfg() 173 pci->grp_regs = RTE_PTR_ADD(pci->regs, grp_offset * 0x100); in init_pci_device() 175 pci->wq_regs_base = RTE_PTR_ADD(pci->regs, wq_offset * 0x100); in init_pci_device() 321 idxd.portal = RTE_PTR_ADD(idxd.u.pci->portals, in idxd_dmadev_probe_pci()
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| /dpdk/drivers/raw/ioat/ |
| H A D | idxd_pci.c | 51 return RTE_PTR_ADD(pci->wq_regs_base, in idxd_get_wq_cfg() 147 pci->grp_regs = RTE_PTR_ADD(pci->regs, grp_offset * 0x100); in init_pci_device() 149 pci->wq_regs_base = RTE_PTR_ADD(pci->regs, wq_offset * 0x100); in init_pci_device() 287 idxd.public.portal = RTE_PTR_ADD(idxd.u.pci->portals, in idxd_rawdev_probe_pci()
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| /dpdk/lib/graph/ |
| H A D | graph_stats.c | 161 cluster = RTE_PTR_ADD(cluster, stats->cluster_node_size); in stats_mem_populate() 171 cluster = RTE_PTR_ADD(stats, stats->sz), in stats_mem_populate() 382 cluster = RTE_PTR_ADD(cluster, stat->cluster_node_size); in rte_graph_cluster_stats_get() 406 cluster = RTE_PTR_ADD(cluster, stat->cluster_node_size); in rte_graph_cluster_stats_reset()
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| H A D | rte_graph.h | 345 node = RTE_PTR_ADD(graph, off); \ 347 off = node->next, node = RTE_PTR_ADD(graph, off), count++)
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| H A D | graph_populate.c | 55 graph->cir_start = RTE_PTR_ADD(graph, _graph->cir_start); in graph_header_popluate() 74 struct rte_node *node = RTE_PTR_ADD(graph, off); in graph_nodes_populate()
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| /dpdk/drivers/common/cpt/ |
| H A D | cpt_ucode_asym.h | 241 op = RTE_PTR_ADD(req->op, sizeof(uintptr_t)); in cpt_modex_prep() 254 dptr = RTE_PTR_ADD(req, sizeof(struct cpt_request_info)); in cpt_modex_prep() 312 op = RTE_PTR_ADD(req->op, sizeof(uintptr_t)); in cpt_rsa_prep() 317 dptr = RTE_PTR_ADD(req, sizeof(struct cpt_request_info)); in cpt_rsa_prep() 397 op = RTE_PTR_ADD(req->op, sizeof(uintptr_t)); in cpt_rsa_crt_prep() 402 dptr = RTE_PTR_ADD(req, sizeof(struct cpt_request_info)); in cpt_rsa_crt_prep() 667 dptr = RTE_PTR_ADD(req, sizeof(struct cpt_request_info)); in cpt_ecdsa_sign_prep() 774 dptr = RTE_PTR_ADD(req, sizeof(struct cpt_request_info)); in cpt_ecdsa_verify_prep() 885 dptr = RTE_PTR_ADD(req, sizeof(struct cpt_request_info)); in cpt_ecpm_prep()
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| H A D | cpt_fpm_tables.c | 1115 data = RTE_PTR_ADD(data, fpm_table_scalar[i].len); in cpt_fpm_init()
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| /dpdk/drivers/crypto/mlx5/ |
| H A D | mlx5_crypto.c | 375 RTE_PTR_ADD(umr, priv->umr_wqe_size)) - 1; in mlx5_crypto_wqe_set() 402 cseg = RTE_PTR_ADD(cseg, priv->umr_wqe_size); in mlx5_crypto_wqe_set() 403 klms = RTE_PTR_ADD(cseg, sizeof(struct mlx5_rdma_write_wqe)); in mlx5_crypto_wqe_set() 451 umr = RTE_PTR_ADD(qp->qp_obj.umem_buf, in mlx5_crypto_enqueue_burst() 530 struct mlx5_wqe_cseg *cseg = RTE_PTR_ADD(qp->qp_obj.umem_buf, in mlx5_crypto_qp_init() 535 (struct mlx5_wqe_umr_bsf_seg *)(RTE_PTR_ADD(cseg, in mlx5_crypto_qp_init() 552 cseg = RTE_PTR_ADD(cseg, priv->umr_wqe_size); in mlx5_crypto_qp_init() 576 i < qp->entries_n; i++, umr = RTE_PTR_ADD(umr, priv->wqe_set_size)) { in mlx5_crypto_indirect_mkeys_prepare()
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| /dpdk/drivers/net/avp/ |
| H A D | avp_ethdev.c | 353 return RTE_PTR_ADD(RTE_PTR_SUB(host_mbuf_address, in avp_dev_translate_buffer() 384 addr = RTE_PTR_ADD(addr, (uintptr_t)offset); in avp_dev_translate_address() 679 RTE_PTR_ADD(registers, in avp_dev_interrupt_handler() 685 RTE_PTR_ADD(registers, in avp_dev_interrupt_handler() 703 RTE_PTR_ADD(registers, in avp_dev_interrupt_handler() 802 value = AVP_READ32(RTE_PTR_ADD(registers, in avp_dev_migration_pending() 807 RTE_PTR_ADD(registers, in avp_dev_migration_pending() 1339 rte_memcpy(RTE_PTR_ADD(rte_pktmbuf_mtod(m, void *), in avp_dev_copy_from_buffers() 1341 RTE_PTR_ADD(pkt_data, src_offset), in avp_dev_copy_from_buffers() 1653 rte_memcpy(RTE_PTR_ADD(pkt_data, pkt_buf->data_len), in avp_dev_copy_to_buffers() [all …]
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| /dpdk/drivers/bus/vmbus/linux/ |
| H A D | vmbus_uio.c | 126 void *end_va = RTE_PTR_ADD(msl->base_va, sz); in find_max_end_va() 180 vmbus_map_addr = RTE_PTR_ADD(mapaddr, size); in vmbus_uio_map_resource_by_index() 298 vmbus_map_addr = RTE_PTR_ADD(mapaddr, file_size); in vmbus_uio_map_subchan()
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| /dpdk/drivers/common/mlx5/ |
| H A D | mlx5_common_devx.c | 143 cq_obj->db_rec = RTE_PTR_ADD(cq_obj->umem_buf, umem_dbrec); in mlx5_devx_cq_create() 262 sq_obj->db_rec = RTE_PTR_ADD(sq_obj->umem_buf, umem_dbrec); in mlx5_devx_sq_create() 403 qp_obj->db_rec = RTE_PTR_ADD(qp_obj->umem_buf, umem_dbrec); in mlx5_devx_qp_create() 503 wq_res->db_rec = RTE_PTR_ADD(umem_buf, umem_dbrec); in mlx5_devx_wq_init()
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| /dpdk/drivers/event/dsw/ |
| H A D | dsw_sort.h | 13 RTE_PTR_ADD(_ary, (_idx) * (_elem_size))
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| /dpdk/drivers/net/mlx5/ |
| H A D | mlx5_rx.h | 52 #define mlx5_mprq_buf_addr(ptr, strd_n) (RTE_PTR_ADD((ptr), \ 478 void *addr = RTE_PTR_ADD(mlx5_mprq_buf_addr(buf, strd_n), offset); in mprq_buf_to_pkt() 511 addr = RTE_PTR_ADD(addr, seg_len); in mprq_buf_to_pkt() 574 RTE_PTR_ADD(addr, len - hdrm_overlap), in mprq_buf_to_pkt()
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| /dpdk/drivers/common/mlx5/linux/ |
| H A D | mlx5_nl.c | 1580 struct nlattr *tail = RTE_PTR_ADD(nh, nh->nlmsg_len); in mlx5_nl_family_id_cb() 1581 struct nlattr *nla = RTE_PTR_ADD(nh, NLMSG_ALIGN(sizeof(*nh)) + in mlx5_nl_family_id_cb() 1585 nla = RTE_PTR_ADD(nla, NLMSG_ALIGN(nla->nla_len))) { in mlx5_nl_family_id_cb() 1677 struct nlattr *tail = RTE_PTR_ADD(nh, nh->nlmsg_len); in mlx5_nl_roce_cb() 1678 struct nlattr *nla = RTE_PTR_ADD(nh, NLMSG_ALIGN(sizeof(*nh)) + in mlx5_nl_roce_cb() 1694 nla = RTE_PTR_ADD(nla, NLMSG_ALIGN(nla->nla_len)); in mlx5_nl_roce_cb() 1959 hdr = RTE_PTR_ADD(hdr, aligned_len); in mlx5_nl_read_events()
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| /dpdk/lib/latencystats/ |
| H A D | rte_latencystats.c | 88 stats_ptr = RTE_PTR_ADD(glob_stats, in rte_latencystats_update() 110 stats_ptr = RTE_PTR_ADD(glob_stats, in rte_latencystats_fill_values()
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