Searched refs:N_PORTS (Results 1 – 4 of 4) sorted by relevance
29 struct rte_ring *rings_rx[N_PORTS];30 struct rte_ring *rings_tx[N_PORTS];33 uint32_t port_in_id[N_PORTS];34 uint32_t port_out_id[N_PORTS];36 uint32_t table_id[N_PORTS*2];81 for (i = 0; i < N_PORTS; i++) in app_free_resources()108 for (i = 0; i < N_PORTS; i++) { in app_init_rings()124 for (i = 0; i < N_PORTS; i++) { in app_init_rings()
29 #define N_PORTS 2 macro117 extern struct rte_ring *rings_rx[N_PORTS];118 extern struct rte_ring *rings_tx[N_PORTS];120 extern uint32_t port_in_id[N_PORTS];121 extern uint32_t port_out_id[N_PORTS];123 extern uint32_t table_id[N_PORTS*2];
255 for (i = 0; i < N_PORTS; i++) { in setup_pipeline()281 for (i = 0; i < N_PORTS; i++) { in setup_pipeline()305 for (i = 0; i < N_PORTS; i++) { in setup_pipeline()327 for (i = 0; i < N_PORTS; i++) in setup_pipeline()336 for (i = 0; i < N_PORTS; i++) { in setup_pipeline()388 for (i = 0; i < N_PORTS ; i++) in setup_pipeline()417 for (i = 0; i < N_PORTS; i++) in test_pipeline_single_filter()431 for (i = 0; i < N_PORTS; i++) in test_pipeline_single_filter()432 for (j = 0; j < N_PORTS; j++) { in test_pipeline_single_filter()454 for (i = 0; i < N_PORTS; i++) in test_pipeline_single_filter()[all …]
355 for (i = 0; i < N_PORTS; i++) { in setup_acl_pipeline()381 for (i = 0; i < N_PORTS; i++) { in setup_acl_pipeline()403 for (i = 0; i < N_PORTS; i++) { in setup_acl_pipeline()444 for (i = 0; i < N_PORTS; i++) { in setup_acl_pipeline()455 for (i = 0; i < N_PORTS; i++) { in setup_acl_pipeline()499 for (i = 0; i < N_PORTS; i++) { in setup_acl_pipeline()535 for (i = 0; i < N_PORTS; i++) { in setup_acl_pipeline()625 for (i = 0; i < N_PORTS ; i++) in setup_acl_pipeline()649 for (i = 0; i < N_PORTS; i++) { in test_pipeline_single_filter()677 for (i = 0; i< N_PORTS; i++) in test_pipeline_single_filter()[all …]