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Searched refs:LS16 (Results 1 – 6 of 6) sorted by relevance

/dpdk/drivers/net/ngbe/base/
H A Dngbe_phy_mvl.h31 #define MVL_FANA_SYM_PAUSE LS16(1, 7, 0x3)
32 #define MVL_FANA_ASM_PAUSE LS16(2, 7, 0x3)
46 #define MVL_PHYSR_SPEED_1000M LS16(2, 14, 0x3)
47 #define MVL_PHYSR_SPEED_100M LS16(1, 14, 0x3)
48 #define MVL_PHYSR_SPEED_10M LS16(0, 14, 0x3)
64 #define MVL_LEDFCR_CTL1_CONF LS16(6, 4, 0xF)
66 #define MVL_LEDFCR_CTL0_CONF LS16(1, 0, 0xF)
69 #define MVL_LEDPCR_CTL1_CONF LS16(1, 2, 0x3)
71 #define MVL_LEDPCR_CTL0_CONF LS16(1, 0, 0x3)
78 #define MVL_GEN_CTL_MODE(v) LS16(v, 0, 0x7)
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H A Dngbe_phy_yt.h20 #define YT_CHIP_MODE_SEL(v) LS16(v, 0, 0x7)
28 #define YT_RGMII_CONF2_SPEED(v) LS16(v, 6, 0x3)
62 #define YT_SPST_SPEED_1000M LS16(2, 14, 0x3)
63 #define YT_SPST_SPEED_100M LS16(1, 14, 0x3)
64 #define YT_SPST_SPEED_10M LS16(0, 14, 0x3)
H A Dngbe_phy_rtl.h47 #define RTL_PHYSR_SPEED_RES LS16(3, 4, 0x3)
48 #define RTL_PHYSR_SPEED_1000M LS16(2, 4, 0x3)
49 #define RTL_PHYSR_SPEED_100M LS16(1, 4, 0x3)
50 #define RTL_PHYSR_SPEED_10M LS16(0, 4, 0x3)
H A Dngbe_regs.h21 #define LS16(val, shift, mask) (((u16)(val) & (u16)(mask)) << (shift)) macro
/dpdk/drivers/net/txgbe/base/
H A Dtxgbe_phy.h19 #define SR_PCS_CTRL2_TYPE_SEL_R LS16(0, 0, 0x3)
20 #define SR_PCS_CTRL2_TYPE_SEL_X LS16(1, 0, 0x3)
21 #define SR_PCS_CTRL2_TYPE_SEL_W LS16(2, 0, 0x3)
26 #define SR_PMA_CTRL1_SS13_KX LS16(0, 13, 0x1)
27 #define SR_PMA_CTRL1_SS13_KX4 LS16(1, 13, 0x1)
H A Dtxgbe_regs.h21 #define LS16(val, shift, mask) (((u16)(val) & (u16)(mask)) << (shift)) macro