Searched refs:IGC_EIMC (Results 1 – 2 of 2) sorted by relevance
70 #define IGC_EIMC 0x01528 /* Ext. Interrupt Mask Clear - WO */ macro
384 IGC_WRITE_REG(hw, IGC_EIMC, 1u << IGC_MSIX_OTHER_INTR_VEC); in igc_intr_other_disable()622 IGC_WRITE_REG(hw, IGC_EIMC, 0x1f); in eth_igc_stop()922 IGC_WRITE_REG(hw, IGC_EIMC, 0x1f); in eth_igc_start()2093 IGC_WRITE_REG(hw, IGC_EIMC, mask); in eth_igc_rx_queue_intr_disable()