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Searched refs:I40E_MASK (Results 1 – 4 of 4) sorted by relevance

/dpdk/drivers/net/i40e/base/
H A Di40e_register.h18 #define I40E_GL_ARQH_ARQH_MASK I40E_MASK(0x3FF, I40E_GL_ARQH_ARQH_SHIFT)
21 #define I40E_GL_ARQT_ARQT_MASK I40E_MASK(0x3FF, I40E_GL_ARQT_ARQT_SHIFT)
372 I40E_MASK(0x30, I40E_GL_FWSTS_FWS1B_SHIFT)
374 I40E_MASK(0x31, I40E_GL_FWSTS_FWS1B_SHIFT)
376 I40E_MASK(0x32, I40E_GL_FWSTS_FWS1B_SHIFT)
378 I40E_MASK(0x33, I40E_GL_FWSTS_FWS1B_SHIFT)
380 I40E_MASK(0xB, I40E_GL_FWSTS_FWS1B_SHIFT)
382 I40E_MASK(0xC, I40E_GL_FWSTS_FWS1B_SHIFT)
1418 I40E_MASK(0x7, I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT)
2920 I40E_MASK(0x1, I40E_PRTTSYN_AUX_0_PTPFLAG_SHIFT)
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H A Di40e_type.h32 #ifndef I40E_MASK
34 #define I40E_MASK(mask, shift) (mask << shift) macro
137 #define I40E_MDIO_CLAUSE22_STCODE_MASK I40E_MASK(1, \
139 #define I40E_MDIO_CLAUSE22_OPCODE_WRITE_MASK I40E_MASK(1, \
141 #define I40E_MDIO_CLAUSE22_OPCODE_READ_MASK I40E_MASK(2, \
144 #define I40E_MDIO_CLAUSE45_STCODE_MASK I40E_MASK(0, \
146 #define I40E_MDIO_CLAUSE45_OPCODE_ADDRESS_MASK I40E_MASK(0, \
148 #define I40E_MDIO_CLAUSE45_OPCODE_WRITE_MASK I40E_MASK(1, \
150 #define I40E_MDIO_CLAUSE45_OPCODE_READ_INC_ADDR_MASK I40E_MASK(2, \
152 #define I40E_MDIO_CLAUSE45_OPCODE_READ_MASK I40E_MASK(3, \
/dpdk/drivers/net/i40e/
H A Di40e_ethdev.h203 I40E_MASK(0xFFFF, I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_SHIFT)
H A Di40e_ethdev.c981 #define I40E_L2_TAGS_S_TAG_MASK I40E_MASK(0x1, I40E_L2_TAGS_S_TAG_SHIFT)