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Searched refs:I40E_INSET_DST_PORT (Results 1 – 4 of 4) sorted by relevance

/dpdk/drivers/net/i40e/
H A Di40e_hash.c115 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT },
118 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT },
121 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT | I40E_INSET_SCTP_VT },
131 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT },
134 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT },
137 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT | I40E_INSET_SCTP_VT },
140 { RTE_ETH_RSS_PORT, I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT },
455 I40E_INSET_DST_PORT | I40E_INSET_SRC_PORT)) in i40e_hash_translate_gtp_inset()
592 inset &= ~I40E_INSET_DST_PORT; in i40e_hash_get_inset()
603 inset &= ~(I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT); in i40e_hash_get_inset()
H A Di40e_ethdev.c9143 I40E_INSET_DST_PORT | I40E_INSET_SCTP_VT | in i40e_get_valid_input_set()
9175 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9180 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9185 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9191 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9196 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9218 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9223 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9228 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
9233 I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT, in i40e_get_valid_input_set()
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H A Di40e_flow.c2796 input_set |= I40E_INSET_DST_PORT; in i40e_flow_parse_fdir_pattern()
2800 (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) { in i40e_flow_parse_fdir_pattern()
2851 input_set |= I40E_INSET_DST_PORT; in i40e_flow_parse_fdir_pattern()
2855 (I40E_INSET_SRC_PORT | I40E_INSET_DST_PORT)) { in i40e_flow_parse_fdir_pattern()
2969 input_set |= I40E_INSET_DST_PORT; in i40e_flow_parse_fdir_pattern()
H A Di40e_ethdev.h223 #define I40E_INSET_DST_PORT 0x0000000000002000ULL macro