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Searched refs:HNS3_MAX_TC_NUM (Results 1 – 10 of 10) sorted by relevance

/dpdk/drivers/net/hns3/
H A Dhns3_cmd.h287 #define HNS3_MAX_TC_NUM 8 macro
292 uint16_t tx_pkt_buff[HNS3_MAX_TC_NUM];
297 uint16_t buf_num[HNS3_MAX_TC_NUM];
388 struct hns3_tc_thrd tc_thrd[HNS3_MAX_TC_NUM];
393 struct hns3_priv_buf priv_buf[HNS3_MAX_TC_NUM];
644 uint16_t rss_tc_mode[HNS3_MAX_TC_NUM];
H A Dhns3_tm.c38 pf->tm_conf.nb_nodes_max = 1 + HNS3_MAX_TC_NUM + max_tx_queues; in hns3_tm_conf_init()
39 pf->tm_conf.nb_shaper_profile_max = 1 + HNS3_MAX_TC_NUM; in hns3_tm_conf_init()
131 cap->n_nodes_max = 1 + HNS3_MAX_TC_NUM + max_tx_queues; in hns3_tm_capabilities_get()
135 cap->shaper_n_max = 1 + HNS3_MAX_TC_NUM; in hns3_tm_capabilities_get()
136 cap->shaper_private_n_max = 1 + HNS3_MAX_TC_NUM; in hns3_tm_capabilities_get()
754 cap->n_nodes_max = HNS3_MAX_TC_NUM; in hns3_tm_nonleaf_level_capsbilities_get()
755 cap->n_nodes_nonleaf_max = HNS3_MAX_TC_NUM; in hns3_tm_nonleaf_level_capsbilities_get()
769 cap->nonleaf.sched_n_children_max = HNS3_MAX_TC_NUM; in hns3_tm_nonleaf_level_capsbilities_get()
844 cap->nonleaf.sched_n_children_max = HNS3_MAX_TC_NUM; in hns3_tm_nonleaf_node_capabilities_get()
H A Dhns3_rss.c579 uint16_t tc_offset[HNS3_MAX_TC_NUM]; in hns3_set_rss_tc_mode()
580 uint8_t tc_valid[HNS3_MAX_TC_NUM]; in hns3_set_rss_tc_mode()
581 uint16_t tc_size[HNS3_MAX_TC_NUM]; in hns3_set_rss_tc_mode()
587 tc_offset, HNS3_MAX_TC_NUM); in hns3_set_rss_tc_mode()
591 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_set_rss_tc_mode()
H A Dhns3_ethdev_dump.c672 struct hns3_tm_node *tc_node[HNS3_MAX_TC_NUM]; in get_tm_conf_tc_node_info()
683 if (tidx < HNS3_MAX_TC_NUM) in get_tm_conf_tc_node_info()
687 for (tidx = 0; tidx < HNS3_MAX_TC_NUM; tidx++) { in get_tm_conf_tc_node_info()
725 HNS3_MAX_TC_NUM); in get_tm_conf_queue_format_info()
H A Dhns3_ethdev.h121 uint8_t tc_dwrr[HNS3_MAX_TC_NUM];
138 struct hns3_tc_info tc_info[HNS3_MAX_TC_NUM];
537 struct hns3_tc_queue_info tc_queue[HNS3_MAX_TC_NUM];
H A Dhns3_dcb.h49 uint8_t tc_weight[HNS3_MAX_TC_NUM];
H A Dhns3_dcb.c249 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_dcb_ets_tc_dwrr_cfg()
686 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_tc_queue_mapping_cfg()
711 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_txq_mapped_tc_get()
792 sizeof(struct hns3_tc_info) * HNS3_MAX_TC_NUM); in hns3_dcb_info_init()
1447 sizeof(struct hns3_tc_info) * HNS3_MAX_TC_NUM); in hns3_dcb_info_cfg()
H A Dhns3_ethdev.c3023 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_tx_buffer_calc()
3055 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_tx_buffer_alloc()
3076 for (i = 0; i < HNS3_MAX_TC_NUM; i++) in hns3_get_tc_num()
3089 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_get_rx_priv_buff_alloced()
3103 for (i = 0; i < HNS3_MAX_TC_NUM; i++) in hns3_get_tx_buff_alloced()
3117 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_get_pfc_priv_num()
3135 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_get_no_pfc_priv_num()
3206 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_is_rx_buf_ok()
3228 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_rx_buf_calc_all()
3363 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_only_alloc_priv_buff()
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H A Dhns3_ethdev_vf.c944 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3vf_get_num_tc()
H A Dhns3_rxtx.c1143 for (i = 0; i < HNS3_MAX_TC_NUM; i++) { in hns3_init_tx_ring_tc()