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Searched refs:FIELD_GET (Results 1 – 7 of 7) sorted by relevance

/dpdk/drivers/common/cnxk/
H A Droc_bphy_cgx.c76 FIELD_GET(SCR0_ETH_EVT_STS_S_ACK, *scr0) == 0) in roc_bphy_cgx_wait_for_ownership()
80 if (FIELD_GET(SCR0_ETH_EVT_STS_S_EVT_TYPE, *scr0) == in roc_bphy_cgx_wait_for_ownership()
82 FIELD_GET(SCR0_ETH_EVT_STS_S_ACK, *scr0)) in roc_bphy_cgx_wait_for_ownership()
103 FIELD_GET(SCR0_ETH_EVT_STS_S_ACK, *scr0)) in roc_bphy_cgx_wait_for_ack()
116 uint8_t cmd_id = FIELD_GET(SCR1_ETH_CMD_ID, scr1); in roc_bphy_cgx_intf_req()
158 (int)FIELD_GET(SCR0_ETH_LNK_STS_S_ERR_TYPE, *scr0)); in roc_bphy_cgx_intf_req()
176 return FIELD_GET(cgx_id, roc_cgx->bar0_pa); in roc_bphy_cgx_dev_id()
193 val = FIELD_GET(CGX_CMRX_RX_LMACS_LMACS, val); in roc_bphy_cgx_dev_init()
340 info->an = FIELD_GET(SCR0_ETH_LNK_STS_S_AN, scr0); in roc_bphy_cgx_get_linkinfo()
341 info->fec = FIELD_GET(SCR0_ETH_LNK_STS_S_FEC, scr0); in roc_bphy_cgx_get_linkinfo()
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H A Droc_bitfield.h12 #define FIELD_GET(mask, reg) \ macro
/dpdk/drivers/net/nfp/nfpcore/
H A Dnfp_nsp_eth.c19 #define FIELD_GET(_mask, _reg) \ macro
180 dst->eth_index = FIELD_GET(NSP_ETH_PORT_INDEX, port); in nfp_eth_port_translate()
184 dst->lanes = FIELD_GET(NSP_ETH_PORT_LANES, port); in nfp_eth_port_translate()
186 dst->enabled = FIELD_GET(NSP_ETH_STATE_ENABLED, state); in nfp_eth_port_translate()
194 dst->media = FIELD_GET(NSP_ETH_STATE_MEDIA, state); in nfp_eth_port_translate()
198 dst->label_port = FIELD_GET(NSP_ETH_PORT_PHYLABEL, port); in nfp_eth_port_translate()
199 dst->label_subport = FIELD_GET(NSP_ETH_PORT_LABEL, port); in nfp_eth_port_translate()
205 dst->aneg = FIELD_GET(NSP_ETH_STATE_ANEG, state); in nfp_eth_port_translate()
210 fec = FIELD_GET(NSP_ETH_PORT_FEC_SUPP_BASER, port); in nfp_eth_port_translate()
212 fec = FIELD_GET(NSP_ETH_PORT_FEC_SUPP_RS, port); in nfp_eth_port_translate()
[all …]
H A Dnfp_nsp.c83 if (FIELD_GET(NSP_STATUS_MAGIC, reg) != NSP_MAGIC) { in nfp_nsp_check()
88 state->ver.major = FIELD_GET(NSP_STATUS_MAJOR, reg); in nfp_nsp_check()
89 state->ver.minor = FIELD_GET(NSP_STATUS_MINOR, reg); in nfp_nsp_check()
265 ret_val = FIELD_GET(NSP_COMMAND_OPTION, ret_val); in nfp_nsp_command()
267 err = FIELD_GET(NSP_STATUS_RESULT, reg); in nfp_nsp_command()
305 if (FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M < max_size) { in nfp_nsp_command_buf()
309 FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M, in nfp_nsp_command_buf()
321 cpp_id = FIELD_GET(NSP_BUFFER_CPP, reg) << 8; in nfp_nsp_command_buf()
322 cpp_buf = FIELD_GET(NSP_BUFFER_ADDRESS, reg); in nfp_nsp_command_buf()
H A Dnfp_nsp.h18 #define FIELD_GET(_mask, _reg) \ macro
/dpdk/drivers/dma/hisilicon/
H A Dhisi_dmadev.c153 FIELD_GET(HISI_DMA_QUEUE_FSM_STS_M, tmp) != HISI_DMA_STATE_RUN, in hisi_dma_reset_hw()
168 FIELD_GET(HISI_DMA_QUEUE_FSM_STS_M, tmp) == HISI_DMA_STATE_IDLE, in hisi_dma_reset_hw()
641 if (FIELD_GET(CQE_VALID_B, misc) != hw->cqe_vld) in hisi_dma_scan_cq()
644 csq_head = FIELD_GET(CQE_SQ_HEAD_MASK, misc); in hisi_dma_scan_cq()
646 hw->status[csq_head] = FIELD_GET(CQE_STATUS_MASK, in hisi_dma_scan_cq()
H A Dhisi_dmadev.h16 #define FIELD_GET(mask, reg) \ macro