xref: /dpdk/drivers/event/dlb2/pf/base/dlb2_regs.h (revision d4a06a39)
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2016-2020 Intel Corporation
3  */
4 
5 #ifndef __DLB2_REGS_H
6 #define __DLB2_REGS_H
7 
8 #include "dlb2_osdep_types.h"
9 
10 #define DLB2_PF_VF2PF_MAILBOX_BYTES 256
11 #define DLB2_PF_VF2PF_MAILBOX(vf_id, x) \
12 	(0x1000 + 0x4 * (x) + (vf_id) * 0x10000)
13 #define DLB2_PF_VF2PF_MAILBOX_RST 0x0
14 
15 #define DLB2_PF_VF2PF_MAILBOX_MSG	0xFFFFFFFF
16 #define DLB2_PF_VF2PF_MAILBOX_MSG_LOC	0
17 
18 #define DLB2_PF_VF2PF_MAILBOX_ISR(vf_id) \
19 	(0x1f00 + (vf_id) * 0x10000)
20 #define DLB2_PF_VF2PF_MAILBOX_ISR_RST 0x0
21 
22 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF0_ISR	0x00000001
23 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF1_ISR	0x00000002
24 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF2_ISR	0x00000004
25 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF3_ISR	0x00000008
26 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF4_ISR	0x00000010
27 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF5_ISR	0x00000020
28 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF6_ISR	0x00000040
29 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF7_ISR	0x00000080
30 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF8_ISR	0x00000100
31 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF9_ISR	0x00000200
32 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF10_ISR	0x00000400
33 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF11_ISR	0x00000800
34 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF12_ISR	0x00001000
35 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF13_ISR	0x00002000
36 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF14_ISR	0x00004000
37 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF15_ISR	0x00008000
38 #define DLB2_PF_VF2PF_MAILBOX_ISR_RSVD0	0xFFFF0000
39 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF0_ISR_LOC	0
40 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF1_ISR_LOC	1
41 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF2_ISR_LOC	2
42 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF3_ISR_LOC	3
43 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF4_ISR_LOC	4
44 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF5_ISR_LOC	5
45 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF6_ISR_LOC	6
46 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF7_ISR_LOC	7
47 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF8_ISR_LOC	8
48 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF9_ISR_LOC	9
49 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF10_ISR_LOC	10
50 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF11_ISR_LOC	11
51 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF12_ISR_LOC	12
52 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF13_ISR_LOC	13
53 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF14_ISR_LOC	14
54 #define DLB2_PF_VF2PF_MAILBOX_ISR_VF15_ISR_LOC	15
55 #define DLB2_PF_VF2PF_MAILBOX_ISR_RSVD0_LOC		16
56 
57 #define DLB2_PF_VF2PF_FLR_ISR(vf_id) \
58 	(0x1f04 + (vf_id) * 0x10000)
59 #define DLB2_PF_VF2PF_FLR_ISR_RST 0x0
60 
61 #define DLB2_PF_VF2PF_FLR_ISR_VF0_ISR	0x00000001
62 #define DLB2_PF_VF2PF_FLR_ISR_VF1_ISR	0x00000002
63 #define DLB2_PF_VF2PF_FLR_ISR_VF2_ISR	0x00000004
64 #define DLB2_PF_VF2PF_FLR_ISR_VF3_ISR	0x00000008
65 #define DLB2_PF_VF2PF_FLR_ISR_VF4_ISR	0x00000010
66 #define DLB2_PF_VF2PF_FLR_ISR_VF5_ISR	0x00000020
67 #define DLB2_PF_VF2PF_FLR_ISR_VF6_ISR	0x00000040
68 #define DLB2_PF_VF2PF_FLR_ISR_VF7_ISR	0x00000080
69 #define DLB2_PF_VF2PF_FLR_ISR_VF8_ISR	0x00000100
70 #define DLB2_PF_VF2PF_FLR_ISR_VF9_ISR	0x00000200
71 #define DLB2_PF_VF2PF_FLR_ISR_VF10_ISR	0x00000400
72 #define DLB2_PF_VF2PF_FLR_ISR_VF11_ISR	0x00000800
73 #define DLB2_PF_VF2PF_FLR_ISR_VF12_ISR	0x00001000
74 #define DLB2_PF_VF2PF_FLR_ISR_VF13_ISR	0x00002000
75 #define DLB2_PF_VF2PF_FLR_ISR_VF14_ISR	0x00004000
76 #define DLB2_PF_VF2PF_FLR_ISR_VF15_ISR	0x00008000
77 #define DLB2_PF_VF2PF_FLR_ISR_RSVD0		0xFFFF0000
78 #define DLB2_PF_VF2PF_FLR_ISR_VF0_ISR_LOC	0
79 #define DLB2_PF_VF2PF_FLR_ISR_VF1_ISR_LOC	1
80 #define DLB2_PF_VF2PF_FLR_ISR_VF2_ISR_LOC	2
81 #define DLB2_PF_VF2PF_FLR_ISR_VF3_ISR_LOC	3
82 #define DLB2_PF_VF2PF_FLR_ISR_VF4_ISR_LOC	4
83 #define DLB2_PF_VF2PF_FLR_ISR_VF5_ISR_LOC	5
84 #define DLB2_PF_VF2PF_FLR_ISR_VF6_ISR_LOC	6
85 #define DLB2_PF_VF2PF_FLR_ISR_VF7_ISR_LOC	7
86 #define DLB2_PF_VF2PF_FLR_ISR_VF8_ISR_LOC	8
87 #define DLB2_PF_VF2PF_FLR_ISR_VF9_ISR_LOC	9
88 #define DLB2_PF_VF2PF_FLR_ISR_VF10_ISR_LOC	10
89 #define DLB2_PF_VF2PF_FLR_ISR_VF11_ISR_LOC	11
90 #define DLB2_PF_VF2PF_FLR_ISR_VF12_ISR_LOC	12
91 #define DLB2_PF_VF2PF_FLR_ISR_VF13_ISR_LOC	13
92 #define DLB2_PF_VF2PF_FLR_ISR_VF14_ISR_LOC	14
93 #define DLB2_PF_VF2PF_FLR_ISR_VF15_ISR_LOC	15
94 #define DLB2_PF_VF2PF_FLR_ISR_RSVD0_LOC	16
95 
96 #define DLB2_PF_VF2PF_ISR_PEND(vf_id) \
97 	(0x1f10 + (vf_id) * 0x10000)
98 #define DLB2_PF_VF2PF_ISR_PEND_RST 0x0
99 
100 #define DLB2_PF_VF2PF_ISR_PEND_ISR_PEND	0x00000001
101 #define DLB2_PF_VF2PF_ISR_PEND_RSVD0		0xFFFFFFFE
102 #define DLB2_PF_VF2PF_ISR_PEND_ISR_PEND_LOC	0
103 #define DLB2_PF_VF2PF_ISR_PEND_RSVD0_LOC	1
104 
105 #define DLB2_PF_PF2VF_MAILBOX_BYTES 64
106 #define DLB2_PF_PF2VF_MAILBOX(vf_id, x) \
107 	(0x2000 + 0x4 * (x) + (vf_id) * 0x10000)
108 #define DLB2_PF_PF2VF_MAILBOX_RST 0x0
109 
110 #define DLB2_PF_PF2VF_MAILBOX_MSG	0xFFFFFFFF
111 #define DLB2_PF_PF2VF_MAILBOX_MSG_LOC	0
112 
113 #define DLB2_PF_PF2VF_MAILBOX_ISR(vf_id) \
114 	(0x2f00 + (vf_id) * 0x10000)
115 #define DLB2_PF_PF2VF_MAILBOX_ISR_RST 0x0
116 
117 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF0_ISR	0x00000001
118 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF1_ISR	0x00000002
119 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF2_ISR	0x00000004
120 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF3_ISR	0x00000008
121 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF4_ISR	0x00000010
122 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF5_ISR	0x00000020
123 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF6_ISR	0x00000040
124 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF7_ISR	0x00000080
125 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF8_ISR	0x00000100
126 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF9_ISR	0x00000200
127 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF10_ISR	0x00000400
128 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF11_ISR	0x00000800
129 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF12_ISR	0x00001000
130 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF13_ISR	0x00002000
131 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF14_ISR	0x00004000
132 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF15_ISR	0x00008000
133 #define DLB2_PF_PF2VF_MAILBOX_ISR_RSVD0	0xFFFF0000
134 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF0_ISR_LOC	0
135 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF1_ISR_LOC	1
136 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF2_ISR_LOC	2
137 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF3_ISR_LOC	3
138 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF4_ISR_LOC	4
139 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF5_ISR_LOC	5
140 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF6_ISR_LOC	6
141 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF7_ISR_LOC	7
142 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF8_ISR_LOC	8
143 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF9_ISR_LOC	9
144 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF10_ISR_LOC	10
145 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF11_ISR_LOC	11
146 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF12_ISR_LOC	12
147 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF13_ISR_LOC	13
148 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF14_ISR_LOC	14
149 #define DLB2_PF_PF2VF_MAILBOX_ISR_VF15_ISR_LOC	15
150 #define DLB2_PF_PF2VF_MAILBOX_ISR_RSVD0_LOC		16
151 
152 #define DLB2_PF_VF_RESET_IN_PROGRESS(vf_id) \
153 	(0x3000 + (vf_id) * 0x10000)
154 #define DLB2_PF_VF_RESET_IN_PROGRESS_RST 0xffff
155 
156 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF0_RESET_IN_PROGRESS	0x00000001
157 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF1_RESET_IN_PROGRESS	0x00000002
158 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF2_RESET_IN_PROGRESS	0x00000004
159 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF3_RESET_IN_PROGRESS	0x00000008
160 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF4_RESET_IN_PROGRESS	0x00000010
161 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF5_RESET_IN_PROGRESS	0x00000020
162 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF6_RESET_IN_PROGRESS	0x00000040
163 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF7_RESET_IN_PROGRESS	0x00000080
164 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF8_RESET_IN_PROGRESS	0x00000100
165 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF9_RESET_IN_PROGRESS	0x00000200
166 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF10_RESET_IN_PROGRESS	0x00000400
167 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF11_RESET_IN_PROGRESS	0x00000800
168 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF12_RESET_IN_PROGRESS	0x00001000
169 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF13_RESET_IN_PROGRESS	0x00002000
170 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF14_RESET_IN_PROGRESS	0x00004000
171 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF15_RESET_IN_PROGRESS	0x00008000
172 #define DLB2_PF_VF_RESET_IN_PROGRESS_RSVD0			0xFFFF0000
173 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF0_RESET_IN_PROGRESS_LOC	0
174 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF1_RESET_IN_PROGRESS_LOC	1
175 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF2_RESET_IN_PROGRESS_LOC	2
176 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF3_RESET_IN_PROGRESS_LOC	3
177 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF4_RESET_IN_PROGRESS_LOC	4
178 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF5_RESET_IN_PROGRESS_LOC	5
179 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF6_RESET_IN_PROGRESS_LOC	6
180 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF7_RESET_IN_PROGRESS_LOC	7
181 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF8_RESET_IN_PROGRESS_LOC	8
182 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF9_RESET_IN_PROGRESS_LOC	9
183 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF10_RESET_IN_PROGRESS_LOC	10
184 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF11_RESET_IN_PROGRESS_LOC	11
185 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF12_RESET_IN_PROGRESS_LOC	12
186 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF13_RESET_IN_PROGRESS_LOC	13
187 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF14_RESET_IN_PROGRESS_LOC	14
188 #define DLB2_PF_VF_RESET_IN_PROGRESS_VF15_RESET_IN_PROGRESS_LOC	15
189 #define DLB2_PF_VF_RESET_IN_PROGRESS_RSVD0_LOC			16
190 
191 #define DLB2_MSIX_VECTOR_CTRL(x) \
192 	(0x100000c + (x) * 0x10)
193 #define DLB2_MSIX_VECTOR_CTRL_RST 0x1
194 
195 #define DLB2_MSIX_VECTOR_CTRL_VEC_MASK	0x00000001
196 #define DLB2_MSIX_VECTOR_CTRL_RSVD0		0xFFFFFFFE
197 #define DLB2_MSIX_VECTOR_CTRL_VEC_MASK_LOC	0
198 #define DLB2_MSIX_VECTOR_CTRL_RSVD0_LOC	1
199 
200 #define DLB2_IOSF_FUNC_VF_BAR_DSBL(x) \
201 	(0x20 + (x) * 0x4)
202 #define DLB2_IOSF_FUNC_VF_BAR_DSBL_RST 0x0
203 
204 #define DLB2_IOSF_FUNC_VF_BAR_DSBL_FUNC_VF_BAR_DIS	0x00000001
205 #define DLB2_IOSF_FUNC_VF_BAR_DSBL_RSVD0		0xFFFFFFFE
206 #define DLB2_IOSF_FUNC_VF_BAR_DSBL_FUNC_VF_BAR_DIS_LOC	0
207 #define DLB2_IOSF_FUNC_VF_BAR_DSBL_RSVD0_LOC			1
208 
209 #define DLB2_V2SYS_TOTAL_VAS 0x1000011c
210 #define DLB2_V2_5SYS_TOTAL_VAS 0x10000114
211 #define DLB2_SYS_TOTAL_VAS(ver) \
212 	(ver == DLB2_HW_V2 ? \
213 	 DLB2_V2SYS_TOTAL_VAS : \
214 	 DLB2_V2_5SYS_TOTAL_VAS)
215 #define DLB2_SYS_TOTAL_VAS_RST 0x20
216 
217 #define DLB2_SYS_TOTAL_VAS_TOTAL_VAS	0xFFFFFFFF
218 #define DLB2_SYS_TOTAL_VAS_TOTAL_VAS_LOC	0
219 
220 #define DLB2_SYS_TOTAL_DIR_CRDS 0x10000108
221 #define DLB2_SYS_TOTAL_DIR_CRDS_RST 0x1000
222 
223 #define DLB2_SYS_TOTAL_DIR_CRDS_TOTAL_DIR_CREDITS	0xFFFFFFFF
224 #define DLB2_SYS_TOTAL_DIR_CRDS_TOTAL_DIR_CREDITS_LOC	0
225 
226 #define DLB2_SYS_TOTAL_LDB_CRDS 0x10000104
227 #define DLB2_SYS_TOTAL_LDB_CRDS_RST 0x2000
228 
229 #define DLB2_SYS_TOTAL_LDB_CRDS_TOTAL_LDB_CREDITS	0xFFFFFFFF
230 #define DLB2_SYS_TOTAL_LDB_CRDS_TOTAL_LDB_CREDITS_LOC	0
231 
232 #define DLB2_SYS_ALARM_PF_SYND2 0x10000508
233 #define DLB2_SYS_ALARM_PF_SYND2_RST 0x0
234 
235 #define DLB2_SYS_ALARM_PF_SYND2_LOCK_ID	0x0000FFFF
236 #define DLB2_SYS_ALARM_PF_SYND2_MEAS		0x00010000
237 #define DLB2_SYS_ALARM_PF_SYND2_DEBUG	0x00FE0000
238 #define DLB2_SYS_ALARM_PF_SYND2_CQ_POP	0x01000000
239 #define DLB2_SYS_ALARM_PF_SYND2_QE_UHL	0x02000000
240 #define DLB2_SYS_ALARM_PF_SYND2_QE_ORSP	0x04000000
241 #define DLB2_SYS_ALARM_PF_SYND2_QE_VALID	0x08000000
242 #define DLB2_SYS_ALARM_PF_SYND2_CQ_INT_REARM	0x10000000
243 #define DLB2_SYS_ALARM_PF_SYND2_DSI_ERROR	0x20000000
244 #define DLB2_SYS_ALARM_PF_SYND2_RSVD0	0xC0000000
245 #define DLB2_SYS_ALARM_PF_SYND2_LOCK_ID_LOC		0
246 #define DLB2_SYS_ALARM_PF_SYND2_MEAS_LOC		16
247 #define DLB2_SYS_ALARM_PF_SYND2_DEBUG_LOC		17
248 #define DLB2_SYS_ALARM_PF_SYND2_CQ_POP_LOC		24
249 #define DLB2_SYS_ALARM_PF_SYND2_QE_UHL_LOC		25
250 #define DLB2_SYS_ALARM_PF_SYND2_QE_ORSP_LOC		26
251 #define DLB2_SYS_ALARM_PF_SYND2_QE_VALID_LOC		27
252 #define DLB2_SYS_ALARM_PF_SYND2_CQ_INT_REARM_LOC	28
253 #define DLB2_SYS_ALARM_PF_SYND2_DSI_ERROR_LOC	29
254 #define DLB2_SYS_ALARM_PF_SYND2_RSVD0_LOC		30
255 
256 #define DLB2_SYS_ALARM_PF_SYND1 0x10000504
257 #define DLB2_SYS_ALARM_PF_SYND1_RST 0x0
258 
259 #define DLB2_SYS_ALARM_PF_SYND1_DSI		0x0000FFFF
260 #define DLB2_SYS_ALARM_PF_SYND1_QID		0x00FF0000
261 #define DLB2_SYS_ALARM_PF_SYND1_QTYPE	0x03000000
262 #define DLB2_SYS_ALARM_PF_SYND1_QPRI		0x1C000000
263 #define DLB2_SYS_ALARM_PF_SYND1_MSG_TYPE	0xE0000000
264 #define DLB2_SYS_ALARM_PF_SYND1_DSI_LOC	0
265 #define DLB2_SYS_ALARM_PF_SYND1_QID_LOC	16
266 #define DLB2_SYS_ALARM_PF_SYND1_QTYPE_LOC	24
267 #define DLB2_SYS_ALARM_PF_SYND1_QPRI_LOC	26
268 #define DLB2_SYS_ALARM_PF_SYND1_MSG_TYPE_LOC	29
269 
270 #define DLB2_SYS_ALARM_PF_SYND0 0x10000500
271 #define DLB2_SYS_ALARM_PF_SYND0_RST 0x0
272 
273 #define DLB2_SYS_ALARM_PF_SYND0_SYNDROME	0x000000FF
274 #define DLB2_SYS_ALARM_PF_SYND0_RTYPE	0x00000300
275 #define DLB2_SYS_ALARM_PF_SYND0_RSVD0	0x00001C00
276 #define DLB2_SYS_ALARM_PF_SYND0_IS_LDB	0x00002000
277 #define DLB2_SYS_ALARM_PF_SYND0_CLS		0x0000C000
278 #define DLB2_SYS_ALARM_PF_SYND0_AID		0x003F0000
279 #define DLB2_SYS_ALARM_PF_SYND0_UNIT		0x03C00000
280 #define DLB2_SYS_ALARM_PF_SYND0_SOURCE	0x3C000000
281 #define DLB2_SYS_ALARM_PF_SYND0_MORE		0x40000000
282 #define DLB2_SYS_ALARM_PF_SYND0_VALID	0x80000000
283 #define DLB2_SYS_ALARM_PF_SYND0_SYNDROME_LOC	0
284 #define DLB2_SYS_ALARM_PF_SYND0_RTYPE_LOC	8
285 #define DLB2_SYS_ALARM_PF_SYND0_RSVD0_LOC	10
286 #define DLB2_SYS_ALARM_PF_SYND0_IS_LDB_LOC	13
287 #define DLB2_SYS_ALARM_PF_SYND0_CLS_LOC	14
288 #define DLB2_SYS_ALARM_PF_SYND0_AID_LOC	16
289 #define DLB2_SYS_ALARM_PF_SYND0_UNIT_LOC	22
290 #define DLB2_SYS_ALARM_PF_SYND0_SOURCE_LOC	26
291 #define DLB2_SYS_ALARM_PF_SYND0_MORE_LOC	30
292 #define DLB2_SYS_ALARM_PF_SYND0_VALID_LOC	31
293 
294 #define DLB2_SYS_VF_LDB_VPP_V(x) \
295 	(0x10000f00 + (x) * 0x1000)
296 #define DLB2_SYS_VF_LDB_VPP_V_RST 0x0
297 
298 #define DLB2_SYS_VF_LDB_VPP_V_VPP_V	0x00000001
299 #define DLB2_SYS_VF_LDB_VPP_V_RSVD0	0xFFFFFFFE
300 #define DLB2_SYS_VF_LDB_VPP_V_VPP_V_LOC	0
301 #define DLB2_SYS_VF_LDB_VPP_V_RSVD0_LOC	1
302 
303 #define DLB2_SYS_VF_LDB_VPP2PP(x) \
304 	(0x10000f04 + (x) * 0x1000)
305 #define DLB2_SYS_VF_LDB_VPP2PP_RST 0x0
306 
307 #define DLB2_SYS_VF_LDB_VPP2PP_PP	0x0000003F
308 #define DLB2_SYS_VF_LDB_VPP2PP_RSVD0	0xFFFFFFC0
309 #define DLB2_SYS_VF_LDB_VPP2PP_PP_LOC	0
310 #define DLB2_SYS_VF_LDB_VPP2PP_RSVD0_LOC	6
311 
312 #define DLB2_SYS_VF_DIR_VPP_V(x) \
313 	(0x10000f08 + (x) * 0x1000)
314 #define DLB2_SYS_VF_DIR_VPP_V_RST 0x0
315 
316 #define DLB2_SYS_VF_DIR_VPP_V_VPP_V	0x00000001
317 #define DLB2_SYS_VF_DIR_VPP_V_RSVD0	0xFFFFFFFE
318 #define DLB2_SYS_VF_DIR_VPP_V_VPP_V_LOC	0
319 #define DLB2_SYS_VF_DIR_VPP_V_RSVD0_LOC	1
320 
321 #define DLB2_SYS_VF_DIR_VPP2PP(x) \
322 	(0x10000f0c + (x) * 0x1000)
323 #define DLB2_SYS_VF_DIR_VPP2PP_RST 0x0
324 
325 #define DLB2_SYS_VF_DIR_VPP2PP_PP	0x0000003F
326 #define DLB2_SYS_VF_DIR_VPP2PP_RSVD0	0xFFFFFFC0
327 #define DLB2_SYS_VF_DIR_VPP2PP_PP_LOC	0
328 #define DLB2_SYS_VF_DIR_VPP2PP_RSVD0_LOC	6
329 
330 #define DLB2_SYS_VF_LDB_VQID_V(x) \
331 	(0x10000f10 + (x) * 0x1000)
332 #define DLB2_SYS_VF_LDB_VQID_V_RST 0x0
333 
334 #define DLB2_SYS_VF_LDB_VQID_V_VQID_V	0x00000001
335 #define DLB2_SYS_VF_LDB_VQID_V_RSVD0		0xFFFFFFFE
336 #define DLB2_SYS_VF_LDB_VQID_V_VQID_V_LOC	0
337 #define DLB2_SYS_VF_LDB_VQID_V_RSVD0_LOC	1
338 
339 #define DLB2_SYS_VF_LDB_VQID2QID(x) \
340 	(0x10000f14 + (x) * 0x1000)
341 #define DLB2_SYS_VF_LDB_VQID2QID_RST 0x0
342 
343 #define DLB2_SYS_VF_LDB_VQID2QID_QID		0x0000001F
344 #define DLB2_SYS_VF_LDB_VQID2QID_RSVD0	0xFFFFFFE0
345 #define DLB2_SYS_VF_LDB_VQID2QID_QID_LOC	0
346 #define DLB2_SYS_VF_LDB_VQID2QID_RSVD0_LOC	5
347 
348 #define DLB2_SYS_LDB_QID2VQID(x) \
349 	(0x10000f18 + (x) * 0x1000)
350 #define DLB2_SYS_LDB_QID2VQID_RST 0x0
351 
352 #define DLB2_SYS_LDB_QID2VQID_VQID	0x0000001F
353 #define DLB2_SYS_LDB_QID2VQID_RSVD0	0xFFFFFFE0
354 #define DLB2_SYS_LDB_QID2VQID_VQID_LOC	0
355 #define DLB2_SYS_LDB_QID2VQID_RSVD0_LOC	5
356 
357 #define DLB2_SYS_VF_DIR_VQID_V(x) \
358 	(0x10000f1c + (x) * 0x1000)
359 #define DLB2_SYS_VF_DIR_VQID_V_RST 0x0
360 
361 #define DLB2_SYS_VF_DIR_VQID_V_VQID_V	0x00000001
362 #define DLB2_SYS_VF_DIR_VQID_V_RSVD0		0xFFFFFFFE
363 #define DLB2_SYS_VF_DIR_VQID_V_VQID_V_LOC	0
364 #define DLB2_SYS_VF_DIR_VQID_V_RSVD0_LOC	1
365 
366 #define DLB2_SYS_VF_DIR_VQID2QID(x) \
367 	(0x10000f20 + (x) * 0x1000)
368 #define DLB2_SYS_VF_DIR_VQID2QID_RST 0x0
369 
370 #define DLB2_SYS_VF_DIR_VQID2QID_QID		0x0000003F
371 #define DLB2_SYS_VF_DIR_VQID2QID_RSVD0	0xFFFFFFC0
372 #define DLB2_SYS_VF_DIR_VQID2QID_QID_LOC	0
373 #define DLB2_SYS_VF_DIR_VQID2QID_RSVD0_LOC	6
374 
375 #define DLB2_SYS_LDB_VASQID_V(x) \
376 	(0x10000f24 + (x) * 0x1000)
377 #define DLB2_SYS_LDB_VASQID_V_RST 0x0
378 
379 #define DLB2_SYS_LDB_VASQID_V_VASQID_V	0x00000001
380 #define DLB2_SYS_LDB_VASQID_V_RSVD0		0xFFFFFFFE
381 #define DLB2_SYS_LDB_VASQID_V_VASQID_V_LOC	0
382 #define DLB2_SYS_LDB_VASQID_V_RSVD0_LOC	1
383 
384 #define DLB2_SYS_DIR_VASQID_V(x) \
385 	(0x10000f28 + (x) * 0x1000)
386 #define DLB2_SYS_DIR_VASQID_V_RST 0x0
387 
388 #define DLB2_SYS_DIR_VASQID_V_VASQID_V	0x00000001
389 #define DLB2_SYS_DIR_VASQID_V_RSVD0		0xFFFFFFFE
390 #define DLB2_SYS_DIR_VASQID_V_VASQID_V_LOC	0
391 #define DLB2_SYS_DIR_VASQID_V_RSVD0_LOC	1
392 
393 #define DLB2_SYS_ALARM_VF_SYND2(x) \
394 	(0x10000f48 + (x) * 0x1000)
395 #define DLB2_SYS_ALARM_VF_SYND2_RST 0x0
396 
397 #define DLB2_SYS_ALARM_VF_SYND2_LOCK_ID	0x0000FFFF
398 #define DLB2_SYS_ALARM_VF_SYND2_DEBUG	0x00FF0000
399 #define DLB2_SYS_ALARM_VF_SYND2_CQ_POP	0x01000000
400 #define DLB2_SYS_ALARM_VF_SYND2_QE_UHL	0x02000000
401 #define DLB2_SYS_ALARM_VF_SYND2_QE_ORSP	0x04000000
402 #define DLB2_SYS_ALARM_VF_SYND2_QE_VALID	0x08000000
403 #define DLB2_SYS_ALARM_VF_SYND2_ISZ		0x10000000
404 #define DLB2_SYS_ALARM_VF_SYND2_DSI_ERROR	0x20000000
405 #define DLB2_SYS_ALARM_VF_SYND2_DLBRSVD	0xC0000000
406 #define DLB2_SYS_ALARM_VF_SYND2_LOCK_ID_LOC		0
407 #define DLB2_SYS_ALARM_VF_SYND2_DEBUG_LOC		16
408 #define DLB2_SYS_ALARM_VF_SYND2_CQ_POP_LOC		24
409 #define DLB2_SYS_ALARM_VF_SYND2_QE_UHL_LOC		25
410 #define DLB2_SYS_ALARM_VF_SYND2_QE_ORSP_LOC		26
411 #define DLB2_SYS_ALARM_VF_SYND2_QE_VALID_LOC		27
412 #define DLB2_SYS_ALARM_VF_SYND2_ISZ_LOC		28
413 #define DLB2_SYS_ALARM_VF_SYND2_DSI_ERROR_LOC	29
414 #define DLB2_SYS_ALARM_VF_SYND2_DLBRSVD_LOC		30
415 
416 #define DLB2_SYS_ALARM_VF_SYND1(x) \
417 	(0x10000f44 + (x) * 0x1000)
418 #define DLB2_SYS_ALARM_VF_SYND1_RST 0x0
419 
420 #define DLB2_SYS_ALARM_VF_SYND1_DSI		0x0000FFFF
421 #define DLB2_SYS_ALARM_VF_SYND1_QID		0x00FF0000
422 #define DLB2_SYS_ALARM_VF_SYND1_QTYPE	0x03000000
423 #define DLB2_SYS_ALARM_VF_SYND1_QPRI		0x1C000000
424 #define DLB2_SYS_ALARM_VF_SYND1_MSG_TYPE	0xE0000000
425 #define DLB2_SYS_ALARM_VF_SYND1_DSI_LOC	0
426 #define DLB2_SYS_ALARM_VF_SYND1_QID_LOC	16
427 #define DLB2_SYS_ALARM_VF_SYND1_QTYPE_LOC	24
428 #define DLB2_SYS_ALARM_VF_SYND1_QPRI_LOC	26
429 #define DLB2_SYS_ALARM_VF_SYND1_MSG_TYPE_LOC	29
430 
431 #define DLB2_SYS_ALARM_VF_SYND0(x) \
432 	(0x10000f40 + (x) * 0x1000)
433 #define DLB2_SYS_ALARM_VF_SYND0_RST 0x0
434 
435 #define DLB2_SYS_ALARM_VF_SYND0_SYNDROME		0x000000FF
436 #define DLB2_SYS_ALARM_VF_SYND0_RTYPE		0x00000300
437 #define DLB2_SYS_ALARM_VF_SYND0_VF_SYND0_PARITY	0x00000400
438 #define DLB2_SYS_ALARM_VF_SYND0_VF_SYND1_PARITY	0x00000800
439 #define DLB2_SYS_ALARM_VF_SYND0_VF_SYND2_PARITY	0x00001000
440 #define DLB2_SYS_ALARM_VF_SYND0_IS_LDB		0x00002000
441 #define DLB2_SYS_ALARM_VF_SYND0_CLS			0x0000C000
442 #define DLB2_SYS_ALARM_VF_SYND0_AID			0x003F0000
443 #define DLB2_SYS_ALARM_VF_SYND0_UNIT			0x03C00000
444 #define DLB2_SYS_ALARM_VF_SYND0_SOURCE		0x3C000000
445 #define DLB2_SYS_ALARM_VF_SYND0_MORE			0x40000000
446 #define DLB2_SYS_ALARM_VF_SYND0_VALID		0x80000000
447 #define DLB2_SYS_ALARM_VF_SYND0_SYNDROME_LOC		0
448 #define DLB2_SYS_ALARM_VF_SYND0_RTYPE_LOC		8
449 #define DLB2_SYS_ALARM_VF_SYND0_VF_SYND0_PARITY_LOC	10
450 #define DLB2_SYS_ALARM_VF_SYND0_VF_SYND1_PARITY_LOC	11
451 #define DLB2_SYS_ALARM_VF_SYND0_VF_SYND2_PARITY_LOC	12
452 #define DLB2_SYS_ALARM_VF_SYND0_IS_LDB_LOC		13
453 #define DLB2_SYS_ALARM_VF_SYND0_CLS_LOC		14
454 #define DLB2_SYS_ALARM_VF_SYND0_AID_LOC		16
455 #define DLB2_SYS_ALARM_VF_SYND0_UNIT_LOC		22
456 #define DLB2_SYS_ALARM_VF_SYND0_SOURCE_LOC		26
457 #define DLB2_SYS_ALARM_VF_SYND0_MORE_LOC		30
458 #define DLB2_SYS_ALARM_VF_SYND0_VALID_LOC		31
459 
460 #define DLB2_SYS_LDB_QID_CFG_V(x) \
461 	(0x10000f58 + (x) * 0x1000)
462 #define DLB2_SYS_LDB_QID_CFG_V_RST 0x0
463 
464 #define DLB2_SYS_LDB_QID_CFG_V_SN_CFG_V	0x00000001
465 #define DLB2_SYS_LDB_QID_CFG_V_FID_CFG_V	0x00000002
466 #define DLB2_SYS_LDB_QID_CFG_V_RSVD0		0xFFFFFFFC
467 #define DLB2_SYS_LDB_QID_CFG_V_SN_CFG_V_LOC	0
468 #define DLB2_SYS_LDB_QID_CFG_V_FID_CFG_V_LOC	1
469 #define DLB2_SYS_LDB_QID_CFG_V_RSVD0_LOC	2
470 
471 #define DLB2_SYS_LDB_QID_ITS(x) \
472 	(0x10000f54 + (x) * 0x1000)
473 #define DLB2_SYS_LDB_QID_ITS_RST 0x0
474 
475 #define DLB2_SYS_LDB_QID_ITS_QID_ITS	0x00000001
476 #define DLB2_SYS_LDB_QID_ITS_RSVD0	0xFFFFFFFE
477 #define DLB2_SYS_LDB_QID_ITS_QID_ITS_LOC	0
478 #define DLB2_SYS_LDB_QID_ITS_RSVD0_LOC	1
479 
480 #define DLB2_SYS_LDB_QID_V(x) \
481 	(0x10000f50 + (x) * 0x1000)
482 #define DLB2_SYS_LDB_QID_V_RST 0x0
483 
484 #define DLB2_SYS_LDB_QID_V_QID_V	0x00000001
485 #define DLB2_SYS_LDB_QID_V_RSVD0	0xFFFFFFFE
486 #define DLB2_SYS_LDB_QID_V_QID_V_LOC	0
487 #define DLB2_SYS_LDB_QID_V_RSVD0_LOC	1
488 
489 #define DLB2_SYS_DIR_QID_ITS(x) \
490 	(0x10000f64 + (x) * 0x1000)
491 #define DLB2_SYS_DIR_QID_ITS_RST 0x0
492 
493 #define DLB2_SYS_DIR_QID_ITS_QID_ITS	0x00000001
494 #define DLB2_SYS_DIR_QID_ITS_RSVD0	0xFFFFFFFE
495 #define DLB2_SYS_DIR_QID_ITS_QID_ITS_LOC	0
496 #define DLB2_SYS_DIR_QID_ITS_RSVD0_LOC	1
497 
498 #define DLB2_SYS_DIR_QID_V(x) \
499 	(0x10000f60 + (x) * 0x1000)
500 #define DLB2_SYS_DIR_QID_V_RST 0x0
501 
502 #define DLB2_SYS_DIR_QID_V_QID_V	0x00000001
503 #define DLB2_SYS_DIR_QID_V_RSVD0	0xFFFFFFFE
504 #define DLB2_SYS_DIR_QID_V_QID_V_LOC	0
505 #define DLB2_SYS_DIR_QID_V_RSVD0_LOC	1
506 
507 #define DLB2_SYS_LDB_CQ_AI_DATA(x) \
508 	(0x10000fa8 + (x) * 0x1000)
509 #define DLB2_SYS_LDB_CQ_AI_DATA_RST 0x0
510 
511 #define DLB2_SYS_LDB_CQ_AI_DATA_CQ_AI_DATA	0xFFFFFFFF
512 #define DLB2_SYS_LDB_CQ_AI_DATA_CQ_AI_DATA_LOC	0
513 
514 #define DLB2_SYS_LDB_CQ_AI_ADDR(x) \
515 	(0x10000fa4 + (x) * 0x1000)
516 #define DLB2_SYS_LDB_CQ_AI_ADDR_RST 0x0
517 
518 #define DLB2_SYS_LDB_CQ_AI_ADDR_RSVD1	0x00000003
519 #define DLB2_SYS_LDB_CQ_AI_ADDR_CQ_AI_ADDR	0x000FFFFC
520 #define DLB2_SYS_LDB_CQ_AI_ADDR_RSVD0	0xFFF00000
521 #define DLB2_SYS_LDB_CQ_AI_ADDR_RSVD1_LOC		0
522 #define DLB2_SYS_LDB_CQ_AI_ADDR_CQ_AI_ADDR_LOC	2
523 #define DLB2_SYS_LDB_CQ_AI_ADDR_RSVD0_LOC		20
524 
525 #define DLB2_V2SYS_LDB_CQ_PASID(x) \
526 	(0x10000fa0 + (x) * 0x1000)
527 #define DLB2_V2_5SYS_LDB_CQ_PASID(x) \
528 	(0x10000f9c + (x) * 0x1000)
529 #define DLB2_SYS_LDB_CQ_PASID(ver, x) \
530 	(ver == DLB2_HW_V2 ? \
531 	 DLB2_V2SYS_LDB_CQ_PASID(x) : \
532 	 DLB2_V2_5SYS_LDB_CQ_PASID(x))
533 #define DLB2_SYS_LDB_CQ_PASID_RST 0x0
534 
535 #define DLB2_SYS_LDB_CQ_PASID_PASID		0x000FFFFF
536 #define DLB2_SYS_LDB_CQ_PASID_EXE_REQ	0x00100000
537 #define DLB2_SYS_LDB_CQ_PASID_PRIV_REQ	0x00200000
538 #define DLB2_SYS_LDB_CQ_PASID_FMT2		0x00400000
539 #define DLB2_SYS_LDB_CQ_PASID_RSVD0		0xFF800000
540 #define DLB2_SYS_LDB_CQ_PASID_PASID_LOC	0
541 #define DLB2_SYS_LDB_CQ_PASID_EXE_REQ_LOC	20
542 #define DLB2_SYS_LDB_CQ_PASID_PRIV_REQ_LOC	21
543 #define DLB2_SYS_LDB_CQ_PASID_FMT2_LOC	22
544 #define DLB2_SYS_LDB_CQ_PASID_RSVD0_LOC	23
545 
546 #define DLB2_SYS_LDB_CQ_AT(x) \
547 	(0x10000f9c + (x) * 0x1000)
548 #define DLB2_SYS_LDB_CQ_AT_RST 0x0
549 
550 #define DLB2_SYS_LDB_CQ_AT_CQ_AT	0x00000003
551 #define DLB2_SYS_LDB_CQ_AT_RSVD0	0xFFFFFFFC
552 #define DLB2_SYS_LDB_CQ_AT_CQ_AT_LOC	0
553 #define DLB2_SYS_LDB_CQ_AT_RSVD0_LOC	2
554 
555 #define DLB2_SYS_LDB_CQ_ISR(x) \
556 	(0x10000f98 + (x) * 0x1000)
557 #define DLB2_SYS_LDB_CQ_ISR_RST 0x0
558 /* CQ Interrupt Modes */
559 #define DLB2_CQ_ISR_MODE_DIS  0
560 #define DLB2_CQ_ISR_MODE_MSI  1
561 #define DLB2_CQ_ISR_MODE_MSIX 2
562 #define DLB2_CQ_ISR_MODE_ADI  3
563 
564 #define DLB2_SYS_LDB_CQ_ISR_VECTOR	0x0000003F
565 #define DLB2_SYS_LDB_CQ_ISR_VF	0x000003C0
566 #define DLB2_SYS_LDB_CQ_ISR_EN_CODE	0x00000C00
567 #define DLB2_SYS_LDB_CQ_ISR_RSVD0	0xFFFFF000
568 #define DLB2_SYS_LDB_CQ_ISR_VECTOR_LOC	0
569 #define DLB2_SYS_LDB_CQ_ISR_VF_LOC		6
570 #define DLB2_SYS_LDB_CQ_ISR_EN_CODE_LOC	10
571 #define DLB2_SYS_LDB_CQ_ISR_RSVD0_LOC	12
572 
573 #define DLB2_SYS_LDB_CQ2VF_PF_RO(x) \
574 	(0x10000f94 + (x) * 0x1000)
575 #define DLB2_SYS_LDB_CQ2VF_PF_RO_RST 0x0
576 
577 #define DLB2_SYS_LDB_CQ2VF_PF_RO_VF		0x0000000F
578 #define DLB2_SYS_LDB_CQ2VF_PF_RO_IS_PF	0x00000010
579 #define DLB2_SYS_LDB_CQ2VF_PF_RO_RO		0x00000020
580 #define DLB2_SYS_LDB_CQ2VF_PF_RO_RSVD0	0xFFFFFFC0
581 #define DLB2_SYS_LDB_CQ2VF_PF_RO_VF_LOC	0
582 #define DLB2_SYS_LDB_CQ2VF_PF_RO_IS_PF_LOC	4
583 #define DLB2_SYS_LDB_CQ2VF_PF_RO_RO_LOC	5
584 #define DLB2_SYS_LDB_CQ2VF_PF_RO_RSVD0_LOC	6
585 
586 #define DLB2_SYS_LDB_PP_V(x) \
587 	(0x10000f90 + (x) * 0x1000)
588 #define DLB2_SYS_LDB_PP_V_RST 0x0
589 
590 #define DLB2_SYS_LDB_PP_V_PP_V	0x00000001
591 #define DLB2_SYS_LDB_PP_V_RSVD0	0xFFFFFFFE
592 #define DLB2_SYS_LDB_PP_V_PP_V_LOC	0
593 #define DLB2_SYS_LDB_PP_V_RSVD0_LOC	1
594 
595 #define DLB2_SYS_LDB_PP2VDEV(x) \
596 	(0x10000f8c + (x) * 0x1000)
597 #define DLB2_SYS_LDB_PP2VDEV_RST 0x0
598 
599 #define DLB2_SYS_LDB_PP2VDEV_VDEV	0x0000000F
600 #define DLB2_SYS_LDB_PP2VDEV_RSVD0	0xFFFFFFF0
601 #define DLB2_SYS_LDB_PP2VDEV_VDEV_LOC	0
602 #define DLB2_SYS_LDB_PP2VDEV_RSVD0_LOC	4
603 
604 #define DLB2_SYS_LDB_PP2VAS(x) \
605 	(0x10000f88 + (x) * 0x1000)
606 #define DLB2_SYS_LDB_PP2VAS_RST 0x0
607 
608 #define DLB2_SYS_LDB_PP2VAS_VAS	0x0000001F
609 #define DLB2_SYS_LDB_PP2VAS_RSVD0	0xFFFFFFE0
610 #define DLB2_SYS_LDB_PP2VAS_VAS_LOC		0
611 #define DLB2_SYS_LDB_PP2VAS_RSVD0_LOC	5
612 
613 #define DLB2_SYS_LDB_CQ_ADDR_U(x) \
614 	(0x10000f84 + (x) * 0x1000)
615 #define DLB2_SYS_LDB_CQ_ADDR_U_RST 0x0
616 
617 #define DLB2_SYS_LDB_CQ_ADDR_U_ADDR_U	0xFFFFFFFF
618 #define DLB2_SYS_LDB_CQ_ADDR_U_ADDR_U_LOC	0
619 
620 #define DLB2_SYS_LDB_CQ_ADDR_L(x) \
621 	(0x10000f80 + (x) * 0x1000)
622 #define DLB2_SYS_LDB_CQ_ADDR_L_RST 0x0
623 
624 #define DLB2_SYS_LDB_CQ_ADDR_L_RSVD0		0x0000003F
625 #define DLB2_SYS_LDB_CQ_ADDR_L_ADDR_L	0xFFFFFFC0
626 #define DLB2_SYS_LDB_CQ_ADDR_L_RSVD0_LOC	0
627 #define DLB2_SYS_LDB_CQ_ADDR_L_ADDR_L_LOC	6
628 
629 #define DLB2_SYS_DIR_CQ_FMT(x) \
630 	(0x10000fec + (x) * 0x1000)
631 #define DLB2_SYS_DIR_CQ_FMT_RST 0x0
632 
633 #define DLB2_SYS_DIR_CQ_FMT_KEEP_PF_PPID	0x00000001
634 #define DLB2_SYS_DIR_CQ_FMT_RSVD0		0xFFFFFFFE
635 #define DLB2_SYS_DIR_CQ_FMT_KEEP_PF_PPID_LOC	0
636 #define DLB2_SYS_DIR_CQ_FMT_RSVD0_LOC	1
637 
638 #define DLB2_SYS_DIR_CQ_AI_DATA(x) \
639 	(0x10000fe8 + (x) * 0x1000)
640 #define DLB2_SYS_DIR_CQ_AI_DATA_RST 0x0
641 
642 #define DLB2_SYS_DIR_CQ_AI_DATA_CQ_AI_DATA	0xFFFFFFFF
643 #define DLB2_SYS_DIR_CQ_AI_DATA_CQ_AI_DATA_LOC	0
644 
645 #define DLB2_SYS_DIR_CQ_AI_ADDR(x) \
646 	(0x10000fe4 + (x) * 0x1000)
647 #define DLB2_SYS_DIR_CQ_AI_ADDR_RST 0x0
648 
649 #define DLB2_SYS_DIR_CQ_AI_ADDR_RSVD1	0x00000003
650 #define DLB2_SYS_DIR_CQ_AI_ADDR_CQ_AI_ADDR	0x000FFFFC
651 #define DLB2_SYS_DIR_CQ_AI_ADDR_RSVD0	0xFFF00000
652 #define DLB2_SYS_DIR_CQ_AI_ADDR_RSVD1_LOC		0
653 #define DLB2_SYS_DIR_CQ_AI_ADDR_CQ_AI_ADDR_LOC	2
654 #define DLB2_SYS_DIR_CQ_AI_ADDR_RSVD0_LOC		20
655 
656 #define DLB2_V2SYS_DIR_CQ_PASID(x) \
657 	(0x10000fe0 + (x) * 0x1000)
658 #define DLB2_V2_5SYS_DIR_CQ_PASID(x) \
659 	(0x10000fdc + (x) * 0x1000)
660 #define DLB2_SYS_DIR_CQ_PASID(ver, x) \
661 	(ver == DLB2_HW_V2 ? \
662 	 DLB2_V2SYS_DIR_CQ_PASID(x) : \
663 	 DLB2_V2_5SYS_DIR_CQ_PASID(x))
664 #define DLB2_SYS_DIR_CQ_PASID_RST 0x0
665 
666 #define DLB2_SYS_DIR_CQ_PASID_PASID		0x000FFFFF
667 #define DLB2_SYS_DIR_CQ_PASID_EXE_REQ	0x00100000
668 #define DLB2_SYS_DIR_CQ_PASID_PRIV_REQ	0x00200000
669 #define DLB2_SYS_DIR_CQ_PASID_FMT2		0x00400000
670 #define DLB2_SYS_DIR_CQ_PASID_RSVD0		0xFF800000
671 #define DLB2_SYS_DIR_CQ_PASID_PASID_LOC	0
672 #define DLB2_SYS_DIR_CQ_PASID_EXE_REQ_LOC	20
673 #define DLB2_SYS_DIR_CQ_PASID_PRIV_REQ_LOC	21
674 #define DLB2_SYS_DIR_CQ_PASID_FMT2_LOC	22
675 #define DLB2_SYS_DIR_CQ_PASID_RSVD0_LOC	23
676 
677 #define DLB2_SYS_DIR_CQ_AT(x) \
678 	(0x10000fdc + (x) * 0x1000)
679 #define DLB2_SYS_DIR_CQ_AT_RST 0x0
680 
681 #define DLB2_SYS_DIR_CQ_AT_CQ_AT	0x00000003
682 #define DLB2_SYS_DIR_CQ_AT_RSVD0	0xFFFFFFFC
683 #define DLB2_SYS_DIR_CQ_AT_CQ_AT_LOC	0
684 #define DLB2_SYS_DIR_CQ_AT_RSVD0_LOC	2
685 
686 #define DLB2_SYS_DIR_CQ_ISR(x) \
687 	(0x10000fd8 + (x) * 0x1000)
688 #define DLB2_SYS_DIR_CQ_ISR_RST 0x0
689 
690 #define DLB2_SYS_DIR_CQ_ISR_VECTOR	0x0000003F
691 #define DLB2_SYS_DIR_CQ_ISR_VF	0x000003C0
692 #define DLB2_SYS_DIR_CQ_ISR_EN_CODE	0x00000C00
693 #define DLB2_SYS_DIR_CQ_ISR_RSVD0	0xFFFFF000
694 #define DLB2_SYS_DIR_CQ_ISR_VECTOR_LOC	0
695 #define DLB2_SYS_DIR_CQ_ISR_VF_LOC		6
696 #define DLB2_SYS_DIR_CQ_ISR_EN_CODE_LOC	10
697 #define DLB2_SYS_DIR_CQ_ISR_RSVD0_LOC	12
698 
699 #define DLB2_SYS_DIR_CQ2VF_PF_RO(x) \
700 	(0x10000fd4 + (x) * 0x1000)
701 #define DLB2_SYS_DIR_CQ2VF_PF_RO_RST 0x0
702 
703 #define DLB2_SYS_DIR_CQ2VF_PF_RO_VF		0x0000000F
704 #define DLB2_SYS_DIR_CQ2VF_PF_RO_IS_PF	0x00000010
705 #define DLB2_SYS_DIR_CQ2VF_PF_RO_RO		0x00000020
706 #define DLB2_SYS_DIR_CQ2VF_PF_RO_RSVD0	0xFFFFFFC0
707 #define DLB2_SYS_DIR_CQ2VF_PF_RO_VF_LOC	0
708 #define DLB2_SYS_DIR_CQ2VF_PF_RO_IS_PF_LOC	4
709 #define DLB2_SYS_DIR_CQ2VF_PF_RO_RO_LOC	5
710 #define DLB2_SYS_DIR_CQ2VF_PF_RO_RSVD0_LOC	6
711 
712 #define DLB2_SYS_DIR_PP_V(x) \
713 	(0x10000fd0 + (x) * 0x1000)
714 #define DLB2_SYS_DIR_PP_V_RST 0x0
715 
716 #define DLB2_SYS_DIR_PP_V_PP_V	0x00000001
717 #define DLB2_SYS_DIR_PP_V_RSVD0	0xFFFFFFFE
718 #define DLB2_SYS_DIR_PP_V_PP_V_LOC	0
719 #define DLB2_SYS_DIR_PP_V_RSVD0_LOC	1
720 
721 #define DLB2_SYS_DIR_PP2VDEV(x) \
722 	(0x10000fcc + (x) * 0x1000)
723 #define DLB2_SYS_DIR_PP2VDEV_RST 0x0
724 
725 #define DLB2_SYS_DIR_PP2VDEV_VDEV	0x0000000F
726 #define DLB2_SYS_DIR_PP2VDEV_RSVD0	0xFFFFFFF0
727 #define DLB2_SYS_DIR_PP2VDEV_VDEV_LOC	0
728 #define DLB2_SYS_DIR_PP2VDEV_RSVD0_LOC	4
729 
730 #define DLB2_SYS_DIR_PP2VAS(x) \
731 	(0x10000fc8 + (x) * 0x1000)
732 #define DLB2_SYS_DIR_PP2VAS_RST 0x0
733 
734 #define DLB2_SYS_DIR_PP2VAS_VAS	0x0000001F
735 #define DLB2_SYS_DIR_PP2VAS_RSVD0	0xFFFFFFE0
736 #define DLB2_SYS_DIR_PP2VAS_VAS_LOC		0
737 #define DLB2_SYS_DIR_PP2VAS_RSVD0_LOC	5
738 
739 #define DLB2_SYS_DIR_CQ_ADDR_U(x) \
740 	(0x10000fc4 + (x) * 0x1000)
741 #define DLB2_SYS_DIR_CQ_ADDR_U_RST 0x0
742 
743 #define DLB2_SYS_DIR_CQ_ADDR_U_ADDR_U	0xFFFFFFFF
744 #define DLB2_SYS_DIR_CQ_ADDR_U_ADDR_U_LOC	0
745 
746 #define DLB2_SYS_DIR_CQ_ADDR_L(x) \
747 	(0x10000fc0 + (x) * 0x1000)
748 #define DLB2_SYS_DIR_CQ_ADDR_L_RST 0x0
749 
750 #define DLB2_SYS_DIR_CQ_ADDR_L_RSVD0		0x0000003F
751 #define DLB2_SYS_DIR_CQ_ADDR_L_ADDR_L	0xFFFFFFC0
752 #define DLB2_SYS_DIR_CQ_ADDR_L_RSVD0_LOC	0
753 #define DLB2_SYS_DIR_CQ_ADDR_L_ADDR_L_LOC	6
754 
755 #define DLB2_SYS_PM_SMON_COMP_MASK1 0x10003024
756 #define DLB2_SYS_PM_SMON_COMP_MASK1_RST 0xffffffff
757 
758 #define DLB2_SYS_PM_SMON_COMP_MASK1_COMP_MASK1	0xFFFFFFFF
759 #define DLB2_SYS_PM_SMON_COMP_MASK1_COMP_MASK1_LOC	0
760 
761 #define DLB2_SYS_PM_SMON_COMP_MASK0 0x10003020
762 #define DLB2_SYS_PM_SMON_COMP_MASK0_RST 0xffffffff
763 
764 #define DLB2_SYS_PM_SMON_COMP_MASK0_COMP_MASK0	0xFFFFFFFF
765 #define DLB2_SYS_PM_SMON_COMP_MASK0_COMP_MASK0_LOC	0
766 
767 #define DLB2_SYS_PM_SMON_MAX_TMR 0x1000301c
768 #define DLB2_SYS_PM_SMON_MAX_TMR_RST 0x0
769 
770 #define DLB2_SYS_PM_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
771 #define DLB2_SYS_PM_SMON_MAX_TMR_MAXVALUE_LOC	0
772 
773 #define DLB2_SYS_PM_SMON_TMR 0x10003018
774 #define DLB2_SYS_PM_SMON_TMR_RST 0x0
775 
776 #define DLB2_SYS_PM_SMON_TMR_TIMER_VAL	0xFFFFFFFF
777 #define DLB2_SYS_PM_SMON_TMR_TIMER_VAL_LOC	0
778 
779 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR1 0x10003014
780 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR1_RST 0x0
781 
782 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
783 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
784 
785 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR0 0x10003010
786 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR0_RST 0x0
787 
788 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
789 #define DLB2_SYS_PM_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
790 
791 #define DLB2_SYS_PM_SMON_COMPARE1 0x1000300c
792 #define DLB2_SYS_PM_SMON_COMPARE1_RST 0x0
793 
794 #define DLB2_SYS_PM_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
795 #define DLB2_SYS_PM_SMON_COMPARE1_COMPARE1_LOC	0
796 
797 #define DLB2_SYS_PM_SMON_COMPARE0 0x10003008
798 #define DLB2_SYS_PM_SMON_COMPARE0_RST 0x0
799 
800 #define DLB2_SYS_PM_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
801 #define DLB2_SYS_PM_SMON_COMPARE0_COMPARE0_LOC	0
802 
803 #define DLB2_SYS_PM_SMON_CFG1 0x10003004
804 #define DLB2_SYS_PM_SMON_CFG1_RST 0x0
805 
806 #define DLB2_SYS_PM_SMON_CFG1_MODE0	0x000000FF
807 #define DLB2_SYS_PM_SMON_CFG1_MODE1	0x0000FF00
808 #define DLB2_SYS_PM_SMON_CFG1_RSVD	0xFFFF0000
809 #define DLB2_SYS_PM_SMON_CFG1_MODE0_LOC	0
810 #define DLB2_SYS_PM_SMON_CFG1_MODE1_LOC	8
811 #define DLB2_SYS_PM_SMON_CFG1_RSVD_LOC	16
812 
813 #define DLB2_SYS_PM_SMON_CFG0 0x10003000
814 #define DLB2_SYS_PM_SMON_CFG0_RST 0x40000000
815 
816 #define DLB2_SYS_PM_SMON_CFG0_SMON_ENABLE		0x00000001
817 #define DLB2_SYS_PM_SMON_CFG0_RSVD2			0x0000000E
818 #define DLB2_SYS_PM_SMON_CFG0_SMON0_FUNCTION		0x00000070
819 #define DLB2_SYS_PM_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
820 #define DLB2_SYS_PM_SMON_CFG0_SMON1_FUNCTION		0x00000700
821 #define DLB2_SYS_PM_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
822 #define DLB2_SYS_PM_SMON_CFG0_SMON_MODE		0x0000F000
823 #define DLB2_SYS_PM_SMON_CFG0_STOPCOUNTEROVFL	0x00010000
824 #define DLB2_SYS_PM_SMON_CFG0_INTCOUNTEROVFL		0x00020000
825 #define DLB2_SYS_PM_SMON_CFG0_STATCOUNTER0OVFL	0x00040000
826 #define DLB2_SYS_PM_SMON_CFG0_STATCOUNTER1OVFL	0x00080000
827 #define DLB2_SYS_PM_SMON_CFG0_STOPTIMEROVFL		0x00100000
828 #define DLB2_SYS_PM_SMON_CFG0_INTTIMEROVFL		0x00200000
829 #define DLB2_SYS_PM_SMON_CFG0_STATTIMEROVFL		0x00400000
830 #define DLB2_SYS_PM_SMON_CFG0_RSVD1			0x00800000
831 #define DLB2_SYS_PM_SMON_CFG0_TIMER_PRESCALE		0x1F000000
832 #define DLB2_SYS_PM_SMON_CFG0_RSVD0			0x20000000
833 #define DLB2_SYS_PM_SMON_CFG0_VERSION		0xC0000000
834 #define DLB2_SYS_PM_SMON_CFG0_SMON_ENABLE_LOC		0
835 #define DLB2_SYS_PM_SMON_CFG0_RSVD2_LOC			1
836 #define DLB2_SYS_PM_SMON_CFG0_SMON0_FUNCTION_LOC		4
837 #define DLB2_SYS_PM_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
838 #define DLB2_SYS_PM_SMON_CFG0_SMON1_FUNCTION_LOC		8
839 #define DLB2_SYS_PM_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
840 #define DLB2_SYS_PM_SMON_CFG0_SMON_MODE_LOC			12
841 #define DLB2_SYS_PM_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
842 #define DLB2_SYS_PM_SMON_CFG0_INTCOUNTEROVFL_LOC		17
843 #define DLB2_SYS_PM_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
844 #define DLB2_SYS_PM_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
845 #define DLB2_SYS_PM_SMON_CFG0_STOPTIMEROVFL_LOC		20
846 #define DLB2_SYS_PM_SMON_CFG0_INTTIMEROVFL_LOC		21
847 #define DLB2_SYS_PM_SMON_CFG0_STATTIMEROVFL_LOC		22
848 #define DLB2_SYS_PM_SMON_CFG0_RSVD1_LOC			23
849 #define DLB2_SYS_PM_SMON_CFG0_TIMER_PRESCALE_LOC		24
850 #define DLB2_SYS_PM_SMON_CFG0_RSVD0_LOC			29
851 #define DLB2_SYS_PM_SMON_CFG0_VERSION_LOC			30
852 
853 #define DLB2_SYS_SMON_COMP_MASK1(x) \
854 	(0x18002024 + (x) * 0x40)
855 #define DLB2_SYS_SMON_COMP_MASK1_RST 0xffffffff
856 
857 #define DLB2_SYS_SMON_COMP_MASK1_COMP_MASK1	0xFFFFFFFF
858 #define DLB2_SYS_SMON_COMP_MASK1_COMP_MASK1_LOC	0
859 
860 #define DLB2_SYS_SMON_COMP_MASK0(x) \
861 	(0x18002020 + (x) * 0x40)
862 #define DLB2_SYS_SMON_COMP_MASK0_RST 0xffffffff
863 
864 #define DLB2_SYS_SMON_COMP_MASK0_COMP_MASK0	0xFFFFFFFF
865 #define DLB2_SYS_SMON_COMP_MASK0_COMP_MASK0_LOC	0
866 
867 #define DLB2_SYS_SMON_MAX_TMR(x) \
868 	(0x1800201c + (x) * 0x40)
869 #define DLB2_SYS_SMON_MAX_TMR_RST 0x0
870 
871 #define DLB2_SYS_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
872 #define DLB2_SYS_SMON_MAX_TMR_MAXVALUE_LOC	0
873 
874 #define DLB2_SYS_SMON_TMR(x) \
875 	(0x18002018 + (x) * 0x40)
876 #define DLB2_SYS_SMON_TMR_RST 0x0
877 
878 #define DLB2_SYS_SMON_TMR_TIMER_VAL	0xFFFFFFFF
879 #define DLB2_SYS_SMON_TMR_TIMER_VAL_LOC	0
880 
881 #define DLB2_SYS_SMON_ACTIVITYCNTR1(x) \
882 	(0x18002014 + (x) * 0x40)
883 #define DLB2_SYS_SMON_ACTIVITYCNTR1_RST 0x0
884 
885 #define DLB2_SYS_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
886 #define DLB2_SYS_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
887 
888 #define DLB2_SYS_SMON_ACTIVITYCNTR0(x) \
889 	(0x18002010 + (x) * 0x40)
890 #define DLB2_SYS_SMON_ACTIVITYCNTR0_RST 0x0
891 
892 #define DLB2_SYS_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
893 #define DLB2_SYS_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
894 
895 #define DLB2_SYS_SMON_COMPARE1(x) \
896 	(0x1800200c + (x) * 0x40)
897 #define DLB2_SYS_SMON_COMPARE1_RST 0x0
898 
899 #define DLB2_SYS_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
900 #define DLB2_SYS_SMON_COMPARE1_COMPARE1_LOC	0
901 
902 #define DLB2_SYS_SMON_COMPARE0(x) \
903 	(0x18002008 + (x) * 0x40)
904 #define DLB2_SYS_SMON_COMPARE0_RST 0x0
905 
906 #define DLB2_SYS_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
907 #define DLB2_SYS_SMON_COMPARE0_COMPARE0_LOC	0
908 
909 #define DLB2_SYS_SMON_CFG1(x) \
910 	(0x18002004 + (x) * 0x40)
911 #define DLB2_SYS_SMON_CFG1_RST 0x0
912 
913 #define DLB2_SYS_SMON_CFG1_MODE0	0x000000FF
914 #define DLB2_SYS_SMON_CFG1_MODE1	0x0000FF00
915 #define DLB2_SYS_SMON_CFG1_RSVD	0xFFFF0000
916 #define DLB2_SYS_SMON_CFG1_MODE0_LOC	0
917 #define DLB2_SYS_SMON_CFG1_MODE1_LOC	8
918 #define DLB2_SYS_SMON_CFG1_RSVD_LOC	16
919 
920 #define DLB2_SYS_SMON_CFG0(x) \
921 	(0x18002000 + (x) * 0x40)
922 #define DLB2_SYS_SMON_CFG0_RST 0x40000000
923 
924 #define DLB2_SYS_SMON_CFG0_SMON_ENABLE		0x00000001
925 #define DLB2_SYS_SMON_CFG0_RSVD2			0x0000000E
926 #define DLB2_SYS_SMON_CFG0_SMON0_FUNCTION		0x00000070
927 #define DLB2_SYS_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
928 #define DLB2_SYS_SMON_CFG0_SMON1_FUNCTION		0x00000700
929 #define DLB2_SYS_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
930 #define DLB2_SYS_SMON_CFG0_SMON_MODE			0x0000F000
931 #define DLB2_SYS_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
932 #define DLB2_SYS_SMON_CFG0_INTCOUNTEROVFL		0x00020000
933 #define DLB2_SYS_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
934 #define DLB2_SYS_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
935 #define DLB2_SYS_SMON_CFG0_STOPTIMEROVFL		0x00100000
936 #define DLB2_SYS_SMON_CFG0_INTTIMEROVFL		0x00200000
937 #define DLB2_SYS_SMON_CFG0_STATTIMEROVFL		0x00400000
938 #define DLB2_SYS_SMON_CFG0_RSVD1			0x00800000
939 #define DLB2_SYS_SMON_CFG0_TIMER_PRESCALE		0x1F000000
940 #define DLB2_SYS_SMON_CFG0_RSVD0			0x20000000
941 #define DLB2_SYS_SMON_CFG0_VERSION			0xC0000000
942 #define DLB2_SYS_SMON_CFG0_SMON_ENABLE_LOC			0
943 #define DLB2_SYS_SMON_CFG0_RSVD2_LOC				1
944 #define DLB2_SYS_SMON_CFG0_SMON0_FUNCTION_LOC		4
945 #define DLB2_SYS_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
946 #define DLB2_SYS_SMON_CFG0_SMON1_FUNCTION_LOC		8
947 #define DLB2_SYS_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
948 #define DLB2_SYS_SMON_CFG0_SMON_MODE_LOC			12
949 #define DLB2_SYS_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
950 #define DLB2_SYS_SMON_CFG0_INTCOUNTEROVFL_LOC		17
951 #define DLB2_SYS_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
952 #define DLB2_SYS_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
953 #define DLB2_SYS_SMON_CFG0_STOPTIMEROVFL_LOC			20
954 #define DLB2_SYS_SMON_CFG0_INTTIMEROVFL_LOC			21
955 #define DLB2_SYS_SMON_CFG0_STATTIMEROVFL_LOC			22
956 #define DLB2_SYS_SMON_CFG0_RSVD1_LOC				23
957 #define DLB2_SYS_SMON_CFG0_TIMER_PRESCALE_LOC		24
958 #define DLB2_SYS_SMON_CFG0_RSVD0_LOC				29
959 #define DLB2_SYS_SMON_CFG0_VERSION_LOC			30
960 
961 #define DLB2_SYS_INGRESS_ALARM_ENBL 0x10000300
962 #define DLB2_SYS_INGRESS_ALARM_ENBL_RST 0x0
963 
964 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_HCW		0x00000001
965 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_PP		0x00000002
966 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_PASID		0x00000004
967 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_QID		0x00000008
968 #define DLB2_SYS_INGRESS_ALARM_ENBL_DISABLED_QID		0x00000010
969 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_LDB_QID_CFG	0x00000020
970 #define DLB2_SYS_INGRESS_ALARM_ENBL_RSVD0			0xFFFFFFC0
971 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_HCW_LOC		0
972 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_PP_LOC		1
973 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_PASID_LOC	2
974 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_QID_LOC		3
975 #define DLB2_SYS_INGRESS_ALARM_ENBL_DISABLED_QID_LOC		4
976 #define DLB2_SYS_INGRESS_ALARM_ENBL_ILLEGAL_LDB_QID_CFG_LOC	5
977 #define DLB2_SYS_INGRESS_ALARM_ENBL_RSVD0_LOC		6
978 
979 #define DLB2_SYS_MSIX_ACK 0x10000400
980 #define DLB2_SYS_MSIX_ACK_RST 0x0
981 
982 #define DLB2_SYS_MSIX_ACK_MSIX_0_ACK	0x00000001
983 #define DLB2_SYS_MSIX_ACK_MSIX_1_ACK	0x00000002
984 #define DLB2_SYS_MSIX_ACK_RSVD0	0xFFFFFFFC
985 #define DLB2_SYS_MSIX_ACK_MSIX_0_ACK_LOC	0
986 #define DLB2_SYS_MSIX_ACK_MSIX_1_ACK_LOC	1
987 #define DLB2_SYS_MSIX_ACK_RSVD0_LOC		2
988 
989 #define DLB2_SYS_MSIX_PASSTHRU 0x10000404
990 #define DLB2_SYS_MSIX_PASSTHRU_RST 0x0
991 
992 #define DLB2_SYS_MSIX_PASSTHRU_MSIX_0_PASSTHRU	0x00000001
993 #define DLB2_SYS_MSIX_PASSTHRU_MSIX_1_PASSTHRU	0x00000002
994 #define DLB2_SYS_MSIX_PASSTHRU_RSVD0			0xFFFFFFFC
995 #define DLB2_SYS_MSIX_PASSTHRU_MSIX_0_PASSTHRU_LOC	0
996 #define DLB2_SYS_MSIX_PASSTHRU_MSIX_1_PASSTHRU_LOC	1
997 #define DLB2_SYS_MSIX_PASSTHRU_RSVD0_LOC		2
998 
999 #define DLB2_SYS_MSIX_MODE 0x10000408
1000 #define DLB2_SYS_MSIX_MODE_RST 0x0
1001 /* MSI-X Modes */
1002 #define DLB2_MSIX_MODE_PACKED     0
1003 #define DLB2_MSIX_MODE_COMPRESSED 1
1004 
1005 #define DLB2_SYS_MSIX_MODE_MODE_V2	0x00000001
1006 #define DLB2_SYS_MSIX_MODE_POLL_MODE_V2	0x00000002
1007 #define DLB2_SYS_MSIX_MODE_POLL_MASK_V2	0x00000004
1008 #define DLB2_SYS_MSIX_MODE_POLL_LOCK_V2	0x00000008
1009 #define DLB2_SYS_MSIX_MODE_RSVD0_V2	0xFFFFFFF0
1010 #define DLB2_SYS_MSIX_MODE_MODE_V2_LOC	0
1011 #define DLB2_SYS_MSIX_MODE_POLL_MODE_V2_LOC	1
1012 #define DLB2_SYS_MSIX_MODE_POLL_MASK_V2_LOC	2
1013 #define DLB2_SYS_MSIX_MODE_POLL_LOCK_V2_LOC	3
1014 #define DLB2_SYS_MSIX_MODE_RSVD0_V2_LOC	4
1015 
1016 #define DLB2_SYS_MSIX_MODE_MODE_V2_5	0x00000001
1017 #define DLB2_SYS_MSIX_MODE_IMS_POLLING_V2_5	0x00000002
1018 #define DLB2_SYS_MSIX_MODE_RSVD0_V2_5	0xFFFFFFFC
1019 #define DLB2_SYS_MSIX_MODE_MODE_V2_5_LOC		0
1020 #define DLB2_SYS_MSIX_MODE_IMS_POLLING_V2_5_LOC	1
1021 #define DLB2_SYS_MSIX_MODE_RSVD0_V2_5_LOC		2
1022 
1023 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS 0x10000440
1024 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_RST 0x0
1025 
1026 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT	0x00000001
1027 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT	0x00000002
1028 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT	0x00000004
1029 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT	0x00000008
1030 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT	0x00000010
1031 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT	0x00000020
1032 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT	0x00000040
1033 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT	0x00000080
1034 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT	0x00000100
1035 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT	0x00000200
1036 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT	0x00000400
1037 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT	0x00000800
1038 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT	0x00001000
1039 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT	0x00002000
1040 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT	0x00004000
1041 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT	0x00008000
1042 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT	0x00010000
1043 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT	0x00020000
1044 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT	0x00040000
1045 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT	0x00080000
1046 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT	0x00100000
1047 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT	0x00200000
1048 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT	0x00400000
1049 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT	0x00800000
1050 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT	0x01000000
1051 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT	0x02000000
1052 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT	0x04000000
1053 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT	0x08000000
1054 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT	0x10000000
1055 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT	0x20000000
1056 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT	0x40000000
1057 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT	0x80000000
1058 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT_LOC	0
1059 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT_LOC	1
1060 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT_LOC	2
1061 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT_LOC	3
1062 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT_LOC	4
1063 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT_LOC	5
1064 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT_LOC	6
1065 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT_LOC	7
1066 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT_LOC	8
1067 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT_LOC	9
1068 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT_LOC	10
1069 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT_LOC	11
1070 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT_LOC	12
1071 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT_LOC	13
1072 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT_LOC	14
1073 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT_LOC	15
1074 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT_LOC	16
1075 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT_LOC	17
1076 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT_LOC	18
1077 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT_LOC	19
1078 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT_LOC	20
1079 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT_LOC	21
1080 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT_LOC	22
1081 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT_LOC	23
1082 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT_LOC	24
1083 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT_LOC	25
1084 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT_LOC	26
1085 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT_LOC	27
1086 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT_LOC	28
1087 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT_LOC	29
1088 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT_LOC	30
1089 #define DLB2_SYS_DIR_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT_LOC	31
1090 
1091 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS 0x10000444
1092 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_RST 0x0
1093 
1094 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT	0x00000001
1095 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT	0x00000002
1096 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT	0x00000004
1097 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT	0x00000008
1098 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT	0x00000010
1099 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT	0x00000020
1100 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT	0x00000040
1101 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT	0x00000080
1102 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT	0x00000100
1103 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT	0x00000200
1104 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT	0x00000400
1105 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT	0x00000800
1106 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT	0x00001000
1107 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT	0x00002000
1108 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT	0x00004000
1109 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT	0x00008000
1110 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT	0x00010000
1111 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT	0x00020000
1112 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT	0x00040000
1113 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT	0x00080000
1114 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT	0x00100000
1115 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT	0x00200000
1116 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT	0x00400000
1117 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT	0x00800000
1118 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT	0x01000000
1119 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT	0x02000000
1120 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT	0x04000000
1121 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT	0x08000000
1122 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT	0x10000000
1123 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT	0x20000000
1124 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT	0x40000000
1125 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT	0x80000000
1126 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT_LOC	0
1127 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT_LOC	1
1128 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT_LOC	2
1129 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT_LOC	3
1130 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT_LOC	4
1131 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT_LOC	5
1132 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT_LOC	6
1133 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT_LOC	7
1134 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT_LOC	8
1135 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT_LOC	9
1136 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT_LOC	10
1137 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT_LOC	11
1138 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT_LOC	12
1139 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT_LOC	13
1140 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT_LOC	14
1141 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT_LOC	15
1142 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT_LOC	16
1143 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT_LOC	17
1144 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT_LOC	18
1145 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT_LOC	19
1146 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT_LOC	20
1147 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT_LOC	21
1148 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT_LOC	22
1149 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT_LOC	23
1150 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT_LOC	24
1151 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT_LOC	25
1152 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT_LOC	26
1153 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT_LOC	27
1154 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT_LOC	28
1155 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT_LOC	29
1156 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT_LOC	30
1157 #define DLB2_SYS_DIR_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT_LOC	31
1158 
1159 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS 0x10000460
1160 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_RST 0x0
1161 
1162 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT	0x00000001
1163 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT	0x00000002
1164 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT	0x00000004
1165 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT	0x00000008
1166 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT	0x00000010
1167 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT	0x00000020
1168 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT	0x00000040
1169 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT	0x00000080
1170 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT	0x00000100
1171 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT	0x00000200
1172 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT	0x00000400
1173 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT	0x00000800
1174 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT	0x00001000
1175 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT	0x00002000
1176 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT	0x00004000
1177 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT	0x00008000
1178 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT	0x00010000
1179 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT	0x00020000
1180 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT	0x00040000
1181 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT	0x00080000
1182 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT	0x00100000
1183 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT	0x00200000
1184 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT	0x00400000
1185 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT	0x00800000
1186 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT	0x01000000
1187 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT	0x02000000
1188 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT	0x04000000
1189 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT	0x08000000
1190 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT	0x10000000
1191 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT	0x20000000
1192 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT	0x40000000
1193 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT	0x80000000
1194 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_0_OCC_INT_LOC	0
1195 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_1_OCC_INT_LOC	1
1196 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_2_OCC_INT_LOC	2
1197 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_3_OCC_INT_LOC	3
1198 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_4_OCC_INT_LOC	4
1199 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_5_OCC_INT_LOC	5
1200 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_6_OCC_INT_LOC	6
1201 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_7_OCC_INT_LOC	7
1202 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_8_OCC_INT_LOC	8
1203 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_9_OCC_INT_LOC	9
1204 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_10_OCC_INT_LOC	10
1205 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_11_OCC_INT_LOC	11
1206 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_12_OCC_INT_LOC	12
1207 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_13_OCC_INT_LOC	13
1208 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_14_OCC_INT_LOC	14
1209 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_15_OCC_INT_LOC	15
1210 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_16_OCC_INT_LOC	16
1211 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_17_OCC_INT_LOC	17
1212 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_18_OCC_INT_LOC	18
1213 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_19_OCC_INT_LOC	19
1214 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_20_OCC_INT_LOC	20
1215 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_21_OCC_INT_LOC	21
1216 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_22_OCC_INT_LOC	22
1217 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_23_OCC_INT_LOC	23
1218 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_24_OCC_INT_LOC	24
1219 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_25_OCC_INT_LOC	25
1220 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_26_OCC_INT_LOC	26
1221 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_27_OCC_INT_LOC	27
1222 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_28_OCC_INT_LOC	28
1223 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_29_OCC_INT_LOC	29
1224 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_30_OCC_INT_LOC	30
1225 #define DLB2_SYS_LDB_CQ_31_0_OCC_INT_STS_CQ_31_OCC_INT_LOC	31
1226 
1227 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS 0x10000464
1228 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_RST 0x0
1229 
1230 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT	0x00000001
1231 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT	0x00000002
1232 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT	0x00000004
1233 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT	0x00000008
1234 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT	0x00000010
1235 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT	0x00000020
1236 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT	0x00000040
1237 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT	0x00000080
1238 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT	0x00000100
1239 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT	0x00000200
1240 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT	0x00000400
1241 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT	0x00000800
1242 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT	0x00001000
1243 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT	0x00002000
1244 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT	0x00004000
1245 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT	0x00008000
1246 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT	0x00010000
1247 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT	0x00020000
1248 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT	0x00040000
1249 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT	0x00080000
1250 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT	0x00100000
1251 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT	0x00200000
1252 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT	0x00400000
1253 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT	0x00800000
1254 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT	0x01000000
1255 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT	0x02000000
1256 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT	0x04000000
1257 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT	0x08000000
1258 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT	0x10000000
1259 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT	0x20000000
1260 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT	0x40000000
1261 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT	0x80000000
1262 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_32_OCC_INT_LOC	0
1263 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_33_OCC_INT_LOC	1
1264 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_34_OCC_INT_LOC	2
1265 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_35_OCC_INT_LOC	3
1266 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_36_OCC_INT_LOC	4
1267 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_37_OCC_INT_LOC	5
1268 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_38_OCC_INT_LOC	6
1269 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_39_OCC_INT_LOC	7
1270 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_40_OCC_INT_LOC	8
1271 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_41_OCC_INT_LOC	9
1272 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_42_OCC_INT_LOC	10
1273 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_43_OCC_INT_LOC	11
1274 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_44_OCC_INT_LOC	12
1275 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_45_OCC_INT_LOC	13
1276 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_46_OCC_INT_LOC	14
1277 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_47_OCC_INT_LOC	15
1278 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_48_OCC_INT_LOC	16
1279 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_49_OCC_INT_LOC	17
1280 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_50_OCC_INT_LOC	18
1281 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_51_OCC_INT_LOC	19
1282 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_52_OCC_INT_LOC	20
1283 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_53_OCC_INT_LOC	21
1284 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_54_OCC_INT_LOC	22
1285 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_55_OCC_INT_LOC	23
1286 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_56_OCC_INT_LOC	24
1287 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_57_OCC_INT_LOC	25
1288 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_58_OCC_INT_LOC	26
1289 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_59_OCC_INT_LOC	27
1290 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_60_OCC_INT_LOC	28
1291 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_61_OCC_INT_LOC	29
1292 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_62_OCC_INT_LOC	30
1293 #define DLB2_SYS_LDB_CQ_63_32_OCC_INT_STS_CQ_63_OCC_INT_LOC	31
1294 
1295 #define DLB2_SYS_DIR_CQ_OPT_CLR 0x100004c0
1296 #define DLB2_SYS_DIR_CQ_OPT_CLR_RST 0x0
1297 
1298 #define DLB2_SYS_DIR_CQ_OPT_CLR_CQ		0x0000003F
1299 #define DLB2_SYS_DIR_CQ_OPT_CLR_RSVD0	0xFFFFFFC0
1300 #define DLB2_SYS_DIR_CQ_OPT_CLR_CQ_LOC	0
1301 #define DLB2_SYS_DIR_CQ_OPT_CLR_RSVD0_LOC	6
1302 
1303 #define DLB2_SYS_ALARM_HW_SYND 0x1000050c
1304 #define DLB2_SYS_ALARM_HW_SYND_RST 0x0
1305 
1306 #define DLB2_SYS_ALARM_HW_SYND_SYNDROME	0x000000FF
1307 #define DLB2_SYS_ALARM_HW_SYND_RTYPE		0x00000300
1308 #define DLB2_SYS_ALARM_HW_SYND_ALARM		0x00000400
1309 #define DLB2_SYS_ALARM_HW_SYND_CWD		0x00000800
1310 #define DLB2_SYS_ALARM_HW_SYND_VF_PF_MB	0x00001000
1311 #define DLB2_SYS_ALARM_HW_SYND_RSVD0		0x00002000
1312 #define DLB2_SYS_ALARM_HW_SYND_CLS		0x0000C000
1313 #define DLB2_SYS_ALARM_HW_SYND_AID		0x003F0000
1314 #define DLB2_SYS_ALARM_HW_SYND_UNIT		0x03C00000
1315 #define DLB2_SYS_ALARM_HW_SYND_SOURCE	0x3C000000
1316 #define DLB2_SYS_ALARM_HW_SYND_MORE		0x40000000
1317 #define DLB2_SYS_ALARM_HW_SYND_VALID		0x80000000
1318 #define DLB2_SYS_ALARM_HW_SYND_SYNDROME_LOC	0
1319 #define DLB2_SYS_ALARM_HW_SYND_RTYPE_LOC	8
1320 #define DLB2_SYS_ALARM_HW_SYND_ALARM_LOC	10
1321 #define DLB2_SYS_ALARM_HW_SYND_CWD_LOC	11
1322 #define DLB2_SYS_ALARM_HW_SYND_VF_PF_MB_LOC	12
1323 #define DLB2_SYS_ALARM_HW_SYND_RSVD0_LOC	13
1324 #define DLB2_SYS_ALARM_HW_SYND_CLS_LOC	14
1325 #define DLB2_SYS_ALARM_HW_SYND_AID_LOC	16
1326 #define DLB2_SYS_ALARM_HW_SYND_UNIT_LOC	22
1327 #define DLB2_SYS_ALARM_HW_SYND_SOURCE_LOC	26
1328 #define DLB2_SYS_ALARM_HW_SYND_MORE_LOC	30
1329 #define DLB2_SYS_ALARM_HW_SYND_VALID_LOC	31
1330 
1331 #define DLB2_AQED_QID_FID_LIM(x) \
1332 	(0x20000000 + (x) * 0x1000)
1333 #define DLB2_AQED_QID_FID_LIM_RST 0x7ff
1334 
1335 #define DLB2_AQED_QID_FID_LIM_QID_FID_LIMIT	0x00001FFF
1336 #define DLB2_AQED_QID_FID_LIM_RSVD0		0xFFFFE000
1337 #define DLB2_AQED_QID_FID_LIM_QID_FID_LIMIT_LOC	0
1338 #define DLB2_AQED_QID_FID_LIM_RSVD0_LOC		13
1339 
1340 #define DLB2_AQED_QID_HID_WIDTH(x) \
1341 	(0x20080000 + (x) * 0x1000)
1342 #define DLB2_AQED_QID_HID_WIDTH_RST 0x0
1343 
1344 #define DLB2_AQED_QID_HID_WIDTH_COMPRESS_CODE	0x00000007
1345 #define DLB2_AQED_QID_HID_WIDTH_RSVD0		0xFFFFFFF8
1346 #define DLB2_AQED_QID_HID_WIDTH_COMPRESS_CODE_LOC	0
1347 #define DLB2_AQED_QID_HID_WIDTH_RSVD0_LOC		3
1348 
1349 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0 0x24000004
1350 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_RST 0xfefcfaf8
1351 
1352 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI0	0x000000FF
1353 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI1	0x0000FF00
1354 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI2	0x00FF0000
1355 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI3	0xFF000000
1356 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI0_LOC	0
1357 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI1_LOC	8
1358 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI2_LOC	16
1359 #define DLB2_AQED_CFG_ARB_WEIGHTS_TQPRI_ATM_0_PRI3_LOC	24
1360 
1361 #define DLB2_AQED_SMON_ACTIVITYCNTR0 0x2c00004c
1362 #define DLB2_AQED_SMON_ACTIVITYCNTR0_RST 0x0
1363 
1364 #define DLB2_AQED_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
1365 #define DLB2_AQED_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
1366 
1367 #define DLB2_AQED_SMON_ACTIVITYCNTR1 0x2c000050
1368 #define DLB2_AQED_SMON_ACTIVITYCNTR1_RST 0x0
1369 
1370 #define DLB2_AQED_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
1371 #define DLB2_AQED_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
1372 
1373 #define DLB2_AQED_SMON_COMPARE0 0x2c000054
1374 #define DLB2_AQED_SMON_COMPARE0_RST 0x0
1375 
1376 #define DLB2_AQED_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
1377 #define DLB2_AQED_SMON_COMPARE0_COMPARE0_LOC	0
1378 
1379 #define DLB2_AQED_SMON_COMPARE1 0x2c000058
1380 #define DLB2_AQED_SMON_COMPARE1_RST 0x0
1381 
1382 #define DLB2_AQED_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
1383 #define DLB2_AQED_SMON_COMPARE1_COMPARE1_LOC	0
1384 
1385 #define DLB2_AQED_SMON_CFG0 0x2c00005c
1386 #define DLB2_AQED_SMON_CFG0_RST 0x40000000
1387 
1388 #define DLB2_AQED_SMON_CFG0_SMON_ENABLE		0x00000001
1389 #define DLB2_AQED_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
1390 #define DLB2_AQED_SMON_CFG0_RSVZ0			0x0000000C
1391 #define DLB2_AQED_SMON_CFG0_SMON0_FUNCTION		0x00000070
1392 #define DLB2_AQED_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
1393 #define DLB2_AQED_SMON_CFG0_SMON1_FUNCTION		0x00000700
1394 #define DLB2_AQED_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
1395 #define DLB2_AQED_SMON_CFG0_SMON_MODE		0x0000F000
1396 #define DLB2_AQED_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
1397 #define DLB2_AQED_SMON_CFG0_INTCOUNTEROVFL		0x00020000
1398 #define DLB2_AQED_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
1399 #define DLB2_AQED_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
1400 #define DLB2_AQED_SMON_CFG0_STOPTIMEROVFL		0x00100000
1401 #define DLB2_AQED_SMON_CFG0_INTTIMEROVFL		0x00200000
1402 #define DLB2_AQED_SMON_CFG0_STATTIMEROVFL		0x00400000
1403 #define DLB2_AQED_SMON_CFG0_RSVZ1			0x00800000
1404 #define DLB2_AQED_SMON_CFG0_TIMER_PRESCALE		0x1F000000
1405 #define DLB2_AQED_SMON_CFG0_RSVZ2			0x20000000
1406 #define DLB2_AQED_SMON_CFG0_VERSION			0xC0000000
1407 #define DLB2_AQED_SMON_CFG0_SMON_ENABLE_LOC			0
1408 #define DLB2_AQED_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC		1
1409 #define DLB2_AQED_SMON_CFG0_RSVZ0_LOC			2
1410 #define DLB2_AQED_SMON_CFG0_SMON0_FUNCTION_LOC		4
1411 #define DLB2_AQED_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
1412 #define DLB2_AQED_SMON_CFG0_SMON1_FUNCTION_LOC		8
1413 #define DLB2_AQED_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
1414 #define DLB2_AQED_SMON_CFG0_SMON_MODE_LOC			12
1415 #define DLB2_AQED_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
1416 #define DLB2_AQED_SMON_CFG0_INTCOUNTEROVFL_LOC		17
1417 #define DLB2_AQED_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
1418 #define DLB2_AQED_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
1419 #define DLB2_AQED_SMON_CFG0_STOPTIMEROVFL_LOC		20
1420 #define DLB2_AQED_SMON_CFG0_INTTIMEROVFL_LOC			21
1421 #define DLB2_AQED_SMON_CFG0_STATTIMEROVFL_LOC		22
1422 #define DLB2_AQED_SMON_CFG0_RSVZ1_LOC			23
1423 #define DLB2_AQED_SMON_CFG0_TIMER_PRESCALE_LOC		24
1424 #define DLB2_AQED_SMON_CFG0_RSVZ2_LOC			29
1425 #define DLB2_AQED_SMON_CFG0_VERSION_LOC			30
1426 
1427 #define DLB2_AQED_SMON_CFG1 0x2c000060
1428 #define DLB2_AQED_SMON_CFG1_RST 0x0
1429 
1430 #define DLB2_AQED_SMON_CFG1_MODE0	0x000000FF
1431 #define DLB2_AQED_SMON_CFG1_MODE1	0x0000FF00
1432 #define DLB2_AQED_SMON_CFG1_RSVZ0	0xFFFF0000
1433 #define DLB2_AQED_SMON_CFG1_MODE0_LOC	0
1434 #define DLB2_AQED_SMON_CFG1_MODE1_LOC	8
1435 #define DLB2_AQED_SMON_CFG1_RSVZ0_LOC	16
1436 
1437 #define DLB2_AQED_SMON_MAX_TMR 0x2c000064
1438 #define DLB2_AQED_SMON_MAX_TMR_RST 0x0
1439 
1440 #define DLB2_AQED_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
1441 #define DLB2_AQED_SMON_MAX_TMR_MAXVALUE_LOC	0
1442 
1443 #define DLB2_AQED_SMON_TMR 0x2c000068
1444 #define DLB2_AQED_SMON_TMR_RST 0x0
1445 
1446 #define DLB2_AQED_SMON_TMR_TIMER	0xFFFFFFFF
1447 #define DLB2_AQED_SMON_TMR_TIMER_LOC	0
1448 
1449 #define DLB2_ATM_QID2CQIDIX_00(x) \
1450 	(0x30080000 + (x) * 0x1000)
1451 #define DLB2_ATM_QID2CQIDIX_00_RST 0x0
1452 #define DLB2_ATM_QID2CQIDIX(x, y) \
1453 	(DLB2_ATM_QID2CQIDIX_00(x) + 0x80000 * (y))
1454 #define DLB2_ATM_QID2CQIDIX_NUM 16
1455 
1456 #define DLB2_ATM_QID2CQIDIX_00_CQ_P0	0x000000FF
1457 #define DLB2_ATM_QID2CQIDIX_00_CQ_P1	0x0000FF00
1458 #define DLB2_ATM_QID2CQIDIX_00_CQ_P2	0x00FF0000
1459 #define DLB2_ATM_QID2CQIDIX_00_CQ_P3	0xFF000000
1460 #define DLB2_ATM_QID2CQIDIX_00_CQ_P0_LOC	0
1461 #define DLB2_ATM_QID2CQIDIX_00_CQ_P1_LOC	8
1462 #define DLB2_ATM_QID2CQIDIX_00_CQ_P2_LOC	16
1463 #define DLB2_ATM_QID2CQIDIX_00_CQ_P3_LOC	24
1464 
1465 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN 0x34000004
1466 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_RST 0xfffefdfc
1467 
1468 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN0	0x000000FF
1469 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN1	0x0000FF00
1470 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN2	0x00FF0000
1471 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN3	0xFF000000
1472 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN0_LOC	0
1473 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN1_LOC	8
1474 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN2_LOC	16
1475 #define DLB2_ATM_CFG_ARB_WEIGHTS_RDY_BIN_BIN3_LOC	24
1476 
1477 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN 0x34000008
1478 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_RST 0xfffefdfc
1479 
1480 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN0	0x000000FF
1481 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN1	0x0000FF00
1482 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN2	0x00FF0000
1483 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN3	0xFF000000
1484 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN0_LOC	0
1485 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN1_LOC	8
1486 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN2_LOC	16
1487 #define DLB2_ATM_CFG_ARB_WEIGHTS_SCHED_BIN_BIN3_LOC	24
1488 
1489 #define DLB2_ATM_SMON_ACTIVITYCNTR0 0x3c000050
1490 #define DLB2_ATM_SMON_ACTIVITYCNTR0_RST 0x0
1491 
1492 #define DLB2_ATM_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
1493 #define DLB2_ATM_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
1494 
1495 #define DLB2_ATM_SMON_ACTIVITYCNTR1 0x3c000054
1496 #define DLB2_ATM_SMON_ACTIVITYCNTR1_RST 0x0
1497 
1498 #define DLB2_ATM_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
1499 #define DLB2_ATM_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
1500 
1501 #define DLB2_ATM_SMON_COMPARE0 0x3c000058
1502 #define DLB2_ATM_SMON_COMPARE0_RST 0x0
1503 
1504 #define DLB2_ATM_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
1505 #define DLB2_ATM_SMON_COMPARE0_COMPARE0_LOC	0
1506 
1507 #define DLB2_ATM_SMON_COMPARE1 0x3c00005c
1508 #define DLB2_ATM_SMON_COMPARE1_RST 0x0
1509 
1510 #define DLB2_ATM_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
1511 #define DLB2_ATM_SMON_COMPARE1_COMPARE1_LOC	0
1512 
1513 #define DLB2_ATM_SMON_CFG0 0x3c000060
1514 #define DLB2_ATM_SMON_CFG0_RST 0x40000000
1515 
1516 #define DLB2_ATM_SMON_CFG0_SMON_ENABLE		0x00000001
1517 #define DLB2_ATM_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
1518 #define DLB2_ATM_SMON_CFG0_RSVZ0			0x0000000C
1519 #define DLB2_ATM_SMON_CFG0_SMON0_FUNCTION		0x00000070
1520 #define DLB2_ATM_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
1521 #define DLB2_ATM_SMON_CFG0_SMON1_FUNCTION		0x00000700
1522 #define DLB2_ATM_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
1523 #define DLB2_ATM_SMON_CFG0_SMON_MODE			0x0000F000
1524 #define DLB2_ATM_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
1525 #define DLB2_ATM_SMON_CFG0_INTCOUNTEROVFL		0x00020000
1526 #define DLB2_ATM_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
1527 #define DLB2_ATM_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
1528 #define DLB2_ATM_SMON_CFG0_STOPTIMEROVFL		0x00100000
1529 #define DLB2_ATM_SMON_CFG0_INTTIMEROVFL		0x00200000
1530 #define DLB2_ATM_SMON_CFG0_STATTIMEROVFL		0x00400000
1531 #define DLB2_ATM_SMON_CFG0_RSVZ1			0x00800000
1532 #define DLB2_ATM_SMON_CFG0_TIMER_PRESCALE		0x1F000000
1533 #define DLB2_ATM_SMON_CFG0_RSVZ2			0x20000000
1534 #define DLB2_ATM_SMON_CFG0_VERSION			0xC0000000
1535 #define DLB2_ATM_SMON_CFG0_SMON_ENABLE_LOC			0
1536 #define DLB2_ATM_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC		1
1537 #define DLB2_ATM_SMON_CFG0_RSVZ0_LOC				2
1538 #define DLB2_ATM_SMON_CFG0_SMON0_FUNCTION_LOC		4
1539 #define DLB2_ATM_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
1540 #define DLB2_ATM_SMON_CFG0_SMON1_FUNCTION_LOC		8
1541 #define DLB2_ATM_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
1542 #define DLB2_ATM_SMON_CFG0_SMON_MODE_LOC			12
1543 #define DLB2_ATM_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
1544 #define DLB2_ATM_SMON_CFG0_INTCOUNTEROVFL_LOC		17
1545 #define DLB2_ATM_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
1546 #define DLB2_ATM_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
1547 #define DLB2_ATM_SMON_CFG0_STOPTIMEROVFL_LOC			20
1548 #define DLB2_ATM_SMON_CFG0_INTTIMEROVFL_LOC			21
1549 #define DLB2_ATM_SMON_CFG0_STATTIMEROVFL_LOC			22
1550 #define DLB2_ATM_SMON_CFG0_RSVZ1_LOC				23
1551 #define DLB2_ATM_SMON_CFG0_TIMER_PRESCALE_LOC		24
1552 #define DLB2_ATM_SMON_CFG0_RSVZ2_LOC				29
1553 #define DLB2_ATM_SMON_CFG0_VERSION_LOC			30
1554 
1555 #define DLB2_ATM_SMON_CFG1 0x3c000064
1556 #define DLB2_ATM_SMON_CFG1_RST 0x0
1557 
1558 #define DLB2_ATM_SMON_CFG1_MODE0	0x000000FF
1559 #define DLB2_ATM_SMON_CFG1_MODE1	0x0000FF00
1560 #define DLB2_ATM_SMON_CFG1_RSVZ0	0xFFFF0000
1561 #define DLB2_ATM_SMON_CFG1_MODE0_LOC	0
1562 #define DLB2_ATM_SMON_CFG1_MODE1_LOC	8
1563 #define DLB2_ATM_SMON_CFG1_RSVZ0_LOC	16
1564 
1565 #define DLB2_ATM_SMON_MAX_TMR 0x3c000068
1566 #define DLB2_ATM_SMON_MAX_TMR_RST 0x0
1567 
1568 #define DLB2_ATM_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
1569 #define DLB2_ATM_SMON_MAX_TMR_MAXVALUE_LOC	0
1570 
1571 #define DLB2_ATM_SMON_TMR 0x3c00006c
1572 #define DLB2_ATM_SMON_TMR_RST 0x0
1573 
1574 #define DLB2_ATM_SMON_TMR_TIMER	0xFFFFFFFF
1575 #define DLB2_ATM_SMON_TMR_TIMER_LOC	0
1576 
1577 #define DLB2_CHP_CFG_DIR_VAS_CRD(x) \
1578 	(0x40000000 + (x) * 0x1000)
1579 #define DLB2_CHP_CFG_DIR_VAS_CRD_RST 0x0
1580 
1581 #define DLB2_CHP_CFG_DIR_VAS_CRD_COUNT	0x00003FFF
1582 #define DLB2_CHP_CFG_DIR_VAS_CRD_RSVD0	0xFFFFC000
1583 #define DLB2_CHP_CFG_DIR_VAS_CRD_COUNT_LOC	0
1584 #define DLB2_CHP_CFG_DIR_VAS_CRD_RSVD0_LOC	14
1585 
1586 #define DLB2_CHP_CFG_LDB_VAS_CRD(x) \
1587 	(0x40080000 + (x) * 0x1000)
1588 #define DLB2_CHP_CFG_LDB_VAS_CRD_RST 0x0
1589 
1590 #define DLB2_CHP_CFG_LDB_VAS_CRD_COUNT	0x00007FFF
1591 #define DLB2_CHP_CFG_LDB_VAS_CRD_RSVD0	0xFFFF8000
1592 #define DLB2_CHP_CFG_LDB_VAS_CRD_COUNT_LOC	0
1593 #define DLB2_CHP_CFG_LDB_VAS_CRD_RSVD0_LOC	15
1594 
1595 #define DLB2_V2CHP_ORD_QID_SN(x) \
1596 	(0x40100000 + (x) * 0x1000)
1597 #define DLB2_V2_5CHP_ORD_QID_SN(x) \
1598 	(0x40080000 + (x) * 0x1000)
1599 #define DLB2_CHP_ORD_QID_SN(ver, x) \
1600 	(ver == DLB2_HW_V2 ? \
1601 	 DLB2_V2CHP_ORD_QID_SN(x) : \
1602 	 DLB2_V2_5CHP_ORD_QID_SN(x))
1603 #define DLB2_CHP_ORD_QID_SN_RST 0x0
1604 
1605 #define DLB2_CHP_ORD_QID_SN_SN	0x000003FF
1606 #define DLB2_CHP_ORD_QID_SN_RSVD0	0xFFFFFC00
1607 #define DLB2_CHP_ORD_QID_SN_SN_LOC		0
1608 #define DLB2_CHP_ORD_QID_SN_RSVD0_LOC	10
1609 
1610 #define DLB2_V2CHP_ORD_QID_SN_MAP(x) \
1611 	(0x40180000 + (x) * 0x1000)
1612 #define DLB2_V2_5CHP_ORD_QID_SN_MAP(x) \
1613 	(0x40100000 + (x) * 0x1000)
1614 #define DLB2_CHP_ORD_QID_SN_MAP(ver, x) \
1615 	(ver == DLB2_HW_V2 ? \
1616 	 DLB2_V2CHP_ORD_QID_SN_MAP(x) : \
1617 	 DLB2_V2_5CHP_ORD_QID_SN_MAP(x))
1618 #define DLB2_CHP_ORD_QID_SN_MAP_RST 0x0
1619 
1620 #define DLB2_CHP_ORD_QID_SN_MAP_MODE		0x00000007
1621 #define DLB2_CHP_ORD_QID_SN_MAP_SLOT		0x00000078
1622 #define DLB2_CHP_ORD_QID_SN_MAP_RSVZ0	0x00000080
1623 #define DLB2_CHP_ORD_QID_SN_MAP_GRP		0x00000100
1624 #define DLB2_CHP_ORD_QID_SN_MAP_RSVZ1	0x00000200
1625 #define DLB2_CHP_ORD_QID_SN_MAP_RSVD0	0xFFFFFC00
1626 #define DLB2_CHP_ORD_QID_SN_MAP_MODE_LOC	0
1627 #define DLB2_CHP_ORD_QID_SN_MAP_SLOT_LOC	3
1628 #define DLB2_CHP_ORD_QID_SN_MAP_RSVZ0_LOC	7
1629 #define DLB2_CHP_ORD_QID_SN_MAP_GRP_LOC	8
1630 #define DLB2_CHP_ORD_QID_SN_MAP_RSVZ1_LOC	9
1631 #define DLB2_CHP_ORD_QID_SN_MAP_RSVD0_LOC	10
1632 
1633 #define DLB2_V2CHP_SN_CHK_ENBL(x) \
1634 	(0x40200000 + (x) * 0x1000)
1635 #define DLB2_V2_5CHP_SN_CHK_ENBL(x) \
1636 	(0x40180000 + (x) * 0x1000)
1637 #define DLB2_CHP_SN_CHK_ENBL(ver, x) \
1638 	(ver == DLB2_HW_V2 ? \
1639 	 DLB2_V2CHP_SN_CHK_ENBL(x) : \
1640 	 DLB2_V2_5CHP_SN_CHK_ENBL(x))
1641 #define DLB2_CHP_SN_CHK_ENBL_RST 0x0
1642 
1643 #define DLB2_CHP_SN_CHK_ENBL_EN	0x00000001
1644 #define DLB2_CHP_SN_CHK_ENBL_RSVD0	0xFFFFFFFE
1645 #define DLB2_CHP_SN_CHK_ENBL_EN_LOC		0
1646 #define DLB2_CHP_SN_CHK_ENBL_RSVD0_LOC	1
1647 
1648 #define DLB2_V2CHP_DIR_CQ_DEPTH(x) \
1649 	(0x40280000 + (x) * 0x1000)
1650 #define DLB2_V2_5CHP_DIR_CQ_DEPTH(x) \
1651 	(0x40300000 + (x) * 0x1000)
1652 #define DLB2_CHP_DIR_CQ_DEPTH(ver, x) \
1653 	(ver == DLB2_HW_V2 ? \
1654 	 DLB2_V2CHP_DIR_CQ_DEPTH(x) : \
1655 	 DLB2_V2_5CHP_DIR_CQ_DEPTH(x))
1656 #define DLB2_CHP_DIR_CQ_DEPTH_RST 0x0
1657 
1658 #define DLB2_CHP_DIR_CQ_DEPTH_DEPTH	0x00001FFF
1659 #define DLB2_CHP_DIR_CQ_DEPTH_RSVD0	0xFFFFE000
1660 #define DLB2_CHP_DIR_CQ_DEPTH_DEPTH_LOC	0
1661 #define DLB2_CHP_DIR_CQ_DEPTH_RSVD0_LOC	13
1662 
1663 #define DLB2_V2CHP_DIR_CQ_INT_DEPTH_THRSH(x) \
1664 	(0x40300000 + (x) * 0x1000)
1665 #define DLB2_V2_5CHP_DIR_CQ_INT_DEPTH_THRSH(x) \
1666 	(0x40380000 + (x) * 0x1000)
1667 #define DLB2_CHP_DIR_CQ_INT_DEPTH_THRSH(ver, x) \
1668 	(ver == DLB2_HW_V2 ? \
1669 	 DLB2_V2CHP_DIR_CQ_INT_DEPTH_THRSH(x) : \
1670 	 DLB2_V2_5CHP_DIR_CQ_INT_DEPTH_THRSH(x))
1671 #define DLB2_CHP_DIR_CQ_INT_DEPTH_THRSH_RST 0x0
1672 
1673 #define DLB2_CHP_DIR_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD	0x00001FFF
1674 #define DLB2_CHP_DIR_CQ_INT_DEPTH_THRSH_RSVD0		0xFFFFE000
1675 #define DLB2_CHP_DIR_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD_LOC	0
1676 #define DLB2_CHP_DIR_CQ_INT_DEPTH_THRSH_RSVD0_LOC		13
1677 
1678 #define DLB2_V2CHP_DIR_CQ_INT_ENB(x) \
1679 	(0x40380000 + (x) * 0x1000)
1680 #define DLB2_V2_5CHP_DIR_CQ_INT_ENB(x) \
1681 	(0x40400000 + (x) * 0x1000)
1682 #define DLB2_CHP_DIR_CQ_INT_ENB(ver, x) \
1683 	(ver == DLB2_HW_V2 ? \
1684 	 DLB2_V2CHP_DIR_CQ_INT_ENB(x) : \
1685 	 DLB2_V2_5CHP_DIR_CQ_INT_ENB(x))
1686 #define DLB2_CHP_DIR_CQ_INT_ENB_RST 0x0
1687 
1688 #define DLB2_CHP_DIR_CQ_INT_ENB_EN_TIM	0x00000001
1689 #define DLB2_CHP_DIR_CQ_INT_ENB_EN_DEPTH	0x00000002
1690 #define DLB2_CHP_DIR_CQ_INT_ENB_RSVD0	0xFFFFFFFC
1691 #define DLB2_CHP_DIR_CQ_INT_ENB_EN_TIM_LOC	0
1692 #define DLB2_CHP_DIR_CQ_INT_ENB_EN_DEPTH_LOC	1
1693 #define DLB2_CHP_DIR_CQ_INT_ENB_RSVD0_LOC	2
1694 
1695 #define DLB2_V2CHP_DIR_CQ_TMR_THRSH(x) \
1696 	(0x40480000 + (x) * 0x1000)
1697 #define DLB2_V2_5CHP_DIR_CQ_TMR_THRSH(x) \
1698 	(0x40500000 + (x) * 0x1000)
1699 #define DLB2_CHP_DIR_CQ_TMR_THRSH(ver, x) \
1700 	(ver == DLB2_HW_V2 ? \
1701 	 DLB2_V2CHP_DIR_CQ_TMR_THRSH(x) : \
1702 	 DLB2_V2_5CHP_DIR_CQ_TMR_THRSH(x))
1703 #define DLB2_CHP_DIR_CQ_TMR_THRSH_RST 0x1
1704 
1705 #define DLB2_CHP_DIR_CQ_TMR_THRSH_THRSH_0	0x00000001
1706 #define DLB2_CHP_DIR_CQ_TMR_THRSH_THRSH_13_1	0x00003FFE
1707 #define DLB2_CHP_DIR_CQ_TMR_THRSH_RSVD0	0xFFFFC000
1708 #define DLB2_CHP_DIR_CQ_TMR_THRSH_THRSH_0_LOC	0
1709 #define DLB2_CHP_DIR_CQ_TMR_THRSH_THRSH_13_1_LOC	1
1710 #define DLB2_CHP_DIR_CQ_TMR_THRSH_RSVD0_LOC		14
1711 
1712 #define DLB2_V2CHP_DIR_CQ_TKN_DEPTH_SEL(x) \
1713 	(0x40500000 + (x) * 0x1000)
1714 #define DLB2_V2_5CHP_DIR_CQ_TKN_DEPTH_SEL(x) \
1715 	(0x40580000 + (x) * 0x1000)
1716 #define DLB2_CHP_DIR_CQ_TKN_DEPTH_SEL(ver, x) \
1717 	(ver == DLB2_HW_V2 ? \
1718 	 DLB2_V2CHP_DIR_CQ_TKN_DEPTH_SEL(x) : \
1719 	 DLB2_V2_5CHP_DIR_CQ_TKN_DEPTH_SEL(x))
1720 #define DLB2_CHP_DIR_CQ_TKN_DEPTH_SEL_RST 0x0
1721 
1722 #define DLB2_CHP_DIR_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT	0x0000000F
1723 #define DLB2_CHP_DIR_CQ_TKN_DEPTH_SEL_RSVD0			0xFFFFFFF0
1724 #define DLB2_CHP_DIR_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_LOC	0
1725 #define DLB2_CHP_DIR_CQ_TKN_DEPTH_SEL_RSVD0_LOC		4
1726 
1727 #define DLB2_V2CHP_DIR_CQ_WD_ENB(x) \
1728 	(0x40580000 + (x) * 0x1000)
1729 #define DLB2_V2_5CHP_DIR_CQ_WD_ENB(x) \
1730 	(0x40600000 + (x) * 0x1000)
1731 #define DLB2_CHP_DIR_CQ_WD_ENB(ver, x) \
1732 	(ver == DLB2_HW_V2 ? \
1733 	 DLB2_V2CHP_DIR_CQ_WD_ENB(x) : \
1734 	 DLB2_V2_5CHP_DIR_CQ_WD_ENB(x))
1735 #define DLB2_CHP_DIR_CQ_WD_ENB_RST 0x0
1736 
1737 #define DLB2_CHP_DIR_CQ_WD_ENB_WD_ENABLE	0x00000001
1738 #define DLB2_CHP_DIR_CQ_WD_ENB_RSVD0		0xFFFFFFFE
1739 #define DLB2_CHP_DIR_CQ_WD_ENB_WD_ENABLE_LOC	0
1740 #define DLB2_CHP_DIR_CQ_WD_ENB_RSVD0_LOC	1
1741 
1742 #define DLB2_V2CHP_DIR_CQ_WPTR(x) \
1743 	(0x40600000 + (x) * 0x1000)
1744 #define DLB2_V2_5CHP_DIR_CQ_WPTR(x) \
1745 	(0x40680000 + (x) * 0x1000)
1746 #define DLB2_CHP_DIR_CQ_WPTR(ver, x) \
1747 	(ver == DLB2_HW_V2 ? \
1748 	 DLB2_V2CHP_DIR_CQ_WPTR(x) : \
1749 	 DLB2_V2_5CHP_DIR_CQ_WPTR(x))
1750 #define DLB2_CHP_DIR_CQ_WPTR_RST 0x0
1751 
1752 #define DLB2_CHP_DIR_CQ_WPTR_WRITE_POINTER	0x00001FFF
1753 #define DLB2_CHP_DIR_CQ_WPTR_RSVD0		0xFFFFE000
1754 #define DLB2_CHP_DIR_CQ_WPTR_WRITE_POINTER_LOC	0
1755 #define DLB2_CHP_DIR_CQ_WPTR_RSVD0_LOC		13
1756 
1757 #define DLB2_V2CHP_DIR_CQ2VAS(x) \
1758 	(0x40680000 + (x) * 0x1000)
1759 #define DLB2_V2_5CHP_DIR_CQ2VAS(x) \
1760 	(0x40700000 + (x) * 0x1000)
1761 #define DLB2_CHP_DIR_CQ2VAS(ver, x) \
1762 	(ver == DLB2_HW_V2 ? \
1763 	 DLB2_V2CHP_DIR_CQ2VAS(x) : \
1764 	 DLB2_V2_5CHP_DIR_CQ2VAS(x))
1765 #define DLB2_CHP_DIR_CQ2VAS_RST 0x0
1766 
1767 #define DLB2_CHP_DIR_CQ2VAS_CQ2VAS	0x0000001F
1768 #define DLB2_CHP_DIR_CQ2VAS_RSVD0	0xFFFFFFE0
1769 #define DLB2_CHP_DIR_CQ2VAS_CQ2VAS_LOC	0
1770 #define DLB2_CHP_DIR_CQ2VAS_RSVD0_LOC	5
1771 
1772 #define DLB2_V2CHP_HIST_LIST_BASE(x) \
1773 	(0x40700000 + (x) * 0x1000)
1774 #define DLB2_V2_5CHP_HIST_LIST_BASE(x) \
1775 	(0x40780000 + (x) * 0x1000)
1776 #define DLB2_CHP_HIST_LIST_BASE(ver, x) \
1777 	(ver == DLB2_HW_V2 ? \
1778 	 DLB2_V2CHP_HIST_LIST_BASE(x) : \
1779 	 DLB2_V2_5CHP_HIST_LIST_BASE(x))
1780 #define DLB2_CHP_HIST_LIST_BASE_RST 0x0
1781 
1782 #define DLB2_CHP_HIST_LIST_BASE_BASE		0x00001FFF
1783 #define DLB2_CHP_HIST_LIST_BASE_RSVD0	0xFFFFE000
1784 #define DLB2_CHP_HIST_LIST_BASE_BASE_LOC	0
1785 #define DLB2_CHP_HIST_LIST_BASE_RSVD0_LOC	13
1786 
1787 #define DLB2_V2CHP_HIST_LIST_LIM(x) \
1788 	(0x40780000 + (x) * 0x1000)
1789 #define DLB2_V2_5CHP_HIST_LIST_LIM(x) \
1790 	(0x40800000 + (x) * 0x1000)
1791 #define DLB2_CHP_HIST_LIST_LIM(ver, x) \
1792 	(ver == DLB2_HW_V2 ? \
1793 	 DLB2_V2CHP_HIST_LIST_LIM(x) : \
1794 	 DLB2_V2_5CHP_HIST_LIST_LIM(x))
1795 #define DLB2_CHP_HIST_LIST_LIM_RST 0x0
1796 
1797 #define DLB2_CHP_HIST_LIST_LIM_LIMIT	0x00001FFF
1798 #define DLB2_CHP_HIST_LIST_LIM_RSVD0	0xFFFFE000
1799 #define DLB2_CHP_HIST_LIST_LIM_LIMIT_LOC	0
1800 #define DLB2_CHP_HIST_LIST_LIM_RSVD0_LOC	13
1801 
1802 #define DLB2_V2CHP_HIST_LIST_POP_PTR(x) \
1803 	(0x40800000 + (x) * 0x1000)
1804 #define DLB2_V2_5CHP_HIST_LIST_POP_PTR(x) \
1805 	(0x40880000 + (x) * 0x1000)
1806 #define DLB2_CHP_HIST_LIST_POP_PTR(ver, x) \
1807 	(ver == DLB2_HW_V2 ? \
1808 	 DLB2_V2CHP_HIST_LIST_POP_PTR(x) : \
1809 	 DLB2_V2_5CHP_HIST_LIST_POP_PTR(x))
1810 #define DLB2_CHP_HIST_LIST_POP_PTR_RST 0x0
1811 
1812 #define DLB2_CHP_HIST_LIST_POP_PTR_POP_PTR		0x00001FFF
1813 #define DLB2_CHP_HIST_LIST_POP_PTR_GENERATION	0x00002000
1814 #define DLB2_CHP_HIST_LIST_POP_PTR_RSVD0		0xFFFFC000
1815 #define DLB2_CHP_HIST_LIST_POP_PTR_POP_PTR_LOC	0
1816 #define DLB2_CHP_HIST_LIST_POP_PTR_GENERATION_LOC	13
1817 #define DLB2_CHP_HIST_LIST_POP_PTR_RSVD0_LOC		14
1818 
1819 #define DLB2_V2CHP_HIST_LIST_PUSH_PTR(x) \
1820 	(0x40880000 + (x) * 0x1000)
1821 #define DLB2_V2_5CHP_HIST_LIST_PUSH_PTR(x) \
1822 	(0x40900000 + (x) * 0x1000)
1823 #define DLB2_CHP_HIST_LIST_PUSH_PTR(ver, x) \
1824 	(ver == DLB2_HW_V2 ? \
1825 	 DLB2_V2CHP_HIST_LIST_PUSH_PTR(x) : \
1826 	 DLB2_V2_5CHP_HIST_LIST_PUSH_PTR(x))
1827 #define DLB2_CHP_HIST_LIST_PUSH_PTR_RST 0x0
1828 
1829 #define DLB2_CHP_HIST_LIST_PUSH_PTR_PUSH_PTR		0x00001FFF
1830 #define DLB2_CHP_HIST_LIST_PUSH_PTR_GENERATION	0x00002000
1831 #define DLB2_CHP_HIST_LIST_PUSH_PTR_RSVD0		0xFFFFC000
1832 #define DLB2_CHP_HIST_LIST_PUSH_PTR_PUSH_PTR_LOC	0
1833 #define DLB2_CHP_HIST_LIST_PUSH_PTR_GENERATION_LOC	13
1834 #define DLB2_CHP_HIST_LIST_PUSH_PTR_RSVD0_LOC	14
1835 
1836 #define DLB2_V2CHP_LDB_CQ_DEPTH(x) \
1837 	(0x40900000 + (x) * 0x1000)
1838 #define DLB2_V2_5CHP_LDB_CQ_DEPTH(x) \
1839 	(0x40a80000 + (x) * 0x1000)
1840 #define DLB2_CHP_LDB_CQ_DEPTH(ver, x) \
1841 	(ver == DLB2_HW_V2 ? \
1842 	 DLB2_V2CHP_LDB_CQ_DEPTH(x) : \
1843 	 DLB2_V2_5CHP_LDB_CQ_DEPTH(x))
1844 #define DLB2_CHP_LDB_CQ_DEPTH_RST 0x0
1845 
1846 #define DLB2_CHP_LDB_CQ_DEPTH_DEPTH	0x000007FF
1847 #define DLB2_CHP_LDB_CQ_DEPTH_RSVD0	0xFFFFF800
1848 #define DLB2_CHP_LDB_CQ_DEPTH_DEPTH_LOC	0
1849 #define DLB2_CHP_LDB_CQ_DEPTH_RSVD0_LOC	11
1850 
1851 #define DLB2_V2CHP_LDB_CQ_INT_DEPTH_THRSH(x) \
1852 	(0x40980000 + (x) * 0x1000)
1853 #define DLB2_V2_5CHP_LDB_CQ_INT_DEPTH_THRSH(x) \
1854 	(0x40b00000 + (x) * 0x1000)
1855 #define DLB2_CHP_LDB_CQ_INT_DEPTH_THRSH(ver, x) \
1856 	(ver == DLB2_HW_V2 ? \
1857 	 DLB2_V2CHP_LDB_CQ_INT_DEPTH_THRSH(x) : \
1858 	 DLB2_V2_5CHP_LDB_CQ_INT_DEPTH_THRSH(x))
1859 #define DLB2_CHP_LDB_CQ_INT_DEPTH_THRSH_RST 0x0
1860 
1861 #define DLB2_CHP_LDB_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD	0x000007FF
1862 #define DLB2_CHP_LDB_CQ_INT_DEPTH_THRSH_RSVD0		0xFFFFF800
1863 #define DLB2_CHP_LDB_CQ_INT_DEPTH_THRSH_DEPTH_THRESHOLD_LOC	0
1864 #define DLB2_CHP_LDB_CQ_INT_DEPTH_THRSH_RSVD0_LOC		11
1865 
1866 #define DLB2_V2CHP_LDB_CQ_INT_ENB(x) \
1867 	(0x40a00000 + (x) * 0x1000)
1868 #define DLB2_V2_5CHP_LDB_CQ_INT_ENB(x) \
1869 	(0x40b80000 + (x) * 0x1000)
1870 #define DLB2_CHP_LDB_CQ_INT_ENB(ver, x) \
1871 	(ver == DLB2_HW_V2 ? \
1872 	 DLB2_V2CHP_LDB_CQ_INT_ENB(x) : \
1873 	 DLB2_V2_5CHP_LDB_CQ_INT_ENB(x))
1874 #define DLB2_CHP_LDB_CQ_INT_ENB_RST 0x0
1875 
1876 #define DLB2_CHP_LDB_CQ_INT_ENB_EN_TIM	0x00000001
1877 #define DLB2_CHP_LDB_CQ_INT_ENB_EN_DEPTH	0x00000002
1878 #define DLB2_CHP_LDB_CQ_INT_ENB_RSVD0	0xFFFFFFFC
1879 #define DLB2_CHP_LDB_CQ_INT_ENB_EN_TIM_LOC	0
1880 #define DLB2_CHP_LDB_CQ_INT_ENB_EN_DEPTH_LOC	1
1881 #define DLB2_CHP_LDB_CQ_INT_ENB_RSVD0_LOC	2
1882 
1883 #define DLB2_V2CHP_LDB_CQ_TMR_THRSH(x) \
1884 	(0x40b00000 + (x) * 0x1000)
1885 #define DLB2_V2_5CHP_LDB_CQ_TMR_THRSH(x) \
1886 	(0x40c80000 + (x) * 0x1000)
1887 #define DLB2_CHP_LDB_CQ_TMR_THRSH(ver, x) \
1888 	(ver == DLB2_HW_V2 ? \
1889 	 DLB2_V2CHP_LDB_CQ_TMR_THRSH(x) : \
1890 	 DLB2_V2_5CHP_LDB_CQ_TMR_THRSH(x))
1891 #define DLB2_CHP_LDB_CQ_TMR_THRSH_RST 0x1
1892 
1893 #define DLB2_CHP_LDB_CQ_TMR_THRSH_THRSH_0	0x00000001
1894 #define DLB2_CHP_LDB_CQ_TMR_THRSH_THRSH_13_1	0x00003FFE
1895 #define DLB2_CHP_LDB_CQ_TMR_THRSH_RSVD0	0xFFFFC000
1896 #define DLB2_CHP_LDB_CQ_TMR_THRSH_THRSH_0_LOC	0
1897 #define DLB2_CHP_LDB_CQ_TMR_THRSH_THRSH_13_1_LOC	1
1898 #define DLB2_CHP_LDB_CQ_TMR_THRSH_RSVD0_LOC		14
1899 
1900 #define DLB2_V2CHP_LDB_CQ_TKN_DEPTH_SEL(x) \
1901 	(0x40b80000 + (x) * 0x1000)
1902 #define DLB2_V2_5CHP_LDB_CQ_TKN_DEPTH_SEL(x) \
1903 	(0x40d00000 + (x) * 0x1000)
1904 #define DLB2_CHP_LDB_CQ_TKN_DEPTH_SEL(ver, x) \
1905 	(ver == DLB2_HW_V2 ? \
1906 	 DLB2_V2CHP_LDB_CQ_TKN_DEPTH_SEL(x) : \
1907 	 DLB2_V2_5CHP_LDB_CQ_TKN_DEPTH_SEL(x))
1908 #define DLB2_CHP_LDB_CQ_TKN_DEPTH_SEL_RST 0x0
1909 
1910 #define DLB2_CHP_LDB_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT	0x0000000F
1911 #define DLB2_CHP_LDB_CQ_TKN_DEPTH_SEL_RSVD0			0xFFFFFFF0
1912 #define DLB2_CHP_LDB_CQ_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_LOC	0
1913 #define DLB2_CHP_LDB_CQ_TKN_DEPTH_SEL_RSVD0_LOC		4
1914 
1915 #define DLB2_V2CHP_LDB_CQ_WD_ENB(x) \
1916 	(0x40c00000 + (x) * 0x1000)
1917 #define DLB2_V2_5CHP_LDB_CQ_WD_ENB(x) \
1918 	(0x40d80000 + (x) * 0x1000)
1919 #define DLB2_CHP_LDB_CQ_WD_ENB(ver, x) \
1920 	(ver == DLB2_HW_V2 ? \
1921 	 DLB2_V2CHP_LDB_CQ_WD_ENB(x) : \
1922 	 DLB2_V2_5CHP_LDB_CQ_WD_ENB(x))
1923 #define DLB2_CHP_LDB_CQ_WD_ENB_RST 0x0
1924 
1925 #define DLB2_CHP_LDB_CQ_WD_ENB_WD_ENABLE	0x00000001
1926 #define DLB2_CHP_LDB_CQ_WD_ENB_RSVD0		0xFFFFFFFE
1927 #define DLB2_CHP_LDB_CQ_WD_ENB_WD_ENABLE_LOC	0
1928 #define DLB2_CHP_LDB_CQ_WD_ENB_RSVD0_LOC	1
1929 
1930 #define DLB2_V2CHP_LDB_CQ_WPTR(x) \
1931 	(0x40c80000 + (x) * 0x1000)
1932 #define DLB2_V2_5CHP_LDB_CQ_WPTR(x) \
1933 	(0x40e00000 + (x) * 0x1000)
1934 #define DLB2_CHP_LDB_CQ_WPTR(ver, x) \
1935 	(ver == DLB2_HW_V2 ? \
1936 	 DLB2_V2CHP_LDB_CQ_WPTR(x) : \
1937 	 DLB2_V2_5CHP_LDB_CQ_WPTR(x))
1938 #define DLB2_CHP_LDB_CQ_WPTR_RST 0x0
1939 
1940 #define DLB2_CHP_LDB_CQ_WPTR_WRITE_POINTER	0x000007FF
1941 #define DLB2_CHP_LDB_CQ_WPTR_RSVD0		0xFFFFF800
1942 #define DLB2_CHP_LDB_CQ_WPTR_WRITE_POINTER_LOC	0
1943 #define DLB2_CHP_LDB_CQ_WPTR_RSVD0_LOC		11
1944 
1945 #define DLB2_V2CHP_LDB_CQ2VAS(x) \
1946 	(0x40d00000 + (x) * 0x1000)
1947 #define DLB2_V2_5CHP_LDB_CQ2VAS(x) \
1948 	(0x40e80000 + (x) * 0x1000)
1949 #define DLB2_CHP_LDB_CQ2VAS(ver, x) \
1950 	(ver == DLB2_HW_V2 ? \
1951 	 DLB2_V2CHP_LDB_CQ2VAS(x) : \
1952 	 DLB2_V2_5CHP_LDB_CQ2VAS(x))
1953 #define DLB2_CHP_LDB_CQ2VAS_RST 0x0
1954 
1955 #define DLB2_CHP_LDB_CQ2VAS_CQ2VAS	0x0000001F
1956 #define DLB2_CHP_LDB_CQ2VAS_RSVD0	0xFFFFFFE0
1957 #define DLB2_CHP_LDB_CQ2VAS_CQ2VAS_LOC	0
1958 #define DLB2_CHP_LDB_CQ2VAS_RSVD0_LOC	5
1959 
1960 #define DLB2_CHP_CFG_CHP_CSR_CTRL 0x44000008
1961 #define DLB2_CHP_CFG_CHP_CSR_CTRL_RST 0x180002
1962 
1963 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_COR_ALARM_DIS		0x00000001
1964 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_COR_SYND_DIS		0x00000002
1965 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_UNCR_ALARM_DIS		0x00000004
1966 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_UNC_SYND_DIS		0x00000008
1967 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF0_ALARM_DIS		0x00000010
1968 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF0_SYND_DIS		0x00000020
1969 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF1_ALARM_DIS		0x00000040
1970 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF1_SYND_DIS		0x00000080
1971 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF2_ALARM_DIS		0x00000100
1972 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF2_SYND_DIS		0x00000200
1973 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF3_ALARM_DIS		0x00000400
1974 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF3_SYND_DIS		0x00000800
1975 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF4_ALARM_DIS		0x00001000
1976 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF4_SYND_DIS		0x00002000
1977 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF5_ALARM_DIS		0x00004000
1978 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF5_SYND_DIS		0x00008000
1979 #define DLB2_CHP_CFG_CHP_CSR_CTRL_DLB_COR_ALARM_ENABLE	0x00010000
1980 #define DLB2_CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_LDB_CQ_MODE	0x00020000
1981 #define DLB2_CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_DIR_CQ_MODE	0x00040000
1982 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_LDB		0x00080000
1983 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_DIR		0x00100000
1984 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_LDB	0x00200000
1985 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_DIR	0x00400000
1986 #define DLB2_CHP_CFG_CHP_CSR_CTRL_RSVZ0			0xFF800000
1987 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_COR_ALARM_DIS_LOC		0
1988 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_COR_SYND_DIS_LOC		1
1989 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_UNCR_ALARM_DIS_LOC		2
1990 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_UNC_SYND_DIS_LOC		3
1991 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF0_ALARM_DIS_LOC		4
1992 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF0_SYND_DIS_LOC		5
1993 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF1_ALARM_DIS_LOC		6
1994 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF1_SYND_DIS_LOC		7
1995 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF2_ALARM_DIS_LOC		8
1996 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF2_SYND_DIS_LOC		9
1997 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF3_ALARM_DIS_LOC		10
1998 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF3_SYND_DIS_LOC		11
1999 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF4_ALARM_DIS_LOC		12
2000 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF4_SYND_DIS_LOC		13
2001 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF5_ALARM_DIS_LOC		14
2002 #define DLB2_CHP_CFG_CHP_CSR_CTRL_INT_INF5_SYND_DIS_LOC		15
2003 #define DLB2_CHP_CFG_CHP_CSR_CTRL_DLB_COR_ALARM_ENABLE_LOC		16
2004 #define DLB2_CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_LDB_CQ_MODE_LOC	17
2005 #define DLB2_CHP_CFG_CHP_CSR_CTRL_CFG_64BYTES_QE_DIR_CQ_MODE_LOC	18
2006 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_LDB_LOC			19
2007 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_WRITE_DIR_LOC			20
2008 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_LDB_LOC		21
2009 #define DLB2_CHP_CFG_CHP_CSR_CTRL_PAD_FIRST_WRITE_DIR_LOC		22
2010 #define DLB2_CHP_CFG_CHP_CSR_CTRL_RSVZ0_LOC				23
2011 
2012 #define DLB2_V2CHP_DIR_CQ_INTR_ARMED0 0x4400005c
2013 #define DLB2_V2_5CHP_DIR_CQ_INTR_ARMED0 0x4400004c
2014 #define DLB2_CHP_DIR_CQ_INTR_ARMED0(ver) \
2015 	(ver == DLB2_HW_V2 ? \
2016 	 DLB2_V2CHP_DIR_CQ_INTR_ARMED0 : \
2017 	 DLB2_V2_5CHP_DIR_CQ_INTR_ARMED0)
2018 #define DLB2_CHP_DIR_CQ_INTR_ARMED0_RST 0x0
2019 
2020 #define DLB2_CHP_DIR_CQ_INTR_ARMED0_ARMED	0xFFFFFFFF
2021 #define DLB2_CHP_DIR_CQ_INTR_ARMED0_ARMED_LOC	0
2022 
2023 #define DLB2_V2CHP_DIR_CQ_INTR_ARMED1 0x44000060
2024 #define DLB2_V2_5CHP_DIR_CQ_INTR_ARMED1 0x44000050
2025 #define DLB2_CHP_DIR_CQ_INTR_ARMED1(ver) \
2026 	(ver == DLB2_HW_V2 ? \
2027 	 DLB2_V2CHP_DIR_CQ_INTR_ARMED1 : \
2028 	 DLB2_V2_5CHP_DIR_CQ_INTR_ARMED1)
2029 #define DLB2_CHP_DIR_CQ_INTR_ARMED1_RST 0x0
2030 
2031 #define DLB2_CHP_DIR_CQ_INTR_ARMED1_ARMED	0xFFFFFFFF
2032 #define DLB2_CHP_DIR_CQ_INTR_ARMED1_ARMED_LOC	0
2033 
2034 #define DLB2_V2CHP_CFG_DIR_CQ_TIMER_CTL 0x44000084
2035 #define DLB2_V2_5CHP_CFG_DIR_CQ_TIMER_CTL 0x44000088
2036 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL(ver) \
2037 	(ver == DLB2_HW_V2 ? \
2038 	 DLB2_V2CHP_CFG_DIR_CQ_TIMER_CTL : \
2039 	 DLB2_V2_5CHP_CFG_DIR_CQ_TIMER_CTL)
2040 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL_RST 0x0
2041 
2042 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL_SAMPLE_INTERVAL	0x000000FF
2043 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL_ENB			0x00000100
2044 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL_RSVZ0			0xFFFFFE00
2045 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL_SAMPLE_INTERVAL_LOC	0
2046 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL_ENB_LOC		8
2047 #define DLB2_CHP_CFG_DIR_CQ_TIMER_CTL_RSVZ0_LOC		9
2048 
2049 #define DLB2_V2CHP_CFG_DIR_WDTO_0 0x44000088
2050 #define DLB2_V2_5CHP_CFG_DIR_WDTO_0 0x4400008c
2051 #define DLB2_CHP_CFG_DIR_WDTO_0(ver) \
2052 	(ver == DLB2_HW_V2 ? \
2053 	 DLB2_V2CHP_CFG_DIR_WDTO_0 : \
2054 	 DLB2_V2_5CHP_CFG_DIR_WDTO_0)
2055 #define DLB2_CHP_CFG_DIR_WDTO_0_RST 0x0
2056 
2057 #define DLB2_CHP_CFG_DIR_WDTO_0_WDTO	0xFFFFFFFF
2058 #define DLB2_CHP_CFG_DIR_WDTO_0_WDTO_LOC	0
2059 
2060 #define DLB2_V2CHP_CFG_DIR_WDTO_1 0x4400008c
2061 #define DLB2_V2_5CHP_CFG_DIR_WDTO_1 0x44000090
2062 #define DLB2_CHP_CFG_DIR_WDTO_1(ver) \
2063 	(ver == DLB2_HW_V2 ? \
2064 	 DLB2_V2CHP_CFG_DIR_WDTO_1 : \
2065 	 DLB2_V2_5CHP_CFG_DIR_WDTO_1)
2066 #define DLB2_CHP_CFG_DIR_WDTO_1_RST 0x0
2067 
2068 #define DLB2_CHP_CFG_DIR_WDTO_1_WDTO	0xFFFFFFFF
2069 #define DLB2_CHP_CFG_DIR_WDTO_1_WDTO_LOC	0
2070 
2071 #define DLB2_V2CHP_CFG_DIR_WD_DISABLE0 0x44000098
2072 #define DLB2_V2_5CHP_CFG_DIR_WD_DISABLE0 0x440000a4
2073 #define DLB2_CHP_CFG_DIR_WD_DISABLE0(ver) \
2074 	(ver == DLB2_HW_V2 ? \
2075 	 DLB2_V2CHP_CFG_DIR_WD_DISABLE0 : \
2076 	 DLB2_V2_5CHP_CFG_DIR_WD_DISABLE0)
2077 #define DLB2_CHP_CFG_DIR_WD_DISABLE0_RST 0xffffffff
2078 
2079 #define DLB2_CHP_CFG_DIR_WD_DISABLE0_WD_DISABLE	0xFFFFFFFF
2080 #define DLB2_CHP_CFG_DIR_WD_DISABLE0_WD_DISABLE_LOC	0
2081 
2082 #define DLB2_V2CHP_CFG_DIR_WD_DISABLE1 0x4400009c
2083 #define DLB2_V2_5CHP_CFG_DIR_WD_DISABLE1 0x440000a8
2084 #define DLB2_CHP_CFG_DIR_WD_DISABLE1(ver) \
2085 	(ver == DLB2_HW_V2 ? \
2086 	 DLB2_V2CHP_CFG_DIR_WD_DISABLE1 : \
2087 	 DLB2_V2_5CHP_CFG_DIR_WD_DISABLE1)
2088 #define DLB2_CHP_CFG_DIR_WD_DISABLE1_RST 0xffffffff
2089 
2090 #define DLB2_CHP_CFG_DIR_WD_DISABLE1_WD_DISABLE	0xFFFFFFFF
2091 #define DLB2_CHP_CFG_DIR_WD_DISABLE1_WD_DISABLE_LOC	0
2092 
2093 #define DLB2_V2CHP_CFG_DIR_WD_ENB_INTERVAL 0x440000a0
2094 #define DLB2_V2_5CHP_CFG_DIR_WD_ENB_INTERVAL 0x440000b0
2095 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL(ver) \
2096 	(ver == DLB2_HW_V2 ? \
2097 	 DLB2_V2CHP_CFG_DIR_WD_ENB_INTERVAL : \
2098 	 DLB2_V2_5CHP_CFG_DIR_WD_ENB_INTERVAL)
2099 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL_RST 0x0
2100 
2101 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL_SAMPLE_INTERVAL	0x0FFFFFFF
2102 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL_ENB			0x10000000
2103 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL_RSVZ0		0xE0000000
2104 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL_SAMPLE_INTERVAL_LOC	0
2105 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL_ENB_LOC		28
2106 #define DLB2_CHP_CFG_DIR_WD_ENB_INTERVAL_RSVZ0_LOC		29
2107 
2108 #define DLB2_V2CHP_CFG_DIR_WD_THRESHOLD 0x440000ac
2109 #define DLB2_V2_5CHP_CFG_DIR_WD_THRESHOLD 0x440000c0
2110 #define DLB2_CHP_CFG_DIR_WD_THRESHOLD(ver) \
2111 	(ver == DLB2_HW_V2 ? \
2112 	 DLB2_V2CHP_CFG_DIR_WD_THRESHOLD : \
2113 	 DLB2_V2_5CHP_CFG_DIR_WD_THRESHOLD)
2114 #define DLB2_CHP_CFG_DIR_WD_THRESHOLD_RST 0x0
2115 
2116 #define DLB2_CHP_CFG_DIR_WD_THRESHOLD_WD_THRESHOLD	0x000000FF
2117 #define DLB2_CHP_CFG_DIR_WD_THRESHOLD_RSVZ0		0xFFFFFF00
2118 #define DLB2_CHP_CFG_DIR_WD_THRESHOLD_WD_THRESHOLD_LOC	0
2119 #define DLB2_CHP_CFG_DIR_WD_THRESHOLD_RSVZ0_LOC		8
2120 
2121 #define DLB2_V2CHP_LDB_CQ_INTR_ARMED0 0x440000b0
2122 #define DLB2_V2_5CHP_LDB_CQ_INTR_ARMED0 0x440000c4
2123 #define DLB2_CHP_LDB_CQ_INTR_ARMED0(ver) \
2124 	(ver == DLB2_HW_V2 ? \
2125 	 DLB2_V2CHP_LDB_CQ_INTR_ARMED0 : \
2126 	 DLB2_V2_5CHP_LDB_CQ_INTR_ARMED0)
2127 #define DLB2_CHP_LDB_CQ_INTR_ARMED0_RST 0x0
2128 
2129 #define DLB2_CHP_LDB_CQ_INTR_ARMED0_ARMED	0xFFFFFFFF
2130 #define DLB2_CHP_LDB_CQ_INTR_ARMED0_ARMED_LOC	0
2131 
2132 #define DLB2_V2CHP_LDB_CQ_INTR_ARMED1 0x440000b4
2133 #define DLB2_V2_5CHP_LDB_CQ_INTR_ARMED1 0x440000c8
2134 #define DLB2_CHP_LDB_CQ_INTR_ARMED1(ver) \
2135 	(ver == DLB2_HW_V2 ? \
2136 	 DLB2_V2CHP_LDB_CQ_INTR_ARMED1 : \
2137 	 DLB2_V2_5CHP_LDB_CQ_INTR_ARMED1)
2138 #define DLB2_CHP_LDB_CQ_INTR_ARMED1_RST 0x0
2139 
2140 #define DLB2_CHP_LDB_CQ_INTR_ARMED1_ARMED	0xFFFFFFFF
2141 #define DLB2_CHP_LDB_CQ_INTR_ARMED1_ARMED_LOC	0
2142 
2143 #define DLB2_V2CHP_CFG_LDB_CQ_TIMER_CTL 0x440000d8
2144 #define DLB2_V2_5CHP_CFG_LDB_CQ_TIMER_CTL 0x440000ec
2145 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL(ver) \
2146 	(ver == DLB2_HW_V2 ? \
2147 	 DLB2_V2CHP_CFG_LDB_CQ_TIMER_CTL : \
2148 	 DLB2_V2_5CHP_CFG_LDB_CQ_TIMER_CTL)
2149 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL_RST 0x0
2150 
2151 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL_SAMPLE_INTERVAL	0x000000FF
2152 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL_ENB			0x00000100
2153 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL_RSVZ0			0xFFFFFE00
2154 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL_SAMPLE_INTERVAL_LOC	0
2155 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL_ENB_LOC		8
2156 #define DLB2_CHP_CFG_LDB_CQ_TIMER_CTL_RSVZ0_LOC		9
2157 
2158 #define DLB2_V2CHP_CFG_LDB_WDTO_0 0x440000dc
2159 #define DLB2_V2_5CHP_CFG_LDB_WDTO_0 0x440000f0
2160 #define DLB2_CHP_CFG_LDB_WDTO_0(ver) \
2161 	(ver == DLB2_HW_V2 ? \
2162 	 DLB2_V2CHP_CFG_LDB_WDTO_0 : \
2163 	 DLB2_V2_5CHP_CFG_LDB_WDTO_0)
2164 #define DLB2_CHP_CFG_LDB_WDTO_0_RST 0x0
2165 
2166 #define DLB2_CHP_CFG_LDB_WDTO_0_WDTO	0xFFFFFFFF
2167 #define DLB2_CHP_CFG_LDB_WDTO_0_WDTO_LOC	0
2168 
2169 #define DLB2_V2CHP_CFG_LDB_WDTO_1 0x440000e0
2170 #define DLB2_V2_5CHP_CFG_LDB_WDTO_1 0x440000f4
2171 #define DLB2_CHP_CFG_LDB_WDTO_1(ver) \
2172 	(ver == DLB2_HW_V2 ? \
2173 	 DLB2_V2CHP_CFG_LDB_WDTO_1 : \
2174 	 DLB2_V2_5CHP_CFG_LDB_WDTO_1)
2175 #define DLB2_CHP_CFG_LDB_WDTO_1_RST 0x0
2176 
2177 #define DLB2_CHP_CFG_LDB_WDTO_1_WDTO	0xFFFFFFFF
2178 #define DLB2_CHP_CFG_LDB_WDTO_1_WDTO_LOC	0
2179 
2180 #define DLB2_V2CHP_CFG_LDB_WD_DISABLE0 0x440000ec
2181 #define DLB2_V2_5CHP_CFG_LDB_WD_DISABLE0 0x44000100
2182 #define DLB2_CHP_CFG_LDB_WD_DISABLE0(ver) \
2183 	(ver == DLB2_HW_V2 ? \
2184 	 DLB2_V2CHP_CFG_LDB_WD_DISABLE0 : \
2185 	 DLB2_V2_5CHP_CFG_LDB_WD_DISABLE0)
2186 #define DLB2_CHP_CFG_LDB_WD_DISABLE0_RST 0xffffffff
2187 
2188 #define DLB2_CHP_CFG_LDB_WD_DISABLE0_WD_DISABLE	0xFFFFFFFF
2189 #define DLB2_CHP_CFG_LDB_WD_DISABLE0_WD_DISABLE_LOC	0
2190 
2191 #define DLB2_V2CHP_CFG_LDB_WD_DISABLE1 0x440000f0
2192 #define DLB2_V2_5CHP_CFG_LDB_WD_DISABLE1 0x44000104
2193 #define DLB2_CHP_CFG_LDB_WD_DISABLE1(ver) \
2194 	(ver == DLB2_HW_V2 ? \
2195 	 DLB2_V2CHP_CFG_LDB_WD_DISABLE1 : \
2196 	 DLB2_V2_5CHP_CFG_LDB_WD_DISABLE1)
2197 #define DLB2_CHP_CFG_LDB_WD_DISABLE1_RST 0xffffffff
2198 
2199 #define DLB2_CHP_CFG_LDB_WD_DISABLE1_WD_DISABLE	0xFFFFFFFF
2200 #define DLB2_CHP_CFG_LDB_WD_DISABLE1_WD_DISABLE_LOC	0
2201 
2202 #define DLB2_V2CHP_CFG_LDB_WD_ENB_INTERVAL 0x440000f4
2203 #define DLB2_V2_5CHP_CFG_LDB_WD_ENB_INTERVAL 0x44000108
2204 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL(ver) \
2205 	(ver == DLB2_HW_V2 ? \
2206 	 DLB2_V2CHP_CFG_LDB_WD_ENB_INTERVAL : \
2207 	 DLB2_V2_5CHP_CFG_LDB_WD_ENB_INTERVAL)
2208 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL_RST 0x0
2209 
2210 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL_SAMPLE_INTERVAL	0x0FFFFFFF
2211 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL_ENB			0x10000000
2212 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL_RSVZ0		0xE0000000
2213 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL_SAMPLE_INTERVAL_LOC	0
2214 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL_ENB_LOC		28
2215 #define DLB2_CHP_CFG_LDB_WD_ENB_INTERVAL_RSVZ0_LOC		29
2216 
2217 #define DLB2_V2CHP_CFG_LDB_WD_THRESHOLD 0x44000100
2218 #define DLB2_V2_5CHP_CFG_LDB_WD_THRESHOLD 0x44000114
2219 #define DLB2_CHP_CFG_LDB_WD_THRESHOLD(ver) \
2220 	(ver == DLB2_HW_V2 ? \
2221 	 DLB2_V2CHP_CFG_LDB_WD_THRESHOLD : \
2222 	 DLB2_V2_5CHP_CFG_LDB_WD_THRESHOLD)
2223 #define DLB2_CHP_CFG_LDB_WD_THRESHOLD_RST 0x0
2224 
2225 #define DLB2_CHP_CFG_LDB_WD_THRESHOLD_WD_THRESHOLD	0x000000FF
2226 #define DLB2_CHP_CFG_LDB_WD_THRESHOLD_RSVZ0		0xFFFFFF00
2227 #define DLB2_CHP_CFG_LDB_WD_THRESHOLD_WD_THRESHOLD_LOC	0
2228 #define DLB2_CHP_CFG_LDB_WD_THRESHOLD_RSVZ0_LOC		8
2229 
2230 #define DLB2_CHP_SMON_COMPARE0 0x4c000000
2231 #define DLB2_CHP_SMON_COMPARE0_RST 0x0
2232 
2233 #define DLB2_CHP_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
2234 #define DLB2_CHP_SMON_COMPARE0_COMPARE0_LOC	0
2235 
2236 #define DLB2_CHP_SMON_COMPARE1 0x4c000004
2237 #define DLB2_CHP_SMON_COMPARE1_RST 0x0
2238 
2239 #define DLB2_CHP_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
2240 #define DLB2_CHP_SMON_COMPARE1_COMPARE1_LOC	0
2241 
2242 #define DLB2_CHP_SMON_CFG0 0x4c000008
2243 #define DLB2_CHP_SMON_CFG0_RST 0x40000000
2244 
2245 #define DLB2_CHP_SMON_CFG0_SMON_ENABLE		0x00000001
2246 #define DLB2_CHP_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
2247 #define DLB2_CHP_SMON_CFG0_RSVZ0			0x0000000C
2248 #define DLB2_CHP_SMON_CFG0_SMON0_FUNCTION		0x00000070
2249 #define DLB2_CHP_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
2250 #define DLB2_CHP_SMON_CFG0_SMON1_FUNCTION		0x00000700
2251 #define DLB2_CHP_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
2252 #define DLB2_CHP_SMON_CFG0_SMON_MODE			0x0000F000
2253 #define DLB2_CHP_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
2254 #define DLB2_CHP_SMON_CFG0_INTCOUNTEROVFL		0x00020000
2255 #define DLB2_CHP_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
2256 #define DLB2_CHP_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
2257 #define DLB2_CHP_SMON_CFG0_STOPTIMEROVFL		0x00100000
2258 #define DLB2_CHP_SMON_CFG0_INTTIMEROVFL		0x00200000
2259 #define DLB2_CHP_SMON_CFG0_STATTIMEROVFL		0x00400000
2260 #define DLB2_CHP_SMON_CFG0_RSVZ1			0x00800000
2261 #define DLB2_CHP_SMON_CFG0_TIMER_PRESCALE		0x1F000000
2262 #define DLB2_CHP_SMON_CFG0_RSVZ2			0x20000000
2263 #define DLB2_CHP_SMON_CFG0_VERSION			0xC0000000
2264 #define DLB2_CHP_SMON_CFG0_SMON_ENABLE_LOC			0
2265 #define DLB2_CHP_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC		1
2266 #define DLB2_CHP_SMON_CFG0_RSVZ0_LOC				2
2267 #define DLB2_CHP_SMON_CFG0_SMON0_FUNCTION_LOC		4
2268 #define DLB2_CHP_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
2269 #define DLB2_CHP_SMON_CFG0_SMON1_FUNCTION_LOC		8
2270 #define DLB2_CHP_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
2271 #define DLB2_CHP_SMON_CFG0_SMON_MODE_LOC			12
2272 #define DLB2_CHP_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
2273 #define DLB2_CHP_SMON_CFG0_INTCOUNTEROVFL_LOC		17
2274 #define DLB2_CHP_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
2275 #define DLB2_CHP_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
2276 #define DLB2_CHP_SMON_CFG0_STOPTIMEROVFL_LOC			20
2277 #define DLB2_CHP_SMON_CFG0_INTTIMEROVFL_LOC			21
2278 #define DLB2_CHP_SMON_CFG0_STATTIMEROVFL_LOC			22
2279 #define DLB2_CHP_SMON_CFG0_RSVZ1_LOC				23
2280 #define DLB2_CHP_SMON_CFG0_TIMER_PRESCALE_LOC		24
2281 #define DLB2_CHP_SMON_CFG0_RSVZ2_LOC				29
2282 #define DLB2_CHP_SMON_CFG0_VERSION_LOC			30
2283 
2284 #define DLB2_CHP_SMON_CFG1 0x4c00000c
2285 #define DLB2_CHP_SMON_CFG1_RST 0x0
2286 
2287 #define DLB2_CHP_SMON_CFG1_MODE0	0x000000FF
2288 #define DLB2_CHP_SMON_CFG1_MODE1	0x0000FF00
2289 #define DLB2_CHP_SMON_CFG1_RSVZ0	0xFFFF0000
2290 #define DLB2_CHP_SMON_CFG1_MODE0_LOC	0
2291 #define DLB2_CHP_SMON_CFG1_MODE1_LOC	8
2292 #define DLB2_CHP_SMON_CFG1_RSVZ0_LOC	16
2293 
2294 #define DLB2_CHP_SMON_ACTIVITYCNTR0 0x4c000010
2295 #define DLB2_CHP_SMON_ACTIVITYCNTR0_RST 0x0
2296 
2297 #define DLB2_CHP_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
2298 #define DLB2_CHP_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
2299 
2300 #define DLB2_CHP_SMON_ACTIVITYCNTR1 0x4c000014
2301 #define DLB2_CHP_SMON_ACTIVITYCNTR1_RST 0x0
2302 
2303 #define DLB2_CHP_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
2304 #define DLB2_CHP_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
2305 
2306 #define DLB2_CHP_SMON_MAX_TMR 0x4c000018
2307 #define DLB2_CHP_SMON_MAX_TMR_RST 0x0
2308 
2309 #define DLB2_CHP_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
2310 #define DLB2_CHP_SMON_MAX_TMR_MAXVALUE_LOC	0
2311 
2312 #define DLB2_CHP_SMON_TMR 0x4c00001c
2313 #define DLB2_CHP_SMON_TMR_RST 0x0
2314 
2315 #define DLB2_CHP_SMON_TMR_TIMER	0xFFFFFFFF
2316 #define DLB2_CHP_SMON_TMR_TIMER_LOC	0
2317 
2318 #define DLB2_CHP_CTRL_DIAG_02 0x4c000028
2319 #define DLB2_CHP_CTRL_DIAG_02_RST 0x1555
2320 
2321 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_EMPTY_V2	0x00000001
2322 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_AFULL_V2	0x00000002
2323 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_EMPTY_V2 0x04
2324 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_AFULL_V2 0x08
2325 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_EMPTY_V2 0x0010
2326 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_AFULL_V2 0x0020
2327 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_EMPTY_V2    0x0040
2328 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_AFULL_V2    0x0080
2329 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_EMPTY_V2	 0x0100
2330 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_AFULL_V2	 0x0200
2331 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_EMPTY_V2	0x0400
2332 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_AFULL_V2	0x0800
2333 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_EMPTY_V2    0x1000
2334 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_AFULL_V2    0x2000
2335 #define DLB2_CHP_CTRL_DIAG_02_RSVD0_V2				    0xFFFFC000
2336 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_EMPTY_V2_LOC	    0
2337 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_AFULL_V2_LOC	    1
2338 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_EMPTY_V2_LOC 2
2339 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_AFULL_V2_LOC 3
2340 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_EMPTY_V2_LOC 4
2341 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_AFULL_V2_LOC 5
2342 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_EMPTY_V2_LOC    6
2343 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_AFULL_V2_LOC    7
2344 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_EMPTY_V2_LOC	  8
2345 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_AFULL_V2_LOC	  9
2346 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_EMPTY_V2_LOC	  10
2347 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_AFULL_V2_LOC	  11
2348 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_EMPTY_V2_LOC 12
2349 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_AFULL_V2_LOC 13
2350 #define DLB2_CHP_CTRL_DIAG_02_RSVD0_V2_LOC				  14
2351 
2352 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_EMPTY_V2_5	     0x00000001
2353 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_AFULL_V2_5	     0x00000002
2354 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_EMPTY_V2_5  4
2355 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_AFULL_V2_5  8
2356 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_EMPTY_V2_5 0x10
2357 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_AFULL_V2_5 0x20
2358 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_EMPTY_V2_5	0x0040
2359 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_AFULL_V2_5	0x0080
2360 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_EMPTY_V2_5 0x00000100
2361 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_AFULL_V2_5 0x00000200
2362 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_EMPTY_V2_5 0x0400
2363 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_AFULL_V2_5 0x0800
2364 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_EMPTY_V2_5 0x1000
2365 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_AFULL_V2_5 0x2000
2366 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOKEN_QB_STATUS_SIZE_V2_5	    0x0001C000
2367 #define DLB2_CHP_CTRL_DIAG_02_FREELIST_SIZE_V2_5		    0xFFFE0000
2368 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_EMPTY_V2_5_LOC 0
2369 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_CREDIT_STATUS_AFULL_V2_5_LOC 1
2370 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_EMPTY_V2_5_LOC 2
2371 #define DLB2_CHP_CTRL_DIAG_02_CHP_OUT_HCW_PIPE_CREDIT_STATUS_AFULL_V2_5_LOC 3
2372 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_EMPTY_V2_5_LOC 4
2373 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_AP_CMP_PIPE_CREDIT_STATUS_AFULL_V2_5_LOC 5
2374 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_EMPTY_V2_5_LOC    6
2375 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOK_PIPE_CREDIT_STATUS_AFULL_V2_5_LOC 7
2376 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_EMPTY_V2_5_LOC	    8
2377 #define DLB2_CHP_CTRL_DIAG_02_CHP_ROP_PIPE_CREDIT_STATUS_AFULL_V2_5_LOC	    9
2378 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_EMPTY_V2_5_LOC   10
2379 #define DLB2_CHP_CTRL_DIAG_02_QED_TO_CQ_PIPE_CREDIT_STATUS_AFULL_V2_5_LOC   11
2380 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_EMPTY_V2_5_LOC 12
2381 #define DLB2_CHP_CTRL_DIAG_02_EGRESS_LSP_TOKEN_CREDIT_STATUS_AFULL_V2_5_LOC 13
2382 #define DLB2_CHP_CTRL_DIAG_02_CHP_LSP_TOKEN_QB_STATUS_SIZE_V2_5_LOC	    14
2383 #define DLB2_CHP_CTRL_DIAG_02_FREELIST_SIZE_V2_5_LOC			    17
2384 
2385 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0 0x54000000
2386 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_RST 0xfefcfaf8
2387 
2388 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI0	0x000000FF
2389 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI1	0x0000FF00
2390 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI2	0x00FF0000
2391 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI3	0xFF000000
2392 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI0_LOC	0
2393 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI1_LOC	8
2394 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI2_LOC	16
2395 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_0_PRI3_LOC	24
2396 
2397 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1 0x54000004
2398 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1_RST 0x0
2399 
2400 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1_RSVZ0	0xFFFFFFFF
2401 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_DIR_1_RSVZ0_LOC	0
2402 
2403 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0 0x54000008
2404 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_RST 0xfefcfaf8
2405 
2406 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0	0x000000FF
2407 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1	0x0000FF00
2408 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2	0x00FF0000
2409 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3	0xFF000000
2410 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0_LOC	0
2411 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1_LOC	8
2412 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2_LOC	16
2413 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3_LOC	24
2414 
2415 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1 0x5400000c
2416 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RST 0x0
2417 
2418 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0	0xFFFFFFFF
2419 #define DLB2_DP_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0_LOC	0
2420 
2421 #define DLB2_DP_DIR_CSR_CTRL 0x54000010
2422 #define DLB2_DP_DIR_CSR_CTRL_RST 0x0
2423 
2424 #define DLB2_DP_DIR_CSR_CTRL_INT_COR_ALARM_DIS	0x00000001
2425 #define DLB2_DP_DIR_CSR_CTRL_INT_COR_SYND_DIS	0x00000002
2426 #define DLB2_DP_DIR_CSR_CTRL_INT_UNCR_ALARM_DIS	0x00000004
2427 #define DLB2_DP_DIR_CSR_CTRL_INT_UNC_SYND_DIS	0x00000008
2428 #define DLB2_DP_DIR_CSR_CTRL_INT_INF0_ALARM_DIS	0x00000010
2429 #define DLB2_DP_DIR_CSR_CTRL_INT_INF0_SYND_DIS	0x00000020
2430 #define DLB2_DP_DIR_CSR_CTRL_INT_INF1_ALARM_DIS	0x00000040
2431 #define DLB2_DP_DIR_CSR_CTRL_INT_INF1_SYND_DIS	0x00000080
2432 #define DLB2_DP_DIR_CSR_CTRL_INT_INF2_ALARM_DIS	0x00000100
2433 #define DLB2_DP_DIR_CSR_CTRL_INT_INF2_SYND_DIS	0x00000200
2434 #define DLB2_DP_DIR_CSR_CTRL_INT_INF3_ALARM_DIS	0x00000400
2435 #define DLB2_DP_DIR_CSR_CTRL_INT_INF3_SYND_DIS	0x00000800
2436 #define DLB2_DP_DIR_CSR_CTRL_INT_INF4_ALARM_DIS	0x00001000
2437 #define DLB2_DP_DIR_CSR_CTRL_INT_INF4_SYND_DIS	0x00002000
2438 #define DLB2_DP_DIR_CSR_CTRL_INT_INF5_ALARM_DIS	0x00004000
2439 #define DLB2_DP_DIR_CSR_CTRL_INT_INF5_SYND_DIS	0x00008000
2440 #define DLB2_DP_DIR_CSR_CTRL_RSVZ0			0xFFFF0000
2441 #define DLB2_DP_DIR_CSR_CTRL_INT_COR_ALARM_DIS_LOC	0
2442 #define DLB2_DP_DIR_CSR_CTRL_INT_COR_SYND_DIS_LOC	1
2443 #define DLB2_DP_DIR_CSR_CTRL_INT_UNCR_ALARM_DIS_LOC	2
2444 #define DLB2_DP_DIR_CSR_CTRL_INT_UNC_SYND_DIS_LOC	3
2445 #define DLB2_DP_DIR_CSR_CTRL_INT_INF0_ALARM_DIS_LOC	4
2446 #define DLB2_DP_DIR_CSR_CTRL_INT_INF0_SYND_DIS_LOC	5
2447 #define DLB2_DP_DIR_CSR_CTRL_INT_INF1_ALARM_DIS_LOC	6
2448 #define DLB2_DP_DIR_CSR_CTRL_INT_INF1_SYND_DIS_LOC	7
2449 #define DLB2_DP_DIR_CSR_CTRL_INT_INF2_ALARM_DIS_LOC	8
2450 #define DLB2_DP_DIR_CSR_CTRL_INT_INF2_SYND_DIS_LOC	9
2451 #define DLB2_DP_DIR_CSR_CTRL_INT_INF3_ALARM_DIS_LOC	10
2452 #define DLB2_DP_DIR_CSR_CTRL_INT_INF3_SYND_DIS_LOC	11
2453 #define DLB2_DP_DIR_CSR_CTRL_INT_INF4_ALARM_DIS_LOC	12
2454 #define DLB2_DP_DIR_CSR_CTRL_INT_INF4_SYND_DIS_LOC	13
2455 #define DLB2_DP_DIR_CSR_CTRL_INT_INF5_ALARM_DIS_LOC	14
2456 #define DLB2_DP_DIR_CSR_CTRL_INT_INF5_SYND_DIS_LOC	15
2457 #define DLB2_DP_DIR_CSR_CTRL_RSVZ0_LOC		16
2458 
2459 #define DLB2_DP_SMON_ACTIVITYCNTR0 0x5c000058
2460 #define DLB2_DP_SMON_ACTIVITYCNTR0_RST 0x0
2461 
2462 #define DLB2_DP_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
2463 #define DLB2_DP_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
2464 
2465 #define DLB2_DP_SMON_ACTIVITYCNTR1 0x5c00005c
2466 #define DLB2_DP_SMON_ACTIVITYCNTR1_RST 0x0
2467 
2468 #define DLB2_DP_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
2469 #define DLB2_DP_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
2470 
2471 #define DLB2_DP_SMON_COMPARE0 0x5c000060
2472 #define DLB2_DP_SMON_COMPARE0_RST 0x0
2473 
2474 #define DLB2_DP_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
2475 #define DLB2_DP_SMON_COMPARE0_COMPARE0_LOC	0
2476 
2477 #define DLB2_DP_SMON_COMPARE1 0x5c000064
2478 #define DLB2_DP_SMON_COMPARE1_RST 0x0
2479 
2480 #define DLB2_DP_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
2481 #define DLB2_DP_SMON_COMPARE1_COMPARE1_LOC	0
2482 
2483 #define DLB2_DP_SMON_CFG0 0x5c000068
2484 #define DLB2_DP_SMON_CFG0_RST 0x40000000
2485 
2486 #define DLB2_DP_SMON_CFG0_SMON_ENABLE		0x00000001
2487 #define DLB2_DP_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
2488 #define DLB2_DP_SMON_CFG0_RSVZ0			0x0000000C
2489 #define DLB2_DP_SMON_CFG0_SMON0_FUNCTION		0x00000070
2490 #define DLB2_DP_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
2491 #define DLB2_DP_SMON_CFG0_SMON1_FUNCTION		0x00000700
2492 #define DLB2_DP_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
2493 #define DLB2_DP_SMON_CFG0_SMON_MODE			0x0000F000
2494 #define DLB2_DP_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
2495 #define DLB2_DP_SMON_CFG0_INTCOUNTEROVFL		0x00020000
2496 #define DLB2_DP_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
2497 #define DLB2_DP_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
2498 #define DLB2_DP_SMON_CFG0_STOPTIMEROVFL		0x00100000
2499 #define DLB2_DP_SMON_CFG0_INTTIMEROVFL		0x00200000
2500 #define DLB2_DP_SMON_CFG0_STATTIMEROVFL		0x00400000
2501 #define DLB2_DP_SMON_CFG0_RSVZ1			0x00800000
2502 #define DLB2_DP_SMON_CFG0_TIMER_PRESCALE		0x1F000000
2503 #define DLB2_DP_SMON_CFG0_RSVZ2			0x20000000
2504 #define DLB2_DP_SMON_CFG0_VERSION			0xC0000000
2505 #define DLB2_DP_SMON_CFG0_SMON_ENABLE_LOC		0
2506 #define DLB2_DP_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC	1
2507 #define DLB2_DP_SMON_CFG0_RSVZ0_LOC			2
2508 #define DLB2_DP_SMON_CFG0_SMON0_FUNCTION_LOC		4
2509 #define DLB2_DP_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
2510 #define DLB2_DP_SMON_CFG0_SMON1_FUNCTION_LOC		8
2511 #define DLB2_DP_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
2512 #define DLB2_DP_SMON_CFG0_SMON_MODE_LOC		12
2513 #define DLB2_DP_SMON_CFG0_STOPCOUNTEROVFL_LOC	16
2514 #define DLB2_DP_SMON_CFG0_INTCOUNTEROVFL_LOC		17
2515 #define DLB2_DP_SMON_CFG0_STATCOUNTER0OVFL_LOC	18
2516 #define DLB2_DP_SMON_CFG0_STATCOUNTER1OVFL_LOC	19
2517 #define DLB2_DP_SMON_CFG0_STOPTIMEROVFL_LOC		20
2518 #define DLB2_DP_SMON_CFG0_INTTIMEROVFL_LOC		21
2519 #define DLB2_DP_SMON_CFG0_STATTIMEROVFL_LOC		22
2520 #define DLB2_DP_SMON_CFG0_RSVZ1_LOC			23
2521 #define DLB2_DP_SMON_CFG0_TIMER_PRESCALE_LOC		24
2522 #define DLB2_DP_SMON_CFG0_RSVZ2_LOC			29
2523 #define DLB2_DP_SMON_CFG0_VERSION_LOC		30
2524 
2525 #define DLB2_DP_SMON_CFG1 0x5c00006c
2526 #define DLB2_DP_SMON_CFG1_RST 0x0
2527 
2528 #define DLB2_DP_SMON_CFG1_MODE0	0x000000FF
2529 #define DLB2_DP_SMON_CFG1_MODE1	0x0000FF00
2530 #define DLB2_DP_SMON_CFG1_RSVZ0	0xFFFF0000
2531 #define DLB2_DP_SMON_CFG1_MODE0_LOC	0
2532 #define DLB2_DP_SMON_CFG1_MODE1_LOC	8
2533 #define DLB2_DP_SMON_CFG1_RSVZ0_LOC	16
2534 
2535 #define DLB2_DP_SMON_MAX_TMR 0x5c000070
2536 #define DLB2_DP_SMON_MAX_TMR_RST 0x0
2537 
2538 #define DLB2_DP_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
2539 #define DLB2_DP_SMON_MAX_TMR_MAXVALUE_LOC	0
2540 
2541 #define DLB2_DP_SMON_TMR 0x5c000074
2542 #define DLB2_DP_SMON_TMR_RST 0x0
2543 
2544 #define DLB2_DP_SMON_TMR_TIMER	0xFFFFFFFF
2545 #define DLB2_DP_SMON_TMR_TIMER_LOC	0
2546 
2547 #define DLB2_DQED_SMON_ACTIVITYCNTR0 0x6c000024
2548 #define DLB2_DQED_SMON_ACTIVITYCNTR0_RST 0x0
2549 
2550 #define DLB2_DQED_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
2551 #define DLB2_DQED_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
2552 
2553 #define DLB2_DQED_SMON_ACTIVITYCNTR1 0x6c000028
2554 #define DLB2_DQED_SMON_ACTIVITYCNTR1_RST 0x0
2555 
2556 #define DLB2_DQED_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
2557 #define DLB2_DQED_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
2558 
2559 #define DLB2_DQED_SMON_COMPARE0 0x6c00002c
2560 #define DLB2_DQED_SMON_COMPARE0_RST 0x0
2561 
2562 #define DLB2_DQED_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
2563 #define DLB2_DQED_SMON_COMPARE0_COMPARE0_LOC	0
2564 
2565 #define DLB2_DQED_SMON_COMPARE1 0x6c000030
2566 #define DLB2_DQED_SMON_COMPARE1_RST 0x0
2567 
2568 #define DLB2_DQED_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
2569 #define DLB2_DQED_SMON_COMPARE1_COMPARE1_LOC	0
2570 
2571 #define DLB2_DQED_SMON_CFG0 0x6c000034
2572 #define DLB2_DQED_SMON_CFG0_RST 0x40000000
2573 
2574 #define DLB2_DQED_SMON_CFG0_SMON_ENABLE		0x00000001
2575 #define DLB2_DQED_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
2576 #define DLB2_DQED_SMON_CFG0_RSVZ0			0x0000000C
2577 #define DLB2_DQED_SMON_CFG0_SMON0_FUNCTION		0x00000070
2578 #define DLB2_DQED_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
2579 #define DLB2_DQED_SMON_CFG0_SMON1_FUNCTION		0x00000700
2580 #define DLB2_DQED_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
2581 #define DLB2_DQED_SMON_CFG0_SMON_MODE		0x0000F000
2582 #define DLB2_DQED_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
2583 #define DLB2_DQED_SMON_CFG0_INTCOUNTEROVFL		0x00020000
2584 #define DLB2_DQED_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
2585 #define DLB2_DQED_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
2586 #define DLB2_DQED_SMON_CFG0_STOPTIMEROVFL		0x00100000
2587 #define DLB2_DQED_SMON_CFG0_INTTIMEROVFL		0x00200000
2588 #define DLB2_DQED_SMON_CFG0_STATTIMEROVFL		0x00400000
2589 #define DLB2_DQED_SMON_CFG0_RSVZ1			0x00800000
2590 #define DLB2_DQED_SMON_CFG0_TIMER_PRESCALE		0x1F000000
2591 #define DLB2_DQED_SMON_CFG0_RSVZ2			0x20000000
2592 #define DLB2_DQED_SMON_CFG0_VERSION			0xC0000000
2593 #define DLB2_DQED_SMON_CFG0_SMON_ENABLE_LOC			0
2594 #define DLB2_DQED_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC		1
2595 #define DLB2_DQED_SMON_CFG0_RSVZ0_LOC			2
2596 #define DLB2_DQED_SMON_CFG0_SMON0_FUNCTION_LOC		4
2597 #define DLB2_DQED_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
2598 #define DLB2_DQED_SMON_CFG0_SMON1_FUNCTION_LOC		8
2599 #define DLB2_DQED_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
2600 #define DLB2_DQED_SMON_CFG0_SMON_MODE_LOC			12
2601 #define DLB2_DQED_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
2602 #define DLB2_DQED_SMON_CFG0_INTCOUNTEROVFL_LOC		17
2603 #define DLB2_DQED_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
2604 #define DLB2_DQED_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
2605 #define DLB2_DQED_SMON_CFG0_STOPTIMEROVFL_LOC		20
2606 #define DLB2_DQED_SMON_CFG0_INTTIMEROVFL_LOC			21
2607 #define DLB2_DQED_SMON_CFG0_STATTIMEROVFL_LOC		22
2608 #define DLB2_DQED_SMON_CFG0_RSVZ1_LOC			23
2609 #define DLB2_DQED_SMON_CFG0_TIMER_PRESCALE_LOC		24
2610 #define DLB2_DQED_SMON_CFG0_RSVZ2_LOC			29
2611 #define DLB2_DQED_SMON_CFG0_VERSION_LOC			30
2612 
2613 #define DLB2_DQED_SMON_CFG1 0x6c000038
2614 #define DLB2_DQED_SMON_CFG1_RST 0x0
2615 
2616 #define DLB2_DQED_SMON_CFG1_MODE0	0x000000FF
2617 #define DLB2_DQED_SMON_CFG1_MODE1	0x0000FF00
2618 #define DLB2_DQED_SMON_CFG1_RSVZ0	0xFFFF0000
2619 #define DLB2_DQED_SMON_CFG1_MODE0_LOC	0
2620 #define DLB2_DQED_SMON_CFG1_MODE1_LOC	8
2621 #define DLB2_DQED_SMON_CFG1_RSVZ0_LOC	16
2622 
2623 #define DLB2_DQED_SMON_MAX_TMR 0x6c00003c
2624 #define DLB2_DQED_SMON_MAX_TMR_RST 0x0
2625 
2626 #define DLB2_DQED_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
2627 #define DLB2_DQED_SMON_MAX_TMR_MAXVALUE_LOC	0
2628 
2629 #define DLB2_DQED_SMON_TMR 0x6c000040
2630 #define DLB2_DQED_SMON_TMR_RST 0x0
2631 
2632 #define DLB2_DQED_SMON_TMR_TIMER	0xFFFFFFFF
2633 #define DLB2_DQED_SMON_TMR_TIMER_LOC	0
2634 
2635 #define DLB2_QED_SMON_ACTIVITYCNTR0 0x7c000024
2636 #define DLB2_QED_SMON_ACTIVITYCNTR0_RST 0x0
2637 
2638 #define DLB2_QED_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
2639 #define DLB2_QED_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
2640 
2641 #define DLB2_QED_SMON_ACTIVITYCNTR1 0x7c000028
2642 #define DLB2_QED_SMON_ACTIVITYCNTR1_RST 0x0
2643 
2644 #define DLB2_QED_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
2645 #define DLB2_QED_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
2646 
2647 #define DLB2_QED_SMON_COMPARE0 0x7c00002c
2648 #define DLB2_QED_SMON_COMPARE0_RST 0x0
2649 
2650 #define DLB2_QED_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
2651 #define DLB2_QED_SMON_COMPARE0_COMPARE0_LOC	0
2652 
2653 #define DLB2_QED_SMON_COMPARE1 0x7c000030
2654 #define DLB2_QED_SMON_COMPARE1_RST 0x0
2655 
2656 #define DLB2_QED_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
2657 #define DLB2_QED_SMON_COMPARE1_COMPARE1_LOC	0
2658 
2659 #define DLB2_QED_SMON_CFG0 0x7c000034
2660 #define DLB2_QED_SMON_CFG0_RST 0x40000000
2661 
2662 #define DLB2_QED_SMON_CFG0_SMON_ENABLE		0x00000001
2663 #define DLB2_QED_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
2664 #define DLB2_QED_SMON_CFG0_RSVZ0			0x0000000C
2665 #define DLB2_QED_SMON_CFG0_SMON0_FUNCTION		0x00000070
2666 #define DLB2_QED_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
2667 #define DLB2_QED_SMON_CFG0_SMON1_FUNCTION		0x00000700
2668 #define DLB2_QED_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
2669 #define DLB2_QED_SMON_CFG0_SMON_MODE			0x0000F000
2670 #define DLB2_QED_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
2671 #define DLB2_QED_SMON_CFG0_INTCOUNTEROVFL		0x00020000
2672 #define DLB2_QED_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
2673 #define DLB2_QED_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
2674 #define DLB2_QED_SMON_CFG0_STOPTIMEROVFL		0x00100000
2675 #define DLB2_QED_SMON_CFG0_INTTIMEROVFL		0x00200000
2676 #define DLB2_QED_SMON_CFG0_STATTIMEROVFL		0x00400000
2677 #define DLB2_QED_SMON_CFG0_RSVZ1			0x00800000
2678 #define DLB2_QED_SMON_CFG0_TIMER_PRESCALE		0x1F000000
2679 #define DLB2_QED_SMON_CFG0_RSVZ2			0x20000000
2680 #define DLB2_QED_SMON_CFG0_VERSION			0xC0000000
2681 #define DLB2_QED_SMON_CFG0_SMON_ENABLE_LOC			0
2682 #define DLB2_QED_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC		1
2683 #define DLB2_QED_SMON_CFG0_RSVZ0_LOC				2
2684 #define DLB2_QED_SMON_CFG0_SMON0_FUNCTION_LOC		4
2685 #define DLB2_QED_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
2686 #define DLB2_QED_SMON_CFG0_SMON1_FUNCTION_LOC		8
2687 #define DLB2_QED_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
2688 #define DLB2_QED_SMON_CFG0_SMON_MODE_LOC			12
2689 #define DLB2_QED_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
2690 #define DLB2_QED_SMON_CFG0_INTCOUNTEROVFL_LOC		17
2691 #define DLB2_QED_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
2692 #define DLB2_QED_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
2693 #define DLB2_QED_SMON_CFG0_STOPTIMEROVFL_LOC			20
2694 #define DLB2_QED_SMON_CFG0_INTTIMEROVFL_LOC			21
2695 #define DLB2_QED_SMON_CFG0_STATTIMEROVFL_LOC			22
2696 #define DLB2_QED_SMON_CFG0_RSVZ1_LOC				23
2697 #define DLB2_QED_SMON_CFG0_TIMER_PRESCALE_LOC		24
2698 #define DLB2_QED_SMON_CFG0_RSVZ2_LOC				29
2699 #define DLB2_QED_SMON_CFG0_VERSION_LOC			30
2700 
2701 #define DLB2_QED_SMON_CFG1 0x7c000038
2702 #define DLB2_QED_SMON_CFG1_RST 0x0
2703 
2704 #define DLB2_QED_SMON_CFG1_MODE0	0x000000FF
2705 #define DLB2_QED_SMON_CFG1_MODE1	0x0000FF00
2706 #define DLB2_QED_SMON_CFG1_RSVZ0	0xFFFF0000
2707 #define DLB2_QED_SMON_CFG1_MODE0_LOC	0
2708 #define DLB2_QED_SMON_CFG1_MODE1_LOC	8
2709 #define DLB2_QED_SMON_CFG1_RSVZ0_LOC	16
2710 
2711 #define DLB2_QED_SMON_MAX_TMR 0x7c00003c
2712 #define DLB2_QED_SMON_MAX_TMR_RST 0x0
2713 
2714 #define DLB2_QED_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
2715 #define DLB2_QED_SMON_MAX_TMR_MAXVALUE_LOC	0
2716 
2717 #define DLB2_QED_SMON_TMR 0x7c000040
2718 #define DLB2_QED_SMON_TMR_RST 0x0
2719 
2720 #define DLB2_QED_SMON_TMR_TIMER	0xFFFFFFFF
2721 #define DLB2_QED_SMON_TMR_TIMER_LOC	0
2722 
2723 #define DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0 0x84000000
2724 #define DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0 0x74000000
2725 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0(ver) \
2726 	(ver == DLB2_HW_V2 ? \
2727 	 DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0 : \
2728 	 DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0)
2729 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_RST 0xfefcfaf8
2730 
2731 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI0	0x000000FF
2732 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI1	0x0000FF00
2733 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI2	0x00FF0000
2734 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI3	0xFF000000
2735 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI0_LOC	0
2736 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI1_LOC	8
2737 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI2_LOC	16
2738 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_0_PRI3_LOC	24
2739 
2740 #define DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1 0x84000004
2741 #define DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1 0x74000004
2742 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1(ver) \
2743 	(ver == DLB2_HW_V2 ? \
2744 	 DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1 : \
2745 	 DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1)
2746 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1_RST 0x0
2747 
2748 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1_RSVZ0	0xFFFFFFFF
2749 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_ATQ_1_RSVZ0_LOC	0
2750 
2751 #define DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0 0x84000008
2752 #define DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0 0x74000008
2753 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0(ver) \
2754 	(ver == DLB2_HW_V2 ? \
2755 	 DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0 : \
2756 	 DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0)
2757 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_RST 0xfefcfaf8
2758 
2759 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI0	0x000000FF
2760 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI1	0x0000FF00
2761 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI2	0x00FF0000
2762 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI3	0xFF000000
2763 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI0_LOC	0
2764 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI1_LOC	8
2765 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI2_LOC	16
2766 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_0_PRI3_LOC	24
2767 
2768 #define DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1 0x8400000c
2769 #define DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1 0x7400000c
2770 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1(ver) \
2771 	(ver == DLB2_HW_V2 ? \
2772 	 DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1 : \
2773 	 DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1)
2774 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1_RST 0x0
2775 
2776 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1_RSVZ0	0xFFFFFFFF
2777 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_NALB_1_RSVZ0_LOC	0
2778 
2779 #define DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0 0x84000010
2780 #define DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0 0x74000010
2781 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0(ver) \
2782 	(ver == DLB2_HW_V2 ? \
2783 	 DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0 : \
2784 	 DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0)
2785 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_RST 0xfefcfaf8
2786 
2787 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0	0x000000FF
2788 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1	0x0000FF00
2789 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2	0x00FF0000
2790 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3	0xFF000000
2791 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI0_LOC	0
2792 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI1_LOC	8
2793 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI2_LOC	16
2794 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_0_PRI3_LOC	24
2795 
2796 #define DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1 0x84000014
2797 #define DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1 0x74000014
2798 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1(ver) \
2799 	(ver == DLB2_HW_V2 ? \
2800 	 DLB2_V2NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1 : \
2801 	 DLB2_V2_5NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1)
2802 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RST 0x0
2803 
2804 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0	0xFFFFFFFF
2805 #define DLB2_NALB_CFG_ARB_WEIGHTS_TQPRI_REPLAY_1_RSVZ0_LOC	0
2806 
2807 #define DLB2_NALB_SMON_ACTIVITYCNTR0 0x8c000064
2808 #define DLB2_NALB_SMON_ACTIVITYCNTR0_RST 0x0
2809 
2810 #define DLB2_NALB_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
2811 #define DLB2_NALB_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
2812 
2813 #define DLB2_NALB_SMON_ACTIVITYCNTR1 0x8c000068
2814 #define DLB2_NALB_SMON_ACTIVITYCNTR1_RST 0x0
2815 
2816 #define DLB2_NALB_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
2817 #define DLB2_NALB_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
2818 
2819 #define DLB2_NALB_SMON_COMPARE0 0x8c00006c
2820 #define DLB2_NALB_SMON_COMPARE0_RST 0x0
2821 
2822 #define DLB2_NALB_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
2823 #define DLB2_NALB_SMON_COMPARE0_COMPARE0_LOC	0
2824 
2825 #define DLB2_NALB_SMON_COMPARE1 0x8c000070
2826 #define DLB2_NALB_SMON_COMPARE1_RST 0x0
2827 
2828 #define DLB2_NALB_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
2829 #define DLB2_NALB_SMON_COMPARE1_COMPARE1_LOC	0
2830 
2831 #define DLB2_NALB_SMON_CFG0 0x8c000074
2832 #define DLB2_NALB_SMON_CFG0_RST 0x40000000
2833 
2834 #define DLB2_NALB_SMON_CFG0_SMON_ENABLE		0x00000001
2835 #define DLB2_NALB_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
2836 #define DLB2_NALB_SMON_CFG0_RSVZ0			0x0000000C
2837 #define DLB2_NALB_SMON_CFG0_SMON0_FUNCTION		0x00000070
2838 #define DLB2_NALB_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
2839 #define DLB2_NALB_SMON_CFG0_SMON1_FUNCTION		0x00000700
2840 #define DLB2_NALB_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
2841 #define DLB2_NALB_SMON_CFG0_SMON_MODE		0x0000F000
2842 #define DLB2_NALB_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
2843 #define DLB2_NALB_SMON_CFG0_INTCOUNTEROVFL		0x00020000
2844 #define DLB2_NALB_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
2845 #define DLB2_NALB_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
2846 #define DLB2_NALB_SMON_CFG0_STOPTIMEROVFL		0x00100000
2847 #define DLB2_NALB_SMON_CFG0_INTTIMEROVFL		0x00200000
2848 #define DLB2_NALB_SMON_CFG0_STATTIMEROVFL		0x00400000
2849 #define DLB2_NALB_SMON_CFG0_RSVZ1			0x00800000
2850 #define DLB2_NALB_SMON_CFG0_TIMER_PRESCALE		0x1F000000
2851 #define DLB2_NALB_SMON_CFG0_RSVZ2			0x20000000
2852 #define DLB2_NALB_SMON_CFG0_VERSION			0xC0000000
2853 #define DLB2_NALB_SMON_CFG0_SMON_ENABLE_LOC			0
2854 #define DLB2_NALB_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC		1
2855 #define DLB2_NALB_SMON_CFG0_RSVZ0_LOC			2
2856 #define DLB2_NALB_SMON_CFG0_SMON0_FUNCTION_LOC		4
2857 #define DLB2_NALB_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
2858 #define DLB2_NALB_SMON_CFG0_SMON1_FUNCTION_LOC		8
2859 #define DLB2_NALB_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
2860 #define DLB2_NALB_SMON_CFG0_SMON_MODE_LOC			12
2861 #define DLB2_NALB_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
2862 #define DLB2_NALB_SMON_CFG0_INTCOUNTEROVFL_LOC		17
2863 #define DLB2_NALB_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
2864 #define DLB2_NALB_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
2865 #define DLB2_NALB_SMON_CFG0_STOPTIMEROVFL_LOC		20
2866 #define DLB2_NALB_SMON_CFG0_INTTIMEROVFL_LOC			21
2867 #define DLB2_NALB_SMON_CFG0_STATTIMEROVFL_LOC		22
2868 #define DLB2_NALB_SMON_CFG0_RSVZ1_LOC			23
2869 #define DLB2_NALB_SMON_CFG0_TIMER_PRESCALE_LOC		24
2870 #define DLB2_NALB_SMON_CFG0_RSVZ2_LOC			29
2871 #define DLB2_NALB_SMON_CFG0_VERSION_LOC			30
2872 
2873 #define DLB2_NALB_SMON_CFG1 0x8c000078
2874 #define DLB2_NALB_SMON_CFG1_RST 0x0
2875 
2876 #define DLB2_NALB_SMON_CFG1_MODE0	0x000000FF
2877 #define DLB2_NALB_SMON_CFG1_MODE1	0x0000FF00
2878 #define DLB2_NALB_SMON_CFG1_RSVZ0	0xFFFF0000
2879 #define DLB2_NALB_SMON_CFG1_MODE0_LOC	0
2880 #define DLB2_NALB_SMON_CFG1_MODE1_LOC	8
2881 #define DLB2_NALB_SMON_CFG1_RSVZ0_LOC	16
2882 
2883 #define DLB2_NALB_SMON_MAX_TMR 0x8c00007c
2884 #define DLB2_NALB_SMON_MAX_TMR_RST 0x0
2885 
2886 #define DLB2_NALB_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
2887 #define DLB2_NALB_SMON_MAX_TMR_MAXVALUE_LOC	0
2888 
2889 #define DLB2_NALB_SMON_TMR 0x8c000080
2890 #define DLB2_NALB_SMON_TMR_RST 0x0
2891 
2892 #define DLB2_NALB_SMON_TMR_TIMER	0xFFFFFFFF
2893 #define DLB2_NALB_SMON_TMR_TIMER_LOC	0
2894 
2895 #define DLB2_V2RO_GRP_0_SLT_SHFT(x) \
2896 	(0x96000000 + (x) * 0x4)
2897 #define DLB2_V2_5RO_GRP_0_SLT_SHFT(x) \
2898 	(0x86000000 + (x) * 0x4)
2899 #define DLB2_RO_GRP_0_SLT_SHFT(ver, x) \
2900 	(ver == DLB2_HW_V2 ? \
2901 	 DLB2_V2RO_GRP_0_SLT_SHFT(x) : \
2902 	 DLB2_V2_5RO_GRP_0_SLT_SHFT(x))
2903 #define DLB2_RO_GRP_0_SLT_SHFT_RST 0x0
2904 
2905 #define DLB2_RO_GRP_0_SLT_SHFT_CHANGE	0x000003FF
2906 #define DLB2_RO_GRP_0_SLT_SHFT_RSVD0		0xFFFFFC00
2907 #define DLB2_RO_GRP_0_SLT_SHFT_CHANGE_LOC	0
2908 #define DLB2_RO_GRP_0_SLT_SHFT_RSVD0_LOC	10
2909 
2910 #define DLB2_V2RO_GRP_1_SLT_SHFT(x) \
2911 	(0x96010000 + (x) * 0x4)
2912 #define DLB2_V2_5RO_GRP_1_SLT_SHFT(x) \
2913 	(0x86010000 + (x) * 0x4)
2914 #define DLB2_RO_GRP_1_SLT_SHFT(ver, x) \
2915 	(ver == DLB2_HW_V2 ? \
2916 	 DLB2_V2RO_GRP_1_SLT_SHFT(x) : \
2917 	 DLB2_V2_5RO_GRP_1_SLT_SHFT(x))
2918 #define DLB2_RO_GRP_1_SLT_SHFT_RST 0x0
2919 
2920 #define DLB2_RO_GRP_1_SLT_SHFT_CHANGE	0x000003FF
2921 #define DLB2_RO_GRP_1_SLT_SHFT_RSVD0		0xFFFFFC00
2922 #define DLB2_RO_GRP_1_SLT_SHFT_CHANGE_LOC	0
2923 #define DLB2_RO_GRP_1_SLT_SHFT_RSVD0_LOC	10
2924 
2925 #define DLB2_V2RO_GRP_SN_MODE 0x94000000
2926 #define DLB2_V2_5RO_GRP_SN_MODE 0x84000000
2927 #define DLB2_RO_GRP_SN_MODE(ver) \
2928 	(ver == DLB2_HW_V2 ? \
2929 	 DLB2_V2RO_GRP_SN_MODE : \
2930 	 DLB2_V2_5RO_GRP_SN_MODE)
2931 #define DLB2_RO_GRP_SN_MODE_RST 0x0
2932 
2933 #define DLB2_RO_GRP_SN_MODE_SN_MODE_0	0x00000007
2934 #define DLB2_RO_GRP_SN_MODE_RSZV0		0x000000F8
2935 #define DLB2_RO_GRP_SN_MODE_SN_MODE_1	0x00000700
2936 #define DLB2_RO_GRP_SN_MODE_RSZV1		0xFFFFF800
2937 #define DLB2_RO_GRP_SN_MODE_SN_MODE_0_LOC	0
2938 #define DLB2_RO_GRP_SN_MODE_RSZV0_LOC	3
2939 #define DLB2_RO_GRP_SN_MODE_SN_MODE_1_LOC	8
2940 #define DLB2_RO_GRP_SN_MODE_RSZV1_LOC	11
2941 
2942 #define DLB2_V2RO_CFG_CTRL_GENERAL_0 0x9c000000
2943 #define DLB2_V2_5RO_CFG_CTRL_GENERAL_0 0x8c000000
2944 #define DLB2_RO_CFG_CTRL_GENERAL_0(ver) \
2945 	(ver == DLB2_HW_V2 ? \
2946 	 DLB2_V2RO_CFG_CTRL_GENERAL_0 : \
2947 	 DLB2_V2_5RO_CFG_CTRL_GENERAL_0)
2948 #define DLB2_RO_CFG_CTRL_GENERAL_0_RST 0x0
2949 
2950 #define DLB2_RO_CFG_CTRL_GENERAL_0_UNIT_SINGLE_STEP_MODE	0x00000001
2951 #define DLB2_RO_CFG_CTRL_GENERAL_0_RR_EN			0x00000002
2952 #define DLB2_RO_CFG_CTRL_GENERAL_0_RSZV0			0xFFFFFFFC
2953 #define DLB2_RO_CFG_CTRL_GENERAL_0_UNIT_SINGLE_STEP_MODE_LOC	0
2954 #define DLB2_RO_CFG_CTRL_GENERAL_0_RR_EN_LOC			1
2955 #define DLB2_RO_CFG_CTRL_GENERAL_0_RSZV0_LOC			2
2956 
2957 #define DLB2_RO_SMON_ACTIVITYCNTR0 0x9c000030
2958 #define DLB2_RO_SMON_ACTIVITYCNTR0_RST 0x0
2959 
2960 #define DLB2_RO_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
2961 #define DLB2_RO_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
2962 
2963 #define DLB2_RO_SMON_ACTIVITYCNTR1 0x9c000034
2964 #define DLB2_RO_SMON_ACTIVITYCNTR1_RST 0x0
2965 
2966 #define DLB2_RO_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
2967 #define DLB2_RO_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
2968 
2969 #define DLB2_RO_SMON_COMPARE0 0x9c000038
2970 #define DLB2_RO_SMON_COMPARE0_RST 0x0
2971 
2972 #define DLB2_RO_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
2973 #define DLB2_RO_SMON_COMPARE0_COMPARE0_LOC	0
2974 
2975 #define DLB2_RO_SMON_COMPARE1 0x9c00003c
2976 #define DLB2_RO_SMON_COMPARE1_RST 0x0
2977 
2978 #define DLB2_RO_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
2979 #define DLB2_RO_SMON_COMPARE1_COMPARE1_LOC	0
2980 
2981 #define DLB2_RO_SMON_CFG0 0x9c000040
2982 #define DLB2_RO_SMON_CFG0_RST 0x40000000
2983 
2984 #define DLB2_RO_SMON_CFG0_SMON_ENABLE		0x00000001
2985 #define DLB2_RO_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
2986 #define DLB2_RO_SMON_CFG0_RSVZ0			0x0000000C
2987 #define DLB2_RO_SMON_CFG0_SMON0_FUNCTION		0x00000070
2988 #define DLB2_RO_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
2989 #define DLB2_RO_SMON_CFG0_SMON1_FUNCTION		0x00000700
2990 #define DLB2_RO_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
2991 #define DLB2_RO_SMON_CFG0_SMON_MODE			0x0000F000
2992 #define DLB2_RO_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
2993 #define DLB2_RO_SMON_CFG0_INTCOUNTEROVFL		0x00020000
2994 #define DLB2_RO_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
2995 #define DLB2_RO_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
2996 #define DLB2_RO_SMON_CFG0_STOPTIMEROVFL		0x00100000
2997 #define DLB2_RO_SMON_CFG0_INTTIMEROVFL		0x00200000
2998 #define DLB2_RO_SMON_CFG0_STATTIMEROVFL		0x00400000
2999 #define DLB2_RO_SMON_CFG0_RSVZ1			0x00800000
3000 #define DLB2_RO_SMON_CFG0_TIMER_PRESCALE		0x1F000000
3001 #define DLB2_RO_SMON_CFG0_RSVZ2			0x20000000
3002 #define DLB2_RO_SMON_CFG0_VERSION			0xC0000000
3003 #define DLB2_RO_SMON_CFG0_SMON_ENABLE_LOC		0
3004 #define DLB2_RO_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC	1
3005 #define DLB2_RO_SMON_CFG0_RSVZ0_LOC			2
3006 #define DLB2_RO_SMON_CFG0_SMON0_FUNCTION_LOC		4
3007 #define DLB2_RO_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
3008 #define DLB2_RO_SMON_CFG0_SMON1_FUNCTION_LOC		8
3009 #define DLB2_RO_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
3010 #define DLB2_RO_SMON_CFG0_SMON_MODE_LOC		12
3011 #define DLB2_RO_SMON_CFG0_STOPCOUNTEROVFL_LOC	16
3012 #define DLB2_RO_SMON_CFG0_INTCOUNTEROVFL_LOC		17
3013 #define DLB2_RO_SMON_CFG0_STATCOUNTER0OVFL_LOC	18
3014 #define DLB2_RO_SMON_CFG0_STATCOUNTER1OVFL_LOC	19
3015 #define DLB2_RO_SMON_CFG0_STOPTIMEROVFL_LOC		20
3016 #define DLB2_RO_SMON_CFG0_INTTIMEROVFL_LOC		21
3017 #define DLB2_RO_SMON_CFG0_STATTIMEROVFL_LOC		22
3018 #define DLB2_RO_SMON_CFG0_RSVZ1_LOC			23
3019 #define DLB2_RO_SMON_CFG0_TIMER_PRESCALE_LOC		24
3020 #define DLB2_RO_SMON_CFG0_RSVZ2_LOC			29
3021 #define DLB2_RO_SMON_CFG0_VERSION_LOC		30
3022 
3023 #define DLB2_RO_SMON_CFG1 0x9c000044
3024 #define DLB2_RO_SMON_CFG1_RST 0x0
3025 
3026 #define DLB2_RO_SMON_CFG1_MODE0	0x000000FF
3027 #define DLB2_RO_SMON_CFG1_MODE1	0x0000FF00
3028 #define DLB2_RO_SMON_CFG1_RSVZ0	0xFFFF0000
3029 #define DLB2_RO_SMON_CFG1_MODE0_LOC	0
3030 #define DLB2_RO_SMON_CFG1_MODE1_LOC	8
3031 #define DLB2_RO_SMON_CFG1_RSVZ0_LOC	16
3032 
3033 #define DLB2_RO_SMON_MAX_TMR 0x9c000048
3034 #define DLB2_RO_SMON_MAX_TMR_RST 0x0
3035 
3036 #define DLB2_RO_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
3037 #define DLB2_RO_SMON_MAX_TMR_MAXVALUE_LOC	0
3038 
3039 #define DLB2_RO_SMON_TMR 0x9c00004c
3040 #define DLB2_RO_SMON_TMR_RST 0x0
3041 
3042 #define DLB2_RO_SMON_TMR_TIMER	0xFFFFFFFF
3043 #define DLB2_RO_SMON_TMR_TIMER_LOC	0
3044 
3045 #define DLB2_V2LSP_CQ2PRIOV(x) \
3046 	(0xa0000000 + (x) * 0x1000)
3047 #define DLB2_V2_5LSP_CQ2PRIOV(x) \
3048 	(0x90000000 + (x) * 0x1000)
3049 #define DLB2_LSP_CQ2PRIOV(ver, x) \
3050 	(ver == DLB2_HW_V2 ? \
3051 	 DLB2_V2LSP_CQ2PRIOV(x) : \
3052 	 DLB2_V2_5LSP_CQ2PRIOV(x))
3053 #define DLB2_LSP_CQ2PRIOV_RST 0x0
3054 
3055 #define DLB2_LSP_CQ2PRIOV_PRIO	0x00FFFFFF
3056 #define DLB2_LSP_CQ2PRIOV_V		0xFF000000
3057 #define DLB2_LSP_CQ2PRIOV_PRIO_LOC	0
3058 #define DLB2_LSP_CQ2PRIOV_V_LOC	24
3059 
3060 #define DLB2_V2LSP_CQ2QID0(x) \
3061 	(0xa0080000 + (x) * 0x1000)
3062 #define DLB2_V2_5LSP_CQ2QID0(x) \
3063 	(0x90080000 + (x) * 0x1000)
3064 #define DLB2_LSP_CQ2QID0(ver, x) \
3065 	(ver == DLB2_HW_V2 ? \
3066 	 DLB2_V2LSP_CQ2QID0(x) : \
3067 	 DLB2_V2_5LSP_CQ2QID0(x))
3068 #define DLB2_LSP_CQ2QID0_RST 0x0
3069 
3070 #define DLB2_LSP_CQ2QID0_QID_P0	0x0000007F
3071 #define DLB2_LSP_CQ2QID0_RSVD3	0x00000080
3072 #define DLB2_LSP_CQ2QID0_QID_P1	0x00007F00
3073 #define DLB2_LSP_CQ2QID0_RSVD2	0x00008000
3074 #define DLB2_LSP_CQ2QID0_QID_P2	0x007F0000
3075 #define DLB2_LSP_CQ2QID0_RSVD1	0x00800000
3076 #define DLB2_LSP_CQ2QID0_QID_P3	0x7F000000
3077 #define DLB2_LSP_CQ2QID0_RSVD0	0x80000000
3078 #define DLB2_LSP_CQ2QID0_QID_P0_LOC	0
3079 #define DLB2_LSP_CQ2QID0_RSVD3_LOC	7
3080 #define DLB2_LSP_CQ2QID0_QID_P1_LOC	8
3081 #define DLB2_LSP_CQ2QID0_RSVD2_LOC	15
3082 #define DLB2_LSP_CQ2QID0_QID_P2_LOC	16
3083 #define DLB2_LSP_CQ2QID0_RSVD1_LOC	23
3084 #define DLB2_LSP_CQ2QID0_QID_P3_LOC	24
3085 #define DLB2_LSP_CQ2QID0_RSVD0_LOC	31
3086 
3087 #define DLB2_V2LSP_CQ2QID1(x) \
3088 	(0xa0100000 + (x) * 0x1000)
3089 #define DLB2_V2_5LSP_CQ2QID1(x) \
3090 	(0x90100000 + (x) * 0x1000)
3091 #define DLB2_LSP_CQ2QID1(ver, x) \
3092 	(ver == DLB2_HW_V2 ? \
3093 	 DLB2_V2LSP_CQ2QID1(x) : \
3094 	 DLB2_V2_5LSP_CQ2QID1(x))
3095 #define DLB2_LSP_CQ2QID1_RST 0x0
3096 
3097 #define DLB2_LSP_CQ2QID1_QID_P4	0x0000007F
3098 #define DLB2_LSP_CQ2QID1_RSVD3	0x00000080
3099 #define DLB2_LSP_CQ2QID1_QID_P5	0x00007F00
3100 #define DLB2_LSP_CQ2QID1_RSVD2	0x00008000
3101 #define DLB2_LSP_CQ2QID1_QID_P6	0x007F0000
3102 #define DLB2_LSP_CQ2QID1_RSVD1	0x00800000
3103 #define DLB2_LSP_CQ2QID1_QID_P7	0x7F000000
3104 #define DLB2_LSP_CQ2QID1_RSVD0	0x80000000
3105 #define DLB2_LSP_CQ2QID1_QID_P4_LOC	0
3106 #define DLB2_LSP_CQ2QID1_RSVD3_LOC	7
3107 #define DLB2_LSP_CQ2QID1_QID_P5_LOC	8
3108 #define DLB2_LSP_CQ2QID1_RSVD2_LOC	15
3109 #define DLB2_LSP_CQ2QID1_QID_P6_LOC	16
3110 #define DLB2_LSP_CQ2QID1_RSVD1_LOC	23
3111 #define DLB2_LSP_CQ2QID1_QID_P7_LOC	24
3112 #define DLB2_LSP_CQ2QID1_RSVD0_LOC	31
3113 
3114 #define DLB2_V2LSP_CQ_DIR_DSBL(x) \
3115 	(0xa0180000 + (x) * 0x1000)
3116 #define DLB2_V2_5LSP_CQ_DIR_DSBL(x) \
3117 	(0x90180000 + (x) * 0x1000)
3118 #define DLB2_LSP_CQ_DIR_DSBL(ver, x) \
3119 	(ver == DLB2_HW_V2 ? \
3120 	 DLB2_V2LSP_CQ_DIR_DSBL(x) : \
3121 	 DLB2_V2_5LSP_CQ_DIR_DSBL(x))
3122 #define DLB2_LSP_CQ_DIR_DSBL_RST 0x1
3123 
3124 #define DLB2_LSP_CQ_DIR_DSBL_DISABLED	0x00000001
3125 #define DLB2_LSP_CQ_DIR_DSBL_RSVD0		0xFFFFFFFE
3126 #define DLB2_LSP_CQ_DIR_DSBL_DISABLED_LOC	0
3127 #define DLB2_LSP_CQ_DIR_DSBL_RSVD0_LOC	1
3128 
3129 #define DLB2_V2LSP_CQ_DIR_TKN_CNT(x) \
3130 	(0xa0200000 + (x) * 0x1000)
3131 #define DLB2_V2_5LSP_CQ_DIR_TKN_CNT(x) \
3132 	(0x90200000 + (x) * 0x1000)
3133 #define DLB2_LSP_CQ_DIR_TKN_CNT(ver, x) \
3134 	(ver == DLB2_HW_V2 ? \
3135 	 DLB2_V2LSP_CQ_DIR_TKN_CNT(x) : \
3136 	 DLB2_V2_5LSP_CQ_DIR_TKN_CNT(x))
3137 #define DLB2_LSP_CQ_DIR_TKN_CNT_RST 0x0
3138 
3139 #define DLB2_LSP_CQ_DIR_TKN_CNT_COUNT	0x00001FFF
3140 #define DLB2_LSP_CQ_DIR_TKN_CNT_RSVD0	0xFFFFE000
3141 #define DLB2_LSP_CQ_DIR_TKN_CNT_COUNT_LOC	0
3142 #define DLB2_LSP_CQ_DIR_TKN_CNT_RSVD0_LOC	13
3143 
3144 #define DLB2_V2LSP_CQ_DIR_TKN_DEPTH_SEL_DSI(x) \
3145 	(0xa0280000 + (x) * 0x1000)
3146 #define DLB2_V2_5LSP_CQ_DIR_TKN_DEPTH_SEL_DSI(x) \
3147 	(0x90280000 + (x) * 0x1000)
3148 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI(ver, x) \
3149 	(ver == DLB2_HW_V2 ? \
3150 	 DLB2_V2LSP_CQ_DIR_TKN_DEPTH_SEL_DSI(x) : \
3151 	 DLB2_V2_5LSP_CQ_DIR_TKN_DEPTH_SEL_DSI(x))
3152 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RST 0x0
3153 
3154 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_TOKEN_DEPTH_SELECT_V2	0x0000000F
3155 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_DISABLE_WB_OPT_V2	0x00000010
3156 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_IGNORE_DEPTH_V2	0x00000020
3157 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RSVD0_V2		0xFFFFFFC0
3158 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_TOKEN_DEPTH_SELECT_V2_LOC	0
3159 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_DISABLE_WB_OPT_V2_LOC	4
3160 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_IGNORE_DEPTH_V2_LOC	5
3161 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RSVD0_V2_LOC		6
3162 
3163 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_TOKEN_DEPTH_SELECT_V2_5 0x0000000F
3164 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_DISABLE_WB_OPT_V2_5	0x00000010
3165 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RSVD0_V2_5		0xFFFFFFE0
3166 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_TOKEN_DEPTH_SELECT_V2_5_LOC	0
3167 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_DISABLE_WB_OPT_V2_5_LOC	4
3168 #define DLB2_LSP_CQ_DIR_TKN_DEPTH_SEL_DSI_RSVD0_V2_5_LOC		5
3169 
3170 #define DLB2_V2LSP_CQ_DIR_TOT_SCH_CNTL(x) \
3171 	(0xa0300000 + (x) * 0x1000)
3172 #define DLB2_V2_5LSP_CQ_DIR_TOT_SCH_CNTL(x) \
3173 	(0x90300000 + (x) * 0x1000)
3174 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTL(ver, x) \
3175 	(ver == DLB2_HW_V2 ? \
3176 	 DLB2_V2LSP_CQ_DIR_TOT_SCH_CNTL(x) : \
3177 	 DLB2_V2_5LSP_CQ_DIR_TOT_SCH_CNTL(x))
3178 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTL_RST 0x0
3179 
3180 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTL_COUNT	0xFFFFFFFF
3181 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTL_COUNT_LOC	0
3182 
3183 #define DLB2_V2LSP_CQ_DIR_TOT_SCH_CNTH(x) \
3184 	(0xa0380000 + (x) * 0x1000)
3185 #define DLB2_V2_5LSP_CQ_DIR_TOT_SCH_CNTH(x) \
3186 	(0x90380000 + (x) * 0x1000)
3187 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTH(ver, x) \
3188 	(ver == DLB2_HW_V2 ? \
3189 	 DLB2_V2LSP_CQ_DIR_TOT_SCH_CNTH(x) : \
3190 	 DLB2_V2_5LSP_CQ_DIR_TOT_SCH_CNTH(x))
3191 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTH_RST 0x0
3192 
3193 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTH_COUNT	0xFFFFFFFF
3194 #define DLB2_LSP_CQ_DIR_TOT_SCH_CNTH_COUNT_LOC	0
3195 
3196 #define DLB2_V2LSP_CQ_LDB_DSBL(x) \
3197 	(0xa0400000 + (x) * 0x1000)
3198 #define DLB2_V2_5LSP_CQ_LDB_DSBL(x) \
3199 	(0x90400000 + (x) * 0x1000)
3200 #define DLB2_LSP_CQ_LDB_DSBL(ver, x) \
3201 	(ver == DLB2_HW_V2 ? \
3202 	 DLB2_V2LSP_CQ_LDB_DSBL(x) : \
3203 	 DLB2_V2_5LSP_CQ_LDB_DSBL(x))
3204 #define DLB2_LSP_CQ_LDB_DSBL_RST 0x1
3205 
3206 #define DLB2_LSP_CQ_LDB_DSBL_DISABLED	0x00000001
3207 #define DLB2_LSP_CQ_LDB_DSBL_RSVD0		0xFFFFFFFE
3208 #define DLB2_LSP_CQ_LDB_DSBL_DISABLED_LOC	0
3209 #define DLB2_LSP_CQ_LDB_DSBL_RSVD0_LOC	1
3210 
3211 #define DLB2_V2LSP_CQ_LDB_INFL_CNT(x) \
3212 	(0xa0480000 + (x) * 0x1000)
3213 #define DLB2_V2_5LSP_CQ_LDB_INFL_CNT(x) \
3214 	(0x90480000 + (x) * 0x1000)
3215 #define DLB2_LSP_CQ_LDB_INFL_CNT(ver, x) \
3216 	(ver == DLB2_HW_V2 ? \
3217 	 DLB2_V2LSP_CQ_LDB_INFL_CNT(x) : \
3218 	 DLB2_V2_5LSP_CQ_LDB_INFL_CNT(x))
3219 #define DLB2_LSP_CQ_LDB_INFL_CNT_RST 0x0
3220 
3221 #define DLB2_LSP_CQ_LDB_INFL_CNT_COUNT	0x00000FFF
3222 #define DLB2_LSP_CQ_LDB_INFL_CNT_RSVD0	0xFFFFF000
3223 #define DLB2_LSP_CQ_LDB_INFL_CNT_COUNT_LOC	0
3224 #define DLB2_LSP_CQ_LDB_INFL_CNT_RSVD0_LOC	12
3225 
3226 #define DLB2_V2LSP_CQ_LDB_INFL_LIM(x) \
3227 	(0xa0500000 + (x) * 0x1000)
3228 #define DLB2_V2_5LSP_CQ_LDB_INFL_LIM(x) \
3229 	(0x90500000 + (x) * 0x1000)
3230 #define DLB2_LSP_CQ_LDB_INFL_LIM(ver, x) \
3231 	(ver == DLB2_HW_V2 ? \
3232 	 DLB2_V2LSP_CQ_LDB_INFL_LIM(x) : \
3233 	 DLB2_V2_5LSP_CQ_LDB_INFL_LIM(x))
3234 #define DLB2_LSP_CQ_LDB_INFL_LIM_RST 0x0
3235 
3236 #define DLB2_LSP_CQ_LDB_INFL_LIM_LIMIT	0x00000FFF
3237 #define DLB2_LSP_CQ_LDB_INFL_LIM_RSVD0	0xFFFFF000
3238 #define DLB2_LSP_CQ_LDB_INFL_LIM_LIMIT_LOC	0
3239 #define DLB2_LSP_CQ_LDB_INFL_LIM_RSVD0_LOC	12
3240 
3241 #define DLB2_V2LSP_CQ_LDB_TKN_CNT(x) \
3242 	(0xa0580000 + (x) * 0x1000)
3243 #define DLB2_V2_5LSP_CQ_LDB_TKN_CNT(x) \
3244 	(0x90600000 + (x) * 0x1000)
3245 #define DLB2_LSP_CQ_LDB_TKN_CNT(ver, x) \
3246 	(ver == DLB2_HW_V2 ? \
3247 	 DLB2_V2LSP_CQ_LDB_TKN_CNT(x) : \
3248 	 DLB2_V2_5LSP_CQ_LDB_TKN_CNT(x))
3249 #define DLB2_LSP_CQ_LDB_TKN_CNT_RST 0x0
3250 
3251 #define DLB2_LSP_CQ_LDB_TKN_CNT_TOKEN_COUNT	0x000007FF
3252 #define DLB2_LSP_CQ_LDB_TKN_CNT_RSVD0	0xFFFFF800
3253 #define DLB2_LSP_CQ_LDB_TKN_CNT_TOKEN_COUNT_LOC	0
3254 #define DLB2_LSP_CQ_LDB_TKN_CNT_RSVD0_LOC		11
3255 
3256 #define DLB2_V2LSP_CQ_LDB_TKN_DEPTH_SEL(x) \
3257 	(0xa0600000 + (x) * 0x1000)
3258 #define DLB2_V2_5LSP_CQ_LDB_TKN_DEPTH_SEL(x) \
3259 	(0x90680000 + (x) * 0x1000)
3260 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL(ver, x) \
3261 	(ver == DLB2_HW_V2 ? \
3262 	 DLB2_V2LSP_CQ_LDB_TKN_DEPTH_SEL(x) : \
3263 	 DLB2_V2_5LSP_CQ_LDB_TKN_DEPTH_SEL(x))
3264 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_RST 0x0
3265 
3266 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_V2	0x0000000F
3267 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_IGNORE_DEPTH_V2	0x00000010
3268 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_RSVD0_V2		0xFFFFFFE0
3269 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_V2_LOC	0
3270 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_IGNORE_DEPTH_V2_LOC		4
3271 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_RSVD0_V2_LOC			5
3272 
3273 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_V2_5	0x0000000F
3274 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_RSVD0_V2_5		0xFFFFFFF0
3275 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_TOKEN_DEPTH_SELECT_V2_5_LOC	0
3276 #define DLB2_LSP_CQ_LDB_TKN_DEPTH_SEL_RSVD0_V2_5_LOC			4
3277 
3278 #define DLB2_V2LSP_CQ_LDB_TOT_SCH_CNTL(x) \
3279 	(0xa0680000 + (x) * 0x1000)
3280 #define DLB2_V2_5LSP_CQ_LDB_TOT_SCH_CNTL(x) \
3281 	(0x90700000 + (x) * 0x1000)
3282 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTL(ver, x) \
3283 	(ver == DLB2_HW_V2 ? \
3284 	 DLB2_V2LSP_CQ_LDB_TOT_SCH_CNTL(x) : \
3285 	 DLB2_V2_5LSP_CQ_LDB_TOT_SCH_CNTL(x))
3286 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTL_RST 0x0
3287 
3288 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTL_COUNT	0xFFFFFFFF
3289 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTL_COUNT_LOC	0
3290 
3291 #define DLB2_V2LSP_CQ_LDB_TOT_SCH_CNTH(x) \
3292 	(0xa0700000 + (x) * 0x1000)
3293 #define DLB2_V2_5LSP_CQ_LDB_TOT_SCH_CNTH(x) \
3294 	(0x90780000 + (x) * 0x1000)
3295 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTH(ver, x) \
3296 	(ver == DLB2_HW_V2 ? \
3297 	 DLB2_V2LSP_CQ_LDB_TOT_SCH_CNTH(x) : \
3298 	 DLB2_V2_5LSP_CQ_LDB_TOT_SCH_CNTH(x))
3299 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTH_RST 0x0
3300 
3301 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTH_COUNT	0xFFFFFFFF
3302 #define DLB2_LSP_CQ_LDB_TOT_SCH_CNTH_COUNT_LOC	0
3303 
3304 #define DLB2_V2LSP_QID_DIR_MAX_DEPTH(x) \
3305 	(0xa0780000 + (x) * 0x1000)
3306 #define DLB2_V2_5LSP_QID_DIR_MAX_DEPTH(x) \
3307 	(0x90800000 + (x) * 0x1000)
3308 #define DLB2_LSP_QID_DIR_MAX_DEPTH(ver, x) \
3309 	(ver == DLB2_HW_V2 ? \
3310 	 DLB2_V2LSP_QID_DIR_MAX_DEPTH(x) : \
3311 	 DLB2_V2_5LSP_QID_DIR_MAX_DEPTH(x))
3312 #define DLB2_LSP_QID_DIR_MAX_DEPTH_RST 0x0
3313 
3314 #define DLB2_LSP_QID_DIR_MAX_DEPTH_DEPTH	0x00001FFF
3315 #define DLB2_LSP_QID_DIR_MAX_DEPTH_RSVD0	0xFFFFE000
3316 #define DLB2_LSP_QID_DIR_MAX_DEPTH_DEPTH_LOC	0
3317 #define DLB2_LSP_QID_DIR_MAX_DEPTH_RSVD0_LOC	13
3318 
3319 #define DLB2_V2LSP_QID_DIR_TOT_ENQ_CNTL(x) \
3320 	(0xa0800000 + (x) * 0x1000)
3321 #define DLB2_V2_5LSP_QID_DIR_TOT_ENQ_CNTL(x) \
3322 	(0x90880000 + (x) * 0x1000)
3323 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTL(ver, x) \
3324 	(ver == DLB2_HW_V2 ? \
3325 	 DLB2_V2LSP_QID_DIR_TOT_ENQ_CNTL(x) : \
3326 	 DLB2_V2_5LSP_QID_DIR_TOT_ENQ_CNTL(x))
3327 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTL_RST 0x0
3328 
3329 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTL_COUNT	0xFFFFFFFF
3330 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTL_COUNT_LOC	0
3331 
3332 #define DLB2_V2LSP_QID_DIR_TOT_ENQ_CNTH(x) \
3333 	(0xa0880000 + (x) * 0x1000)
3334 #define DLB2_V2_5LSP_QID_DIR_TOT_ENQ_CNTH(x) \
3335 	(0x90900000 + (x) * 0x1000)
3336 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTH(ver, x) \
3337 	(ver == DLB2_HW_V2 ? \
3338 	 DLB2_V2LSP_QID_DIR_TOT_ENQ_CNTH(x) : \
3339 	 DLB2_V2_5LSP_QID_DIR_TOT_ENQ_CNTH(x))
3340 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTH_RST 0x0
3341 
3342 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTH_COUNT	0xFFFFFFFF
3343 #define DLB2_LSP_QID_DIR_TOT_ENQ_CNTH_COUNT_LOC	0
3344 
3345 #define DLB2_V2LSP_QID_DIR_ENQUEUE_CNT(x) \
3346 	(0xa0900000 + (x) * 0x1000)
3347 #define DLB2_V2_5LSP_QID_DIR_ENQUEUE_CNT(x) \
3348 	(0x90980000 + (x) * 0x1000)
3349 #define DLB2_LSP_QID_DIR_ENQUEUE_CNT(ver, x) \
3350 	(ver == DLB2_HW_V2 ? \
3351 	 DLB2_V2LSP_QID_DIR_ENQUEUE_CNT(x) : \
3352 	 DLB2_V2_5LSP_QID_DIR_ENQUEUE_CNT(x))
3353 #define DLB2_LSP_QID_DIR_ENQUEUE_CNT_RST 0x0
3354 
3355 #define DLB2_LSP_QID_DIR_ENQUEUE_CNT_COUNT	0x00001FFF
3356 #define DLB2_LSP_QID_DIR_ENQUEUE_CNT_RSVD0	0xFFFFE000
3357 #define DLB2_LSP_QID_DIR_ENQUEUE_CNT_COUNT_LOC	0
3358 #define DLB2_LSP_QID_DIR_ENQUEUE_CNT_RSVD0_LOC	13
3359 
3360 #define DLB2_V2LSP_QID_DIR_DEPTH_THRSH(x) \
3361 	(0xa0980000 + (x) * 0x1000)
3362 #define DLB2_V2_5LSP_QID_DIR_DEPTH_THRSH(x) \
3363 	(0x90a00000 + (x) * 0x1000)
3364 #define DLB2_LSP_QID_DIR_DEPTH_THRSH(ver, x) \
3365 	(ver == DLB2_HW_V2 ? \
3366 	 DLB2_V2LSP_QID_DIR_DEPTH_THRSH(x) : \
3367 	 DLB2_V2_5LSP_QID_DIR_DEPTH_THRSH(x))
3368 #define DLB2_LSP_QID_DIR_DEPTH_THRSH_RST 0x0
3369 
3370 #define DLB2_LSP_QID_DIR_DEPTH_THRSH_THRESH	0x00001FFF
3371 #define DLB2_LSP_QID_DIR_DEPTH_THRSH_RSVD0	0xFFFFE000
3372 #define DLB2_LSP_QID_DIR_DEPTH_THRSH_THRESH_LOC	0
3373 #define DLB2_LSP_QID_DIR_DEPTH_THRSH_RSVD0_LOC	13
3374 
3375 #define DLB2_V2LSP_QID_AQED_ACTIVE_CNT(x) \
3376 	(0xa0a00000 + (x) * 0x1000)
3377 #define DLB2_V2_5LSP_QID_AQED_ACTIVE_CNT(x) \
3378 	(0x90b80000 + (x) * 0x1000)
3379 #define DLB2_LSP_QID_AQED_ACTIVE_CNT(ver, x) \
3380 	(ver == DLB2_HW_V2 ? \
3381 	 DLB2_V2LSP_QID_AQED_ACTIVE_CNT(x) : \
3382 	 DLB2_V2_5LSP_QID_AQED_ACTIVE_CNT(x))
3383 #define DLB2_LSP_QID_AQED_ACTIVE_CNT_RST 0x0
3384 
3385 #define DLB2_LSP_QID_AQED_ACTIVE_CNT_COUNT	0x00000FFF
3386 #define DLB2_LSP_QID_AQED_ACTIVE_CNT_RSVD0	0xFFFFF000
3387 #define DLB2_LSP_QID_AQED_ACTIVE_CNT_COUNT_LOC	0
3388 #define DLB2_LSP_QID_AQED_ACTIVE_CNT_RSVD0_LOC	12
3389 
3390 #define DLB2_V2LSP_QID_AQED_ACTIVE_LIM(x) \
3391 	(0xa0a80000 + (x) * 0x1000)
3392 #define DLB2_V2_5LSP_QID_AQED_ACTIVE_LIM(x) \
3393 	(0x90c00000 + (x) * 0x1000)
3394 #define DLB2_LSP_QID_AQED_ACTIVE_LIM(ver, x) \
3395 	(ver == DLB2_HW_V2 ? \
3396 	 DLB2_V2LSP_QID_AQED_ACTIVE_LIM(x) : \
3397 	 DLB2_V2_5LSP_QID_AQED_ACTIVE_LIM(x))
3398 #define DLB2_LSP_QID_AQED_ACTIVE_LIM_RST 0x0
3399 
3400 #define DLB2_LSP_QID_AQED_ACTIVE_LIM_LIMIT	0x00000FFF
3401 #define DLB2_LSP_QID_AQED_ACTIVE_LIM_RSVD0	0xFFFFF000
3402 #define DLB2_LSP_QID_AQED_ACTIVE_LIM_LIMIT_LOC	0
3403 #define DLB2_LSP_QID_AQED_ACTIVE_LIM_RSVD0_LOC	12
3404 
3405 #define DLB2_V2LSP_QID_ATM_TOT_ENQ_CNTL(x) \
3406 	(0xa0b00000 + (x) * 0x1000)
3407 #define DLB2_V2_5LSP_QID_ATM_TOT_ENQ_CNTL(x) \
3408 	(0x90c80000 + (x) * 0x1000)
3409 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTL(ver, x) \
3410 	(ver == DLB2_HW_V2 ? \
3411 	 DLB2_V2LSP_QID_ATM_TOT_ENQ_CNTL(x) : \
3412 	 DLB2_V2_5LSP_QID_ATM_TOT_ENQ_CNTL(x))
3413 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTL_RST 0x0
3414 
3415 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTL_COUNT	0xFFFFFFFF
3416 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTL_COUNT_LOC	0
3417 
3418 #define DLB2_V2LSP_QID_ATM_TOT_ENQ_CNTH(x) \
3419 	(0xa0b80000 + (x) * 0x1000)
3420 #define DLB2_V2_5LSP_QID_ATM_TOT_ENQ_CNTH(x) \
3421 	(0x90d00000 + (x) * 0x1000)
3422 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTH(ver, x) \
3423 	(ver == DLB2_HW_V2 ? \
3424 	 DLB2_V2LSP_QID_ATM_TOT_ENQ_CNTH(x) : \
3425 	 DLB2_V2_5LSP_QID_ATM_TOT_ENQ_CNTH(x))
3426 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTH_RST 0x0
3427 
3428 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTH_COUNT	0xFFFFFFFF
3429 #define DLB2_LSP_QID_ATM_TOT_ENQ_CNTH_COUNT_LOC	0
3430 
3431 #define DLB2_V2LSP_QID_LDB_ENQUEUE_CNT(x) \
3432 	(0xa0c80000 + (x) * 0x1000)
3433 #define DLB2_V2_5LSP_QID_LDB_ENQUEUE_CNT(x) \
3434 	(0x90e00000 + (x) * 0x1000)
3435 #define DLB2_LSP_QID_LDB_ENQUEUE_CNT(ver, x) \
3436 	(ver == DLB2_HW_V2 ? \
3437 	 DLB2_V2LSP_QID_LDB_ENQUEUE_CNT(x) : \
3438 	 DLB2_V2_5LSP_QID_LDB_ENQUEUE_CNT(x))
3439 #define DLB2_LSP_QID_LDB_ENQUEUE_CNT_RST 0x0
3440 
3441 #define DLB2_LSP_QID_LDB_ENQUEUE_CNT_COUNT	0x00003FFF
3442 #define DLB2_LSP_QID_LDB_ENQUEUE_CNT_RSVD0	0xFFFFC000
3443 #define DLB2_LSP_QID_LDB_ENQUEUE_CNT_COUNT_LOC	0
3444 #define DLB2_LSP_QID_LDB_ENQUEUE_CNT_RSVD0_LOC	14
3445 
3446 #define DLB2_V2LSP_QID_LDB_INFL_CNT(x) \
3447 	(0xa0d00000 + (x) * 0x1000)
3448 #define DLB2_V2_5LSP_QID_LDB_INFL_CNT(x) \
3449 	(0x90e80000 + (x) * 0x1000)
3450 #define DLB2_LSP_QID_LDB_INFL_CNT(ver, x) \
3451 	(ver == DLB2_HW_V2 ? \
3452 	 DLB2_V2LSP_QID_LDB_INFL_CNT(x) : \
3453 	 DLB2_V2_5LSP_QID_LDB_INFL_CNT(x))
3454 #define DLB2_LSP_QID_LDB_INFL_CNT_RST 0x0
3455 
3456 #define DLB2_LSP_QID_LDB_INFL_CNT_COUNT	0x00000FFF
3457 #define DLB2_LSP_QID_LDB_INFL_CNT_RSVD0	0xFFFFF000
3458 #define DLB2_LSP_QID_LDB_INFL_CNT_COUNT_LOC	0
3459 #define DLB2_LSP_QID_LDB_INFL_CNT_RSVD0_LOC	12
3460 
3461 #define DLB2_V2LSP_QID_LDB_INFL_LIM(x) \
3462 	(0xa0d80000 + (x) * 0x1000)
3463 #define DLB2_V2_5LSP_QID_LDB_INFL_LIM(x) \
3464 	(0x90f00000 + (x) * 0x1000)
3465 #define DLB2_LSP_QID_LDB_INFL_LIM(ver, x) \
3466 	(ver == DLB2_HW_V2 ? \
3467 	 DLB2_V2LSP_QID_LDB_INFL_LIM(x) : \
3468 	 DLB2_V2_5LSP_QID_LDB_INFL_LIM(x))
3469 #define DLB2_LSP_QID_LDB_INFL_LIM_RST 0x0
3470 
3471 #define DLB2_LSP_QID_LDB_INFL_LIM_LIMIT	0x00000FFF
3472 #define DLB2_LSP_QID_LDB_INFL_LIM_RSVD0	0xFFFFF000
3473 #define DLB2_LSP_QID_LDB_INFL_LIM_LIMIT_LOC	0
3474 #define DLB2_LSP_QID_LDB_INFL_LIM_RSVD0_LOC	12
3475 
3476 #define DLB2_V2LSP_QID2CQIDIX_00(x) \
3477 	(0xa0e00000 + (x) * 0x1000)
3478 #define DLB2_V2_5LSP_QID2CQIDIX_00(x) \
3479 	(0x90f80000 + (x) * 0x1000)
3480 #define DLB2_LSP_QID2CQIDIX_00(ver, x) \
3481 	(ver == DLB2_HW_V2 ? \
3482 	 DLB2_V2LSP_QID2CQIDIX_00(x) : \
3483 	 DLB2_V2_5LSP_QID2CQIDIX_00(x))
3484 #define DLB2_LSP_QID2CQIDIX_00_RST 0x0
3485 #define DLB2_LSP_QID2CQIDIX(ver, x, y) \
3486 	(DLB2_LSP_QID2CQIDIX_00(ver, x) + 0x80000 * (y))
3487 #define DLB2_LSP_QID2CQIDIX_NUM 16
3488 
3489 #define DLB2_LSP_QID2CQIDIX_00_CQ_P0	0x000000FF
3490 #define DLB2_LSP_QID2CQIDIX_00_CQ_P1	0x0000FF00
3491 #define DLB2_LSP_QID2CQIDIX_00_CQ_P2	0x00FF0000
3492 #define DLB2_LSP_QID2CQIDIX_00_CQ_P3	0xFF000000
3493 #define DLB2_LSP_QID2CQIDIX_00_CQ_P0_LOC	0
3494 #define DLB2_LSP_QID2CQIDIX_00_CQ_P1_LOC	8
3495 #define DLB2_LSP_QID2CQIDIX_00_CQ_P2_LOC	16
3496 #define DLB2_LSP_QID2CQIDIX_00_CQ_P3_LOC	24
3497 
3498 #define DLB2_V2LSP_QID2CQIDIX2_00(x) \
3499 	(0xa1600000 + (x) * 0x1000)
3500 #define DLB2_V2_5LSP_QID2CQIDIX2_00(x) \
3501 	(0x91780000 + (x) * 0x1000)
3502 #define DLB2_LSP_QID2CQIDIX2_00(ver, x) \
3503 	(ver == DLB2_HW_V2 ? \
3504 	 DLB2_V2LSP_QID2CQIDIX2_00(x) : \
3505 	 DLB2_V2_5LSP_QID2CQIDIX2_00(x))
3506 #define DLB2_LSP_QID2CQIDIX2_00_RST 0x0
3507 #define DLB2_LSP_QID2CQIDIX2(ver, x, y) \
3508 	(DLB2_LSP_QID2CQIDIX2_00(ver, x) + 0x80000 * (y))
3509 #define DLB2_LSP_QID2CQIDIX2_NUM 16
3510 
3511 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P0	0x000000FF
3512 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P1	0x0000FF00
3513 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P2	0x00FF0000
3514 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P3	0xFF000000
3515 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P0_LOC	0
3516 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P1_LOC	8
3517 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P2_LOC	16
3518 #define DLB2_LSP_QID2CQIDIX2_00_CQ_P3_LOC	24
3519 
3520 #define DLB2_V2LSP_QID_NALDB_MAX_DEPTH(x) \
3521 	(0xa1f00000 + (x) * 0x1000)
3522 #define DLB2_V2_5LSP_QID_NALDB_MAX_DEPTH(x) \
3523 	(0x92080000 + (x) * 0x1000)
3524 #define DLB2_LSP_QID_NALDB_MAX_DEPTH(ver, x) \
3525 	(ver == DLB2_HW_V2 ? \
3526 	 DLB2_V2LSP_QID_NALDB_MAX_DEPTH(x) : \
3527 	 DLB2_V2_5LSP_QID_NALDB_MAX_DEPTH(x))
3528 #define DLB2_LSP_QID_NALDB_MAX_DEPTH_RST 0x0
3529 
3530 #define DLB2_LSP_QID_NALDB_MAX_DEPTH_DEPTH	0x00003FFF
3531 #define DLB2_LSP_QID_NALDB_MAX_DEPTH_RSVD0	0xFFFFC000
3532 #define DLB2_LSP_QID_NALDB_MAX_DEPTH_DEPTH_LOC	0
3533 #define DLB2_LSP_QID_NALDB_MAX_DEPTH_RSVD0_LOC	14
3534 
3535 #define DLB2_V2LSP_QID_NALDB_TOT_ENQ_CNTL(x) \
3536 	(0xa1f80000 + (x) * 0x1000)
3537 #define DLB2_V2_5LSP_QID_NALDB_TOT_ENQ_CNTL(x) \
3538 	(0x92100000 + (x) * 0x1000)
3539 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTL(ver, x) \
3540 	(ver == DLB2_HW_V2 ? \
3541 	 DLB2_V2LSP_QID_NALDB_TOT_ENQ_CNTL(x) : \
3542 	 DLB2_V2_5LSP_QID_NALDB_TOT_ENQ_CNTL(x))
3543 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTL_RST 0x0
3544 
3545 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTL_COUNT	0xFFFFFFFF
3546 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTL_COUNT_LOC	0
3547 
3548 #define DLB2_V2LSP_QID_NALDB_TOT_ENQ_CNTH(x) \
3549 	(0xa2000000 + (x) * 0x1000)
3550 #define DLB2_V2_5LSP_QID_NALDB_TOT_ENQ_CNTH(x) \
3551 	(0x92180000 + (x) * 0x1000)
3552 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTH(ver, x) \
3553 	(ver == DLB2_HW_V2 ? \
3554 	 DLB2_V2LSP_QID_NALDB_TOT_ENQ_CNTH(x) : \
3555 	 DLB2_V2_5LSP_QID_NALDB_TOT_ENQ_CNTH(x))
3556 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTH_RST 0x0
3557 
3558 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTH_COUNT	0xFFFFFFFF
3559 #define DLB2_LSP_QID_NALDB_TOT_ENQ_CNTH_COUNT_LOC	0
3560 
3561 #define DLB2_V2LSP_QID_ATM_DEPTH_THRSH(x) \
3562 	(0xa2080000 + (x) * 0x1000)
3563 #define DLB2_V2_5LSP_QID_ATM_DEPTH_THRSH(x) \
3564 	(0x92200000 + (x) * 0x1000)
3565 #define DLB2_LSP_QID_ATM_DEPTH_THRSH(ver, x) \
3566 	(ver == DLB2_HW_V2 ? \
3567 	 DLB2_V2LSP_QID_ATM_DEPTH_THRSH(x) : \
3568 	 DLB2_V2_5LSP_QID_ATM_DEPTH_THRSH(x))
3569 #define DLB2_LSP_QID_ATM_DEPTH_THRSH_RST 0x0
3570 
3571 #define DLB2_LSP_QID_ATM_DEPTH_THRSH_THRESH	0x00003FFF
3572 #define DLB2_LSP_QID_ATM_DEPTH_THRSH_RSVD0	0xFFFFC000
3573 #define DLB2_LSP_QID_ATM_DEPTH_THRSH_THRESH_LOC	0
3574 #define DLB2_LSP_QID_ATM_DEPTH_THRSH_RSVD0_LOC	14
3575 
3576 #define DLB2_V2LSP_QID_NALDB_DEPTH_THRSH(x) \
3577 	(0xa2100000 + (x) * 0x1000)
3578 #define DLB2_V2_5LSP_QID_NALDB_DEPTH_THRSH(x) \
3579 	(0x92280000 + (x) * 0x1000)
3580 #define DLB2_LSP_QID_NALDB_DEPTH_THRSH(ver, x) \
3581 	(ver == DLB2_HW_V2 ? \
3582 	 DLB2_V2LSP_QID_NALDB_DEPTH_THRSH(x) : \
3583 	 DLB2_V2_5LSP_QID_NALDB_DEPTH_THRSH(x))
3584 #define DLB2_LSP_QID_NALDB_DEPTH_THRSH_RST 0x0
3585 
3586 #define DLB2_LSP_QID_NALDB_DEPTH_THRSH_THRESH	0x00003FFF
3587 #define DLB2_LSP_QID_NALDB_DEPTH_THRSH_RSVD0		0xFFFFC000
3588 #define DLB2_LSP_QID_NALDB_DEPTH_THRSH_THRESH_LOC	0
3589 #define DLB2_LSP_QID_NALDB_DEPTH_THRSH_RSVD0_LOC	14
3590 
3591 #define DLB2_V2LSP_QID_ATM_ACTIVE(x) \
3592 	(0xa2180000 + (x) * 0x1000)
3593 #define DLB2_V2_5LSP_QID_ATM_ACTIVE(x) \
3594 	(0x92300000 + (x) * 0x1000)
3595 #define DLB2_LSP_QID_ATM_ACTIVE(ver, x) \
3596 	(ver == DLB2_HW_V2 ? \
3597 	 DLB2_V2LSP_QID_ATM_ACTIVE(x) : \
3598 	 DLB2_V2_5LSP_QID_ATM_ACTIVE(x))
3599 #define DLB2_LSP_QID_ATM_ACTIVE_RST 0x0
3600 
3601 #define DLB2_LSP_QID_ATM_ACTIVE_COUNT	0x00003FFF
3602 #define DLB2_LSP_QID_ATM_ACTIVE_RSVD0	0xFFFFC000
3603 #define DLB2_LSP_QID_ATM_ACTIVE_COUNT_LOC	0
3604 #define DLB2_LSP_QID_ATM_ACTIVE_RSVD0_LOC	14
3605 
3606 #define DLB2_V2LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0 0xa4000008
3607 #define DLB2_V2_5LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0 0x94000008
3608 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0(ver) \
3609 	(ver == DLB2_HW_V2 ? \
3610 	 DLB2_V2LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0 : \
3611 	 DLB2_V2_5LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0)
3612 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_RST 0x0
3613 
3614 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI0_WEIGHT	0x000000FF
3615 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI1_WEIGHT	0x0000FF00
3616 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI2_WEIGHT	0x00FF0000
3617 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI3_WEIGHT	0xFF000000
3618 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI0_WEIGHT_LOC	0
3619 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI1_WEIGHT_LOC	8
3620 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI2_WEIGHT_LOC	16
3621 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_0_PRI3_WEIGHT_LOC	24
3622 
3623 #define DLB2_V2LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1 0xa400000c
3624 #define DLB2_V2_5LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1 0x9400000c
3625 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1(ver) \
3626 	(ver == DLB2_HW_V2 ? \
3627 	 DLB2_V2LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1 : \
3628 	 DLB2_V2_5LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1)
3629 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_RST 0x0
3630 
3631 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_RSVZ0_V2	0xFFFFFFFF
3632 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_RSVZ0_V2_LOC	0
3633 
3634 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI4_WEIGHT_V2_5	0x000000FF
3635 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI5_WEIGHT_V2_5	0x0000FF00
3636 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI6_WEIGHT_V2_5	0x00FF0000
3637 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI7_WEIGHT_V2_5	0xFF000000
3638 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI4_WEIGHT_V2_5_LOC	0
3639 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI5_WEIGHT_V2_5_LOC	8
3640 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI6_WEIGHT_V2_5_LOC	16
3641 #define DLB2_LSP_CFG_ARB_WEIGHT_ATM_NALB_QID_1_PRI7_WEIGHT_V2_5_LOC	24
3642 
3643 #define DLB2_V2LSP_CFG_ARB_WEIGHT_LDB_QID_0 0xa4000014
3644 #define DLB2_V2_5LSP_CFG_ARB_WEIGHT_LDB_QID_0 0x94000014
3645 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0(ver) \
3646 	(ver == DLB2_HW_V2 ? \
3647 	 DLB2_V2LSP_CFG_ARB_WEIGHT_LDB_QID_0 : \
3648 	 DLB2_V2_5LSP_CFG_ARB_WEIGHT_LDB_QID_0)
3649 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_RST 0x0
3650 
3651 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI0_WEIGHT	0x000000FF
3652 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI1_WEIGHT	0x0000FF00
3653 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI2_WEIGHT	0x00FF0000
3654 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI3_WEIGHT	0xFF000000
3655 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI0_WEIGHT_LOC	0
3656 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI1_WEIGHT_LOC	8
3657 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI2_WEIGHT_LOC	16
3658 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_0_PRI3_WEIGHT_LOC	24
3659 
3660 #define DLB2_V2LSP_CFG_ARB_WEIGHT_LDB_QID_1 0xa4000018
3661 #define DLB2_V2_5LSP_CFG_ARB_WEIGHT_LDB_QID_1 0x94000018
3662 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1(ver) \
3663 	(ver == DLB2_HW_V2 ? \
3664 	 DLB2_V2LSP_CFG_ARB_WEIGHT_LDB_QID_1 : \
3665 	 DLB2_V2_5LSP_CFG_ARB_WEIGHT_LDB_QID_1)
3666 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_RST 0x0
3667 
3668 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_RSVZ0_V2	0xFFFFFFFF
3669 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_RSVZ0_V2_LOC	0
3670 
3671 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI4_WEIGHT_V2_5	0x000000FF
3672 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI5_WEIGHT_V2_5	0x0000FF00
3673 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI6_WEIGHT_V2_5	0x00FF0000
3674 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI7_WEIGHT_V2_5	0xFF000000
3675 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI4_WEIGHT_V2_5_LOC	0
3676 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI5_WEIGHT_V2_5_LOC	8
3677 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI6_WEIGHT_V2_5_LOC	16
3678 #define DLB2_LSP_CFG_ARB_WEIGHT_LDB_QID_1_PRI7_WEIGHT_V2_5_LOC	24
3679 
3680 #define DLB2_V2LSP_LDB_SCHED_CTRL 0xa400002c
3681 #define DLB2_V2_5LSP_LDB_SCHED_CTRL 0x9400002c
3682 #define DLB2_LSP_LDB_SCHED_CTRL(ver) \
3683 	(ver == DLB2_HW_V2 ? \
3684 	 DLB2_V2LSP_LDB_SCHED_CTRL : \
3685 	 DLB2_V2_5LSP_LDB_SCHED_CTRL)
3686 #define DLB2_LSP_LDB_SCHED_CTRL_RST 0x0
3687 
3688 #define DLB2_LSP_LDB_SCHED_CTRL_CQ			0x000000FF
3689 #define DLB2_LSP_LDB_SCHED_CTRL_QIDIX		0x00000700
3690 #define DLB2_LSP_LDB_SCHED_CTRL_VALUE		0x00000800
3691 #define DLB2_LSP_LDB_SCHED_CTRL_NALB_HASWORK_V	0x00001000
3692 #define DLB2_LSP_LDB_SCHED_CTRL_RLIST_HASWORK_V	0x00002000
3693 #define DLB2_LSP_LDB_SCHED_CTRL_SLIST_HASWORK_V	0x00004000
3694 #define DLB2_LSP_LDB_SCHED_CTRL_INFLIGHT_OK_V	0x00008000
3695 #define DLB2_LSP_LDB_SCHED_CTRL_AQED_NFULL_V		0x00010000
3696 #define DLB2_LSP_LDB_SCHED_CTRL_RSVZ0		0xFFFE0000
3697 #define DLB2_LSP_LDB_SCHED_CTRL_CQ_LOC		0
3698 #define DLB2_LSP_LDB_SCHED_CTRL_QIDIX_LOC		8
3699 #define DLB2_LSP_LDB_SCHED_CTRL_VALUE_LOC		11
3700 #define DLB2_LSP_LDB_SCHED_CTRL_NALB_HASWORK_V_LOC	12
3701 #define DLB2_LSP_LDB_SCHED_CTRL_RLIST_HASWORK_V_LOC	13
3702 #define DLB2_LSP_LDB_SCHED_CTRL_SLIST_HASWORK_V_LOC	14
3703 #define DLB2_LSP_LDB_SCHED_CTRL_INFLIGHT_OK_V_LOC	15
3704 #define DLB2_LSP_LDB_SCHED_CTRL_AQED_NFULL_V_LOC	16
3705 #define DLB2_LSP_LDB_SCHED_CTRL_RSVZ0_LOC		17
3706 
3707 #define DLB2_V2LSP_DIR_SCH_CNT_L 0xa4000034
3708 #define DLB2_V2_5LSP_DIR_SCH_CNT_L 0x94000034
3709 #define DLB2_LSP_DIR_SCH_CNT_L(ver) \
3710 	(ver == DLB2_HW_V2 ? \
3711 	 DLB2_V2LSP_DIR_SCH_CNT_L : \
3712 	 DLB2_V2_5LSP_DIR_SCH_CNT_L)
3713 #define DLB2_LSP_DIR_SCH_CNT_L_RST 0x0
3714 
3715 #define DLB2_LSP_DIR_SCH_CNT_L_COUNT	0xFFFFFFFF
3716 #define DLB2_LSP_DIR_SCH_CNT_L_COUNT_LOC	0
3717 
3718 #define DLB2_V2LSP_DIR_SCH_CNT_H 0xa4000038
3719 #define DLB2_V2_5LSP_DIR_SCH_CNT_H 0x94000038
3720 #define DLB2_LSP_DIR_SCH_CNT_H(ver) \
3721 	(ver == DLB2_HW_V2 ? \
3722 	 DLB2_V2LSP_DIR_SCH_CNT_H : \
3723 	 DLB2_V2_5LSP_DIR_SCH_CNT_H)
3724 #define DLB2_LSP_DIR_SCH_CNT_H_RST 0x0
3725 
3726 #define DLB2_LSP_DIR_SCH_CNT_H_COUNT	0xFFFFFFFF
3727 #define DLB2_LSP_DIR_SCH_CNT_H_COUNT_LOC	0
3728 
3729 #define DLB2_V2LSP_LDB_SCH_CNT_L 0xa400003c
3730 #define DLB2_V2_5LSP_LDB_SCH_CNT_L 0x9400003c
3731 #define DLB2_LSP_LDB_SCH_CNT_L(ver) \
3732 	(ver == DLB2_HW_V2 ? \
3733 	 DLB2_V2LSP_LDB_SCH_CNT_L : \
3734 	 DLB2_V2_5LSP_LDB_SCH_CNT_L)
3735 #define DLB2_LSP_LDB_SCH_CNT_L_RST 0x0
3736 
3737 #define DLB2_LSP_LDB_SCH_CNT_L_COUNT	0xFFFFFFFF
3738 #define DLB2_LSP_LDB_SCH_CNT_L_COUNT_LOC	0
3739 
3740 #define DLB2_V2LSP_LDB_SCH_CNT_H 0xa4000040
3741 #define DLB2_V2_5LSP_LDB_SCH_CNT_H 0x94000040
3742 #define DLB2_LSP_LDB_SCH_CNT_H(ver) \
3743 	(ver == DLB2_HW_V2 ? \
3744 	 DLB2_V2LSP_LDB_SCH_CNT_H : \
3745 	 DLB2_V2_5LSP_LDB_SCH_CNT_H)
3746 #define DLB2_LSP_LDB_SCH_CNT_H_RST 0x0
3747 
3748 #define DLB2_LSP_LDB_SCH_CNT_H_COUNT	0xFFFFFFFF
3749 #define DLB2_LSP_LDB_SCH_CNT_H_COUNT_LOC	0
3750 
3751 #define DLB2_V2LSP_CFG_SHDW_CTRL 0xa4000070
3752 #define DLB2_V2_5LSP_CFG_SHDW_CTRL 0x94000070
3753 #define DLB2_LSP_CFG_SHDW_CTRL(ver) \
3754 	(ver == DLB2_HW_V2 ? \
3755 	 DLB2_V2LSP_CFG_SHDW_CTRL : \
3756 	 DLB2_V2_5LSP_CFG_SHDW_CTRL)
3757 #define DLB2_LSP_CFG_SHDW_CTRL_RST 0x0
3758 
3759 #define DLB2_LSP_CFG_SHDW_CTRL_TRANSFER	0x00000001
3760 #define DLB2_LSP_CFG_SHDW_CTRL_RSVD0		0xFFFFFFFE
3761 #define DLB2_LSP_CFG_SHDW_CTRL_TRANSFER_LOC	0
3762 #define DLB2_LSP_CFG_SHDW_CTRL_RSVD0_LOC	1
3763 
3764 #define DLB2_V2LSP_CFG_SHDW_RANGE_COS(x) \
3765 	(0xa4000074 + (x) * 4)
3766 #define DLB2_V2_5LSP_CFG_SHDW_RANGE_COS(x) \
3767 	(0x94000074 + (x) * 4)
3768 #define DLB2_LSP_CFG_SHDW_RANGE_COS(ver, x) \
3769 	(ver == DLB2_HW_V2 ? \
3770 	 DLB2_V2LSP_CFG_SHDW_RANGE_COS(x) : \
3771 	 DLB2_V2_5LSP_CFG_SHDW_RANGE_COS(x))
3772 #define DLB2_LSP_CFG_SHDW_RANGE_COS_RST 0x40
3773 
3774 #define DLB2_LSP_CFG_SHDW_RANGE_COS_BW_RANGE		0x000001FF
3775 #define DLB2_LSP_CFG_SHDW_RANGE_COS_RSVZ0		0x7FFFFE00
3776 #define DLB2_LSP_CFG_SHDW_RANGE_COS_NO_EXTRA_CREDIT	0x80000000
3777 #define DLB2_LSP_CFG_SHDW_RANGE_COS_BW_RANGE_LOC		0
3778 #define DLB2_LSP_CFG_SHDW_RANGE_COS_RSVZ0_LOC		9
3779 #define DLB2_LSP_CFG_SHDW_RANGE_COS_NO_EXTRA_CREDIT_LOC	31
3780 
3781 #define DLB2_V2LSP_CFG_CTRL_GENERAL_0 0xac000000
3782 #define DLB2_V2_5LSP_CFG_CTRL_GENERAL_0 0x9c000000
3783 #define DLB2_LSP_CFG_CTRL_GENERAL_0(ver) \
3784 	(ver == DLB2_HW_V2 ? \
3785 	 DLB2_V2LSP_CFG_CTRL_GENERAL_0 : \
3786 	 DLB2_V2_5LSP_CFG_CTRL_GENERAL_0)
3787 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RST 0x0
3788 
3789 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_ATQ_EMPTY_ARB_V2	0x00000001
3790 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_TOK_UNIT_IDLE_V2	0x00000002
3791 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_RLIST_PRI_V2	0x00000004
3792 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_CMP_UNIT_IDLE_V2	0x00000008
3793 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ0_V2		0x00000030
3794 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OP_V2	0x00000040
3795 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_HALF_BW_V2	0x00000080
3796 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OUT_V2	0x00000100
3797 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_DISAB_MULTI_V2	0x00000200
3798 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OP_V2	0x00000400
3799 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_HALF_BW_V2	0x00000800
3800 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OUT_V2	0x00001000
3801 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_DISAB_MULTI_V2	0x00002000
3802 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OP_V2	0x00004000
3803 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_HALF_BW_V2	0x00008000
3804 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OUT_V2	0x00010000
3805 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OP_V2	0x00020000
3806 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_HALF_BW_V2	0x00040000
3807 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OUT_V2	0x00080000
3808 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_SINGLE_OP_V2	0x00100000
3809 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_HALF_BW_V2	0x00200000
3810 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_DISAB_MULTI_V2	0x00400000
3811 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_SCH_V2	0x00800000
3812 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_CMP_V2	0x01000000
3813 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_CE_TOG_ARB_V2	0x02000000
3814 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ1_V2		0x04000000
3815 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALID_SEL_V2	0x18000000
3816 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALUE_SEL_V2	0x20000000
3817 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_COMPARE_SEL_V2	0xC0000000
3818 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_ATQ_EMPTY_ARB_V2_LOC	0
3819 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_TOK_UNIT_IDLE_V2_LOC		1
3820 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_RLIST_PRI_V2_LOC		2
3821 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_CMP_UNIT_IDLE_V2_LOC		3
3822 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ0_V2_LOC			4
3823 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OP_V2_LOC		6
3824 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_HALF_BW_V2_LOC		7
3825 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OUT_V2_LOC		8
3826 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_DISAB_MULTI_V2_LOC		9
3827 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OP_V2_LOC		10
3828 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_HALF_BW_V2_LOC		11
3829 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OUT_V2_LOC		12
3830 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_DISAB_MULTI_V2_LOC		13
3831 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OP_V2_LOC		14
3832 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_HALF_BW_V2_LOC		15
3833 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OUT_V2_LOC		16
3834 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OP_V2_LOC		17
3835 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_HALF_BW_V2_LOC		18
3836 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OUT_V2_LOC		19
3837 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_SINGLE_OP_V2_LOC		20
3838 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_HALF_BW_V2_LOC		21
3839 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_DISAB_MULTI_V2_LOC		22
3840 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_SCH_V2_LOC		23
3841 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_CMP_V2_LOC		24
3842 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_CE_TOG_ARB_V2_LOC		25
3843 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ1_V2_LOC			26
3844 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALID_SEL_V2_LOC		27
3845 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALUE_SEL_V2_LOC		29
3846 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_COMPARE_SEL_V2_LOC		30
3847 
3848 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_ATQ_EMPTY_ARB_V2_5	0x00000001
3849 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_TOK_UNIT_IDLE_V2_5	0x00000002
3850 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_RLIST_PRI_V2_5	0x00000004
3851 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_CMP_UNIT_IDLE_V2_5	0x00000008
3852 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ENAB_IF_THRESH_V2_5	0x00000010
3853 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ0_V2_5		0x00000020
3854 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OP_V2_5	0x00000040
3855 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_HALF_BW_V2_5	0x00000080
3856 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OUT_V2_5	0x00000100
3857 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_DISAB_MULTI_V2_5	0x00000200
3858 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OP_V2_5	0x00000400
3859 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_HALF_BW_V2_5	0x00000800
3860 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OUT_V2_5	0x00001000
3861 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_DISAB_MULTI_V2_5	0x00002000
3862 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OP_V2_5	0x00004000
3863 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_HALF_BW_V2_5	0x00008000
3864 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OUT_V2_5	0x00010000
3865 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OP_V2_5	0x00020000
3866 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_HALF_BW_V2_5	0x00040000
3867 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OUT_V2_5	0x00080000
3868 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_SINGLE_OP_V2_5	0x00100000
3869 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_HALF_BW_V2_5	0x00200000
3870 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_DISAB_MULTI_V2_5	0x00400000
3871 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_SCH_V2_5	0x00800000
3872 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_CMP_V2_5	0x01000000
3873 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_CE_TOG_ARB_V2_5	0x02000000
3874 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ1_V2_5		0x04000000
3875 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALID_SEL_V2_5	0x18000000
3876 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALUE_SEL_V2_5	0x20000000
3877 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_COMPARE_SEL_V2_5	0xC0000000
3878 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_ATQ_EMPTY_ARB_V2_5_LOC	0
3879 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_TOK_UNIT_IDLE_V2_5_LOC	1
3880 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DISAB_RLIST_PRI_V2_5_LOC		2
3881 #define DLB2_LSP_CFG_CTRL_GENERAL_0_INC_CMP_UNIT_IDLE_V2_5_LOC	3
3882 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ENAB_IF_THRESH_V2_5_LOC		4
3883 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ0_V2_5_LOC			5
3884 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OP_V2_5_LOC		6
3885 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_HALF_BW_V2_5_LOC		7
3886 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_SINGLE_OUT_V2_5_LOC		8
3887 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIR_DISAB_MULTI_V2_5_LOC		9
3888 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OP_V2_5_LOC		10
3889 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_HALF_BW_V2_5_LOC		11
3890 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_SINGLE_OUT_V2_5_LOC		12
3891 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATQ_DISAB_MULTI_V2_5_LOC		13
3892 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OP_V2_5_LOC	14
3893 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_HALF_BW_V2_5_LOC		15
3894 #define DLB2_LSP_CFG_CTRL_GENERAL_0_DIRRPL_SINGLE_OUT_V2_5_LOC	16
3895 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OP_V2_5_LOC		17
3896 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_HALF_BW_V2_5_LOC		18
3897 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LBRPL_SINGLE_OUT_V2_5_LOC	19
3898 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_SINGLE_OP_V2_5_LOC		20
3899 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_HALF_BW_V2_5_LOC		21
3900 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_DISAB_MULTI_V2_5_LOC		22
3901 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_SCH_V2_5_LOC		23
3902 #define DLB2_LSP_CFG_CTRL_GENERAL_0_ATM_SINGLE_CMP_V2_5_LOC		24
3903 #define DLB2_LSP_CFG_CTRL_GENERAL_0_LDB_CE_TOG_ARB_V2_5_LOC		25
3904 #define DLB2_LSP_CFG_CTRL_GENERAL_0_RSVZ1_V2_5_LOC			26
3905 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALID_SEL_V2_5_LOC		27
3906 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_VALUE_SEL_V2_5_LOC		29
3907 #define DLB2_LSP_CFG_CTRL_GENERAL_0_SMON0_COMPARE_SEL_V2_5_LOC	30
3908 
3909 #define DLB2_LSP_SMON_COMPARE0 0xac000048
3910 #define DLB2_LSP_SMON_COMPARE0_RST 0x0
3911 
3912 #define DLB2_LSP_SMON_COMPARE0_COMPARE0	0xFFFFFFFF
3913 #define DLB2_LSP_SMON_COMPARE0_COMPARE0_LOC	0
3914 
3915 #define DLB2_LSP_SMON_COMPARE1 0xac00004c
3916 #define DLB2_LSP_SMON_COMPARE1_RST 0x0
3917 
3918 #define DLB2_LSP_SMON_COMPARE1_COMPARE1	0xFFFFFFFF
3919 #define DLB2_LSP_SMON_COMPARE1_COMPARE1_LOC	0
3920 
3921 #define DLB2_LSP_SMON_CFG0 0xac000050
3922 #define DLB2_LSP_SMON_CFG0_RST 0x40000000
3923 
3924 #define DLB2_LSP_SMON_CFG0_SMON_ENABLE		0x00000001
3925 #define DLB2_LSP_SMON_CFG0_SMON_0TRIGGER_ENABLE	0x00000002
3926 #define DLB2_LSP_SMON_CFG0_RSVZ0			0x0000000C
3927 #define DLB2_LSP_SMON_CFG0_SMON0_FUNCTION		0x00000070
3928 #define DLB2_LSP_SMON_CFG0_SMON0_FUNCTION_COMPARE	0x00000080
3929 #define DLB2_LSP_SMON_CFG0_SMON1_FUNCTION		0x00000700
3930 #define DLB2_LSP_SMON_CFG0_SMON1_FUNCTION_COMPARE	0x00000800
3931 #define DLB2_LSP_SMON_CFG0_SMON_MODE			0x0000F000
3932 #define DLB2_LSP_SMON_CFG0_STOPCOUNTEROVFL		0x00010000
3933 #define DLB2_LSP_SMON_CFG0_INTCOUNTEROVFL		0x00020000
3934 #define DLB2_LSP_SMON_CFG0_STATCOUNTER0OVFL		0x00040000
3935 #define DLB2_LSP_SMON_CFG0_STATCOUNTER1OVFL		0x00080000
3936 #define DLB2_LSP_SMON_CFG0_STOPTIMEROVFL		0x00100000
3937 #define DLB2_LSP_SMON_CFG0_INTTIMEROVFL		0x00200000
3938 #define DLB2_LSP_SMON_CFG0_STATTIMEROVFL		0x00400000
3939 #define DLB2_LSP_SMON_CFG0_RSVZ1			0x00800000
3940 #define DLB2_LSP_SMON_CFG0_TIMER_PRESCALE		0x1F000000
3941 #define DLB2_LSP_SMON_CFG0_RSVZ2			0x20000000
3942 #define DLB2_LSP_SMON_CFG0_VERSION			0xC0000000
3943 #define DLB2_LSP_SMON_CFG0_SMON_ENABLE_LOC			0
3944 #define DLB2_LSP_SMON_CFG0_SMON_0TRIGGER_ENABLE_LOC		1
3945 #define DLB2_LSP_SMON_CFG0_RSVZ0_LOC				2
3946 #define DLB2_LSP_SMON_CFG0_SMON0_FUNCTION_LOC		4
3947 #define DLB2_LSP_SMON_CFG0_SMON0_FUNCTION_COMPARE_LOC	7
3948 #define DLB2_LSP_SMON_CFG0_SMON1_FUNCTION_LOC		8
3949 #define DLB2_LSP_SMON_CFG0_SMON1_FUNCTION_COMPARE_LOC	11
3950 #define DLB2_LSP_SMON_CFG0_SMON_MODE_LOC			12
3951 #define DLB2_LSP_SMON_CFG0_STOPCOUNTEROVFL_LOC		16
3952 #define DLB2_LSP_SMON_CFG0_INTCOUNTEROVFL_LOC		17
3953 #define DLB2_LSP_SMON_CFG0_STATCOUNTER0OVFL_LOC		18
3954 #define DLB2_LSP_SMON_CFG0_STATCOUNTER1OVFL_LOC		19
3955 #define DLB2_LSP_SMON_CFG0_STOPTIMEROVFL_LOC			20
3956 #define DLB2_LSP_SMON_CFG0_INTTIMEROVFL_LOC			21
3957 #define DLB2_LSP_SMON_CFG0_STATTIMEROVFL_LOC			22
3958 #define DLB2_LSP_SMON_CFG0_RSVZ1_LOC				23
3959 #define DLB2_LSP_SMON_CFG0_TIMER_PRESCALE_LOC		24
3960 #define DLB2_LSP_SMON_CFG0_RSVZ2_LOC				29
3961 #define DLB2_LSP_SMON_CFG0_VERSION_LOC			30
3962 
3963 #define DLB2_LSP_SMON_CFG1 0xac000054
3964 #define DLB2_LSP_SMON_CFG1_RST 0x0
3965 
3966 #define DLB2_LSP_SMON_CFG1_MODE0	0x000000FF
3967 #define DLB2_LSP_SMON_CFG1_MODE1	0x0000FF00
3968 #define DLB2_LSP_SMON_CFG1_RSVZ0	0xFFFF0000
3969 #define DLB2_LSP_SMON_CFG1_MODE0_LOC	0
3970 #define DLB2_LSP_SMON_CFG1_MODE1_LOC	8
3971 #define DLB2_LSP_SMON_CFG1_RSVZ0_LOC	16
3972 
3973 #define DLB2_LSP_SMON_ACTIVITYCNTR0 0xac000058
3974 #define DLB2_LSP_SMON_ACTIVITYCNTR0_RST 0x0
3975 
3976 #define DLB2_LSP_SMON_ACTIVITYCNTR0_COUNTER0	0xFFFFFFFF
3977 #define DLB2_LSP_SMON_ACTIVITYCNTR0_COUNTER0_LOC	0
3978 
3979 #define DLB2_LSP_SMON_ACTIVITYCNTR1 0xac00005c
3980 #define DLB2_LSP_SMON_ACTIVITYCNTR1_RST 0x0
3981 
3982 #define DLB2_LSP_SMON_ACTIVITYCNTR1_COUNTER1	0xFFFFFFFF
3983 #define DLB2_LSP_SMON_ACTIVITYCNTR1_COUNTER1_LOC	0
3984 
3985 #define DLB2_LSP_SMON_MAX_TMR 0xac000060
3986 #define DLB2_LSP_SMON_MAX_TMR_RST 0x0
3987 
3988 #define DLB2_LSP_SMON_MAX_TMR_MAXVALUE	0xFFFFFFFF
3989 #define DLB2_LSP_SMON_MAX_TMR_MAXVALUE_LOC	0
3990 
3991 #define DLB2_LSP_SMON_TMR 0xac000064
3992 #define DLB2_LSP_SMON_TMR_RST 0x0
3993 
3994 #define DLB2_LSP_SMON_TMR_TIMER	0xFFFFFFFF
3995 #define DLB2_LSP_SMON_TMR_TIMER_LOC	0
3996 
3997 #define DLB2_V2CM_DIAG_RESET_STS 0xb4000000
3998 #define DLB2_V2_5CM_DIAG_RESET_STS 0xa4000000
3999 #define DLB2_CM_DIAG_RESET_STS(ver) \
4000 	(ver == DLB2_HW_V2 ? \
4001 	 V2CM_DIAG_RESET_STS : \
4002 	 V2_5CM_DIAG_RESET_STS)
4003 #define DLB2_CM_DIAG_RESET_STS_RST 0x80000bff
4004 
4005 #define DLB2_CM_DIAG_RESET_STS_CHP_PF_RESET_DONE	0x00000001
4006 #define DLB2_CM_DIAG_RESET_STS_ROP_PF_RESET_DONE	0x00000002
4007 #define DLB2_CM_DIAG_RESET_STS_LSP_PF_RESET_DONE	0x00000004
4008 #define DLB2_CM_DIAG_RESET_STS_NALB_PF_RESET_DONE	0x00000008
4009 #define DLB2_CM_DIAG_RESET_STS_AP_PF_RESET_DONE	0x00000010
4010 #define DLB2_CM_DIAG_RESET_STS_DP_PF_RESET_DONE	0x00000020
4011 #define DLB2_CM_DIAG_RESET_STS_QED_PF_RESET_DONE	0x00000040
4012 #define DLB2_CM_DIAG_RESET_STS_DQED_PF_RESET_DONE	0x00000080
4013 #define DLB2_CM_DIAG_RESET_STS_AQED_PF_RESET_DONE	0x00000100
4014 #define DLB2_CM_DIAG_RESET_STS_SYS_PF_RESET_DONE	0x00000200
4015 #define DLB2_CM_DIAG_RESET_STS_PF_RESET_ACTIVE	0x00000400
4016 #define DLB2_CM_DIAG_RESET_STS_FLRSM_STATE		0x0003F800
4017 #define DLB2_CM_DIAG_RESET_STS_RSVD0			0x7FFC0000
4018 #define DLB2_CM_DIAG_RESET_STS_DLB_PROC_RESET_DONE	0x80000000
4019 #define DLB2_CM_DIAG_RESET_STS_CHP_PF_RESET_DONE_LOC		0
4020 #define DLB2_CM_DIAG_RESET_STS_ROP_PF_RESET_DONE_LOC		1
4021 #define DLB2_CM_DIAG_RESET_STS_LSP_PF_RESET_DONE_LOC		2
4022 #define DLB2_CM_DIAG_RESET_STS_NALB_PF_RESET_DONE_LOC	3
4023 #define DLB2_CM_DIAG_RESET_STS_AP_PF_RESET_DONE_LOC		4
4024 #define DLB2_CM_DIAG_RESET_STS_DP_PF_RESET_DONE_LOC		5
4025 #define DLB2_CM_DIAG_RESET_STS_QED_PF_RESET_DONE_LOC		6
4026 #define DLB2_CM_DIAG_RESET_STS_DQED_PF_RESET_DONE_LOC	7
4027 #define DLB2_CM_DIAG_RESET_STS_AQED_PF_RESET_DONE_LOC	8
4028 #define DLB2_CM_DIAG_RESET_STS_SYS_PF_RESET_DONE_LOC		9
4029 #define DLB2_CM_DIAG_RESET_STS_PF_RESET_ACTIVE_LOC		10
4030 #define DLB2_CM_DIAG_RESET_STS_FLRSM_STATE_LOC		11
4031 #define DLB2_CM_DIAG_RESET_STS_RSVD0_LOC			18
4032 #define DLB2_CM_DIAG_RESET_STS_DLB_PROC_RESET_DONE_LOC	31
4033 
4034 #define DLB2_V2CM_CFG_DIAGNOSTIC_IDLE_STATUS 0xb4000004
4035 #define DLB2_V2_5CM_CFG_DIAGNOSTIC_IDLE_STATUS 0xa4000004
4036 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS(ver) \
4037 	(ver == DLB2_HW_V2 ? \
4038 	 DLB2_V2CM_CFG_DIAGNOSTIC_IDLE_STATUS : \
4039 	 DLB2_V2_5CM_CFG_DIAGNOSTIC_IDLE_STATUS)
4040 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_RST 0x9d0fffff
4041 
4042 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_CHP_PIPEIDLE		0x00000001
4043 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_ROP_PIPEIDLE		0x00000002
4044 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_LSP_PIPEIDLE		0x00000004
4045 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_NALB_PIPEIDLE	0x00000008
4046 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AP_PIPEIDLE		0x00000010
4047 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DP_PIPEIDLE		0x00000020
4048 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_QED_PIPEIDLE		0x00000040
4049 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DQED_PIPEIDLE	0x00000080
4050 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AQED_PIPEIDLE	0x00000100
4051 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_SYS_PIPEIDLE		0x00000200
4052 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_CHP_UNIT_IDLE	0x00000400
4053 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_ROP_UNIT_IDLE	0x00000800
4054 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_LSP_UNIT_IDLE	0x00001000
4055 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_NALB_UNIT_IDLE	0x00002000
4056 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AP_UNIT_IDLE		0x00004000
4057 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DP_UNIT_IDLE		0x00008000
4058 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_QED_UNIT_IDLE	0x00010000
4059 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DQED_UNIT_IDLE	0x00020000
4060 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AQED_UNIT_IDLE	0x00040000
4061 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_SYS_UNIT_IDLE	0x00080000
4062 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_RSVD1		0x00F00000
4063 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_CFG_RING_IDLE	0x01000000
4064 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_CFG_MSTR_IDLE	0x02000000
4065 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_FLR_CLKREQ_B	0x04000000
4066 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_PROC_IDLE	0x08000000
4067 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_PROC_IDLE_MASKED 0x10000000
4068 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_RSVD0		 0x60000000
4069 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DLB_FUNC_IDLE	 0x80000000
4070 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_CHP_PIPEIDLE_LOC		0
4071 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_ROP_PIPEIDLE_LOC		1
4072 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_LSP_PIPEIDLE_LOC		2
4073 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_NALB_PIPEIDLE_LOC		3
4074 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AP_PIPEIDLE_LOC		4
4075 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DP_PIPEIDLE_LOC		5
4076 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_QED_PIPEIDLE_LOC		6
4077 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DQED_PIPEIDLE_LOC		7
4078 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AQED_PIPEIDLE_LOC		8
4079 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_SYS_PIPEIDLE_LOC		9
4080 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_CHP_UNIT_IDLE_LOC		10
4081 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_ROP_UNIT_IDLE_LOC		11
4082 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_LSP_UNIT_IDLE_LOC		12
4083 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_NALB_UNIT_IDLE_LOC	13
4084 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AP_UNIT_IDLE_LOC		14
4085 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DP_UNIT_IDLE_LOC		15
4086 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_QED_UNIT_IDLE_LOC		16
4087 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DQED_UNIT_IDLE_LOC	17
4088 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_AQED_UNIT_IDLE_LOC	18
4089 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_SYS_UNIT_IDLE_LOC		19
4090 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_RSVD1_LOC			20
4091 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_CFG_RING_IDLE_LOC	24
4092 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_CFG_MSTR_IDLE_LOC	25
4093 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_FLR_CLKREQ_B_LOC	26
4094 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_PROC_IDLE_LOC	27
4095 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_MSTR_PROC_IDLE_MASKED_LOC	28
4096 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_RSVD0_LOC			29
4097 #define DLB2_CM_CFG_DIAGNOSTIC_IDLE_STATUS_DLB_FUNC_IDLE_LOC		31
4098 
4099 #define DLB2_V2CM_CFG_PM_STATUS 0xb4000014
4100 #define DLB2_V2_5CM_CFG_PM_STATUS 0xa4000014
4101 #define DLB2_CM_CFG_PM_STATUS(ver) \
4102 	(ver == DLB2_HW_V2 ? \
4103 	 DLB2_V2CM_CFG_PM_STATUS : \
4104 	 DLB2_V2_5CM_CFG_PM_STATUS)
4105 #define DLB2_CM_CFG_PM_STATUS_RST 0x100403e
4106 
4107 #define DLB2_CM_CFG_PM_STATUS_PROCHOT		0x00000001
4108 #define DLB2_CM_CFG_PM_STATUS_PGCB_DLB_IDLE		0x00000002
4109 #define DLB2_CM_CFG_PM_STATUS_PGCB_DLB_PG_RDY_ACK_B	0x00000004
4110 #define DLB2_CM_CFG_PM_STATUS_PMSM_PGCB_REQ_B	0x00000008
4111 #define DLB2_CM_CFG_PM_STATUS_PGBC_PMC_PG_REQ_B	0x00000010
4112 #define DLB2_CM_CFG_PM_STATUS_PMC_PGCB_PG_ACK_B	0x00000020
4113 #define DLB2_CM_CFG_PM_STATUS_PMC_PGCB_FET_EN_B	0x00000040
4114 #define DLB2_CM_CFG_PM_STATUS_PGCB_FET_EN_B		0x00000080
4115 #define DLB2_CM_CFG_PM_STATUS_RSVZ0			0x00000100
4116 #define DLB2_CM_CFG_PM_STATUS_RSVZ1			0x00000200
4117 #define DLB2_CM_CFG_PM_STATUS_FUSE_FORCE_ON		0x00000400
4118 #define DLB2_CM_CFG_PM_STATUS_FUSE_PROC_DISABLE	0x00000800
4119 #define DLB2_CM_CFG_PM_STATUS_RSVZ2			0x00001000
4120 #define DLB2_CM_CFG_PM_STATUS_RSVZ3			0x00002000
4121 #define DLB2_CM_CFG_PM_STATUS_PM_FSM_D0TOD3_OK	0x00004000
4122 #define DLB2_CM_CFG_PM_STATUS_PM_FSM_D3TOD0_OK	0x00008000
4123 #define DLB2_CM_CFG_PM_STATUS_DLB_IN_D3		0x00010000
4124 #define DLB2_CM_CFG_PM_STATUS_RSVZ4			0x00FE0000
4125 #define DLB2_CM_CFG_PM_STATUS_PMSM			0xFF000000
4126 #define DLB2_CM_CFG_PM_STATUS_PROCHOT_LOC			0
4127 #define DLB2_CM_CFG_PM_STATUS_PGCB_DLB_IDLE_LOC		1
4128 #define DLB2_CM_CFG_PM_STATUS_PGCB_DLB_PG_RDY_ACK_B_LOC	2
4129 #define DLB2_CM_CFG_PM_STATUS_PMSM_PGCB_REQ_B_LOC		3
4130 #define DLB2_CM_CFG_PM_STATUS_PGBC_PMC_PG_REQ_B_LOC		4
4131 #define DLB2_CM_CFG_PM_STATUS_PMC_PGCB_PG_ACK_B_LOC		5
4132 #define DLB2_CM_CFG_PM_STATUS_PMC_PGCB_FET_EN_B_LOC		6
4133 #define DLB2_CM_CFG_PM_STATUS_PGCB_FET_EN_B_LOC		7
4134 #define DLB2_CM_CFG_PM_STATUS_RSVZ0_LOC			8
4135 #define DLB2_CM_CFG_PM_STATUS_RSVZ1_LOC			9
4136 #define DLB2_CM_CFG_PM_STATUS_FUSE_FORCE_ON_LOC		10
4137 #define DLB2_CM_CFG_PM_STATUS_FUSE_PROC_DISABLE_LOC		11
4138 #define DLB2_CM_CFG_PM_STATUS_RSVZ2_LOC			12
4139 #define DLB2_CM_CFG_PM_STATUS_RSVZ3_LOC			13
4140 #define DLB2_CM_CFG_PM_STATUS_PM_FSM_D0TOD3_OK_LOC		14
4141 #define DLB2_CM_CFG_PM_STATUS_PM_FSM_D3TOD0_OK_LOC		15
4142 #define DLB2_CM_CFG_PM_STATUS_DLB_IN_D3_LOC			16
4143 #define DLB2_CM_CFG_PM_STATUS_RSVZ4_LOC			17
4144 #define DLB2_CM_CFG_PM_STATUS_PMSM_LOC			24
4145 
4146 #define DLB2_V2CM_CFG_PM_PMCSR_DISABLE 0xb4000018
4147 #define DLB2_V2_5CM_CFG_PM_PMCSR_DISABLE 0xa4000018
4148 #define DLB2_CM_CFG_PM_PMCSR_DISABLE(ver) \
4149 	(ver == DLB2_HW_V2 ? \
4150 	 DLB2_V2CM_CFG_PM_PMCSR_DISABLE : \
4151 	 DLB2_V2_5CM_CFG_PM_PMCSR_DISABLE)
4152 #define DLB2_CM_CFG_PM_PMCSR_DISABLE_RST 0x1
4153 
4154 #define DLB2_CM_CFG_PM_PMCSR_DISABLE_DISABLE	0x00000001
4155 #define DLB2_CM_CFG_PM_PMCSR_DISABLE_RSVZ0	0xFFFFFFFE
4156 #define DLB2_CM_CFG_PM_PMCSR_DISABLE_DISABLE_LOC	0
4157 #define DLB2_CM_CFG_PM_PMCSR_DISABLE_RSVZ0_LOC	1
4158 
4159 #define DLB2_VF_VF2PF_MAILBOX_BYTES 256
4160 #define DLB2_VF_VF2PF_MAILBOX(x) \
4161 	(0x1000 + (x) * 0x4)
4162 #define DLB2_VF_VF2PF_MAILBOX_RST 0x0
4163 
4164 #define DLB2_VF_VF2PF_MAILBOX_MSG	0xFFFFFFFF
4165 #define DLB2_VF_VF2PF_MAILBOX_MSG_LOC	0
4166 
4167 #define DLB2_VF_VF2PF_MAILBOX_ISR 0x1f00
4168 #define DLB2_VF_VF2PF_MAILBOX_ISR_RST 0x0
4169 #define DLB2_VF_SIOV_MBOX_ISR_TRIGGER 0x8000
4170 
4171 #define DLB2_VF_VF2PF_MAILBOX_ISR_ISR	0x00000001
4172 #define DLB2_VF_VF2PF_MAILBOX_ISR_RSVD0	0xFFFFFFFE
4173 #define DLB2_VF_VF2PF_MAILBOX_ISR_ISR_LOC	0
4174 #define DLB2_VF_VF2PF_MAILBOX_ISR_RSVD0_LOC	1
4175 
4176 #define DLB2_VF_PF2VF_MAILBOX_BYTES 64
4177 #define DLB2_VF_PF2VF_MAILBOX(x) \
4178 	(0x2000 + (x) * 0x4)
4179 #define DLB2_VF_PF2VF_MAILBOX_RST 0x0
4180 
4181 #define DLB2_VF_PF2VF_MAILBOX_MSG	0xFFFFFFFF
4182 #define DLB2_VF_PF2VF_MAILBOX_MSG_LOC	0
4183 
4184 #define DLB2_VF_PF2VF_MAILBOX_ISR 0x2f00
4185 #define DLB2_VF_PF2VF_MAILBOX_ISR_RST 0x0
4186 
4187 #define DLB2_VF_PF2VF_MAILBOX_ISR_PF_ISR	0x00000001
4188 #define DLB2_VF_PF2VF_MAILBOX_ISR_RSVD0	0xFFFFFFFE
4189 #define DLB2_VF_PF2VF_MAILBOX_ISR_PF_ISR_LOC	0
4190 #define DLB2_VF_PF2VF_MAILBOX_ISR_RSVD0_LOC	1
4191 
4192 #define DLB2_VF_VF_MSI_ISR_PEND 0x2f10
4193 #define DLB2_VF_VF_MSI_ISR_PEND_RST 0x0
4194 
4195 #define DLB2_VF_VF_MSI_ISR_PEND_ISR_PEND	0xFFFFFFFF
4196 #define DLB2_VF_VF_MSI_ISR_PEND_ISR_PEND_LOC	0
4197 
4198 #define DLB2_VF_VF_RESET_IN_PROGRESS 0x3000
4199 #define DLB2_VF_VF_RESET_IN_PROGRESS_RST 0x1
4200 
4201 #define DLB2_VF_VF_RESET_IN_PROGRESS_RESET_IN_PROGRESS	0x00000001
4202 #define DLB2_VF_VF_RESET_IN_PROGRESS_RSVD0			0xFFFFFFFE
4203 #define DLB2_VF_VF_RESET_IN_PROGRESS_RESET_IN_PROGRESS_LOC	0
4204 #define DLB2_VF_VF_RESET_IN_PROGRESS_RSVD0_LOC		1
4205 
4206 #define DLB2_VF_VF_MSI_ISR 0x4000
4207 #define DLB2_VF_VF_MSI_ISR_RST 0x0
4208 
4209 #define DLB2_VF_VF_MSI_ISR_VF_MSI_ISR	0xFFFFFFFF
4210 #define DLB2_VF_VF_MSI_ISR_VF_MSI_ISR_LOC	0
4211 
4212 #define DLB2_SYS_TOTAL_CREDITS 0x10000100
4213 #define DLB2_SYS_TOTAL_CREDITS_RST 0x4000
4214 
4215 #define DLB2_SYS_TOTAL_CREDITS_TOTAL_CREDITS	0xFFFFFFFF
4216 #define DLB2_SYS_TOTAL_CREDITS_TOTAL_CREDITS_LOC	0
4217 
4218 #define DLB2_SYS_LDB_CQ_AI_ADDR_U(x) \
4219 	(0x10000fa4 + (x) * 0x1000)
4220 #define DLB2_SYS_LDB_CQ_AI_ADDR_U_RST 0x0
4221 
4222 #define DLB2_SYS_LDB_CQ_AI_ADDR_U_CQ_AI_ADDR_U	0xFFFFFFFF
4223 #define DLB2_SYS_LDB_CQ_AI_ADDR_U_CQ_AI_ADDR_U_LOC	0
4224 
4225 #define DLB2_SYS_LDB_CQ_AI_ADDR_L(x) \
4226 	(0x10000fa0 + (x) * 0x1000)
4227 #define DLB2_SYS_LDB_CQ_AI_ADDR_L_RST 0x0
4228 
4229 #define DLB2_SYS_LDB_CQ_AI_ADDR_L_RSVD0		0x00000003
4230 #define DLB2_SYS_LDB_CQ_AI_ADDR_L_CQ_AI_ADDR_L	0xFFFFFFFC
4231 #define DLB2_SYS_LDB_CQ_AI_ADDR_L_RSVD0_LOC		0
4232 #define DLB2_SYS_LDB_CQ_AI_ADDR_L_CQ_AI_ADDR_L_LOC	2
4233 
4234 #define DLB2_SYS_DIR_CQ_AI_ADDR_U(x) \
4235 	(0x10000fe4 + (x) * 0x1000)
4236 #define DLB2_SYS_DIR_CQ_AI_ADDR_U_RST 0x0
4237 
4238 #define DLB2_SYS_DIR_CQ_AI_ADDR_U_CQ_AI_ADDR_U	0xFFFFFFFF
4239 #define DLB2_SYS_DIR_CQ_AI_ADDR_U_CQ_AI_ADDR_U_LOC	0
4240 
4241 #define DLB2_SYS_DIR_CQ_AI_ADDR_L(x) \
4242 	(0x10000fe0 + (x) * 0x1000)
4243 #define DLB2_SYS_DIR_CQ_AI_ADDR_L_RST 0x0
4244 
4245 #define DLB2_SYS_DIR_CQ_AI_ADDR_L_RSVD0		0x00000003
4246 #define DLB2_SYS_DIR_CQ_AI_ADDR_L_CQ_AI_ADDR_L	0xFFFFFFFC
4247 #define DLB2_SYS_DIR_CQ_AI_ADDR_L_RSVD0_LOC		0
4248 #define DLB2_SYS_DIR_CQ_AI_ADDR_L_CQ_AI_ADDR_L_LOC	2
4249 
4250 #define DLB2_SYS_WB_DIR_CQ_STATE(x) \
4251 	(0x11c00000 + (x) * 0x1000)
4252 #define DLB2_SYS_WB_DIR_CQ_STATE_RST 0x0
4253 
4254 #define DLB2_SYS_WB_DIR_CQ_STATE_WB0_V	0x00000001
4255 #define DLB2_SYS_WB_DIR_CQ_STATE_WB1_V	0x00000002
4256 #define DLB2_SYS_WB_DIR_CQ_STATE_WB2_V	0x00000004
4257 #define DLB2_SYS_WB_DIR_CQ_STATE_DIR_OPT	0x00000008
4258 #define DLB2_SYS_WB_DIR_CQ_STATE_CQ_OPT_CLR	0x00000010
4259 #define DLB2_SYS_WB_DIR_CQ_STATE_RSVD0	0xFFFFFFE0
4260 #define DLB2_SYS_WB_DIR_CQ_STATE_WB0_V_LOC		0
4261 #define DLB2_SYS_WB_DIR_CQ_STATE_WB1_V_LOC		1
4262 #define DLB2_SYS_WB_DIR_CQ_STATE_WB2_V_LOC		2
4263 #define DLB2_SYS_WB_DIR_CQ_STATE_DIR_OPT_LOC		3
4264 #define DLB2_SYS_WB_DIR_CQ_STATE_CQ_OPT_CLR_LOC	4
4265 #define DLB2_SYS_WB_DIR_CQ_STATE_RSVD0_LOC		5
4266 
4267 #define DLB2_SYS_WB_LDB_CQ_STATE(x) \
4268 	(0x11d00000 + (x) * 0x1000)
4269 #define DLB2_SYS_WB_LDB_CQ_STATE_RST 0x0
4270 
4271 #define DLB2_SYS_WB_LDB_CQ_STATE_WB0_V	0x00000001
4272 #define DLB2_SYS_WB_LDB_CQ_STATE_WB1_V	0x00000002
4273 #define DLB2_SYS_WB_LDB_CQ_STATE_WB2_V	0x00000004
4274 #define DLB2_SYS_WB_LDB_CQ_STATE_RSVD1	0x00000008
4275 #define DLB2_SYS_WB_LDB_CQ_STATE_CQ_OPT_CLR	0x00000010
4276 #define DLB2_SYS_WB_LDB_CQ_STATE_RSVD0	0xFFFFFFE0
4277 #define DLB2_SYS_WB_LDB_CQ_STATE_WB0_V_LOC		0
4278 #define DLB2_SYS_WB_LDB_CQ_STATE_WB1_V_LOC		1
4279 #define DLB2_SYS_WB_LDB_CQ_STATE_WB2_V_LOC		2
4280 #define DLB2_SYS_WB_LDB_CQ_STATE_RSVD1_LOC		3
4281 #define DLB2_SYS_WB_LDB_CQ_STATE_CQ_OPT_CLR_LOC	4
4282 #define DLB2_SYS_WB_LDB_CQ_STATE_RSVD0_LOC		5
4283 
4284 #define DLB2_CHP_CFG_VAS_CRD(x) \
4285 	(0x40000000 + (x) * 0x1000)
4286 #define DLB2_CHP_CFG_VAS_CRD_RST 0x0
4287 
4288 #define DLB2_CHP_CFG_VAS_CRD_COUNT	0x00007FFF
4289 #define DLB2_CHP_CFG_VAS_CRD_RSVD0	0xFFFF8000
4290 #define DLB2_CHP_CFG_VAS_CRD_COUNT_LOC	0
4291 #define DLB2_CHP_CFG_VAS_CRD_RSVD0_LOC	15
4292 
4293 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT(x) \
4294 	(0x90b00000 + (x) * 0x1000)
4295 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_RST 0x0
4296 
4297 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_LIMIT	0x00007FFF
4298 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_V	0x00008000
4299 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_RSVD0	0xFFFF0000
4300 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_LIMIT_LOC	0
4301 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_V_LOC		15
4302 #define DLB2_LSP_CFG_CQ_LDB_WU_LIMIT_RSVD0_LOC	16
4303 
4304 #endif /* __DLB2_REGS_H */
4305