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Searched refs:DIV_ROUND_UP (Results 1 – 25 of 25) sorted by relevance

/dpdk/drivers/net/cxgbe/
H A Dcxgbe_ofld.h17 V_FW_WR_LEN16(DIV_ROUND_UP(sizeof(*w), 16)) | \
30 (w)->wr.wr_mid = cpu_to_be32(V_FW_WR_LEN16(DIV_ROUND_UP(wrlen, 16)) | \
H A Dcxgbe_compat.h175 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
179 #define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
H A Dsge.c462 return DIV_ROUND_UP(n, 8); in flits_to_desc()
508 return DIV_ROUND_UP(m->pkt_len + hdrlen, sizeof(__be64)); in calc_tx_flits()
782 wr_mid = V_FW_WR_LEN16(DIV_ROUND_UP(q->coalesce.flits, 2)); in ship_tx_pkt_coalesce_wr()
869 ndesc = DIV_ROUND_UP(q->coalesce.flits + flits, 8); in should_tx_packet_coalesce()
953 mc->len = htonl(DIV_ROUND_UP(flits, 2)); in tx_do_packet_coalesce()
1119 wr_mid = V_FW_WR_LEN16(DIV_ROUND_UP(flits, 2)); in t4_eth_xmit()
1325 ndesc = DIV_ROUND_UP(mbuf->pkt_len, sizeof(struct tx_desc)); in ctrl_xmit()
H A Dcxgbe_filter.c222 txpkt->len = cpu_to_be32(DIV_ROUND_UP(sizeof(*req), 16)); in mk_set_tcb_field_ulp()
374 txpkt->len = cpu_to_be32(DIV_ROUND_UP(sizeof(*abort_req), 16)); in mk_abort_req_ulp()
398 txpkt->len = cpu_to_be32(DIV_ROUND_UP(sizeof(*abort_rpl), 16)); in mk_abort_rpl_ulp()
/dpdk/drivers/raw/ifpga/base/
H A Dopae_osdep.h73 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
76 #define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
/dpdk/drivers/net/hinic/base/
H A Dhinic_compat.h73 #define DIV_ROUND_UP(X, Y) (((X) + ((Y) - 1)) / (Y)) macro
76 #define ROUND_UP(X, Y) (DIV_ROUND_UP(X, Y) * (Y))
/dpdk/drivers/net/i40e/base/
H A Di40e_osdep.h231 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) macro
237 #define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
/dpdk/drivers/net/cxgbe/base/
H A Dt4vf_hw.c365 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, in t4vf_query_params()
461 len16 = DIV_ROUND_UP(offsetof(struct fw_params_cmd, in t4vf_set_params()
629 size_t len16 = DIV_ROUND_UP(len, 16); in t4vf_get_port_stats_fw()
H A Dt4_hw.c2633 u32 exprom_header_buf[DIV_ROUND_UP(sizeof(struct exprom_header), in t4_get_exprom_version()
/dpdk/drivers/net/ice/base/
H A Dice_osdep.h321 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
327 #define usleep_range(min, max) msleep(DIV_ROUND_UP(min, 1000))
/dpdk/drivers/net/hns3/
H A Dhns3_regs.c180 cmd_num = DIV_ROUND_UP(regs_num + HNS3_32_BIT_DESC_NODATA_LEN, in hns3_get_32_bit_regs()
237 cmd_num = DIV_ROUND_UP(regs_num + HNS3_64_BIT_DESC_NODATA_LEN, in hns3_get_64_bit_regs()
H A Dhns3_ethdev.h957 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
H A Dhns3_fdir.c132 #define MAX_KEY_DWORDS DIV_ROUND_UP(MAX_KEY_LENGTH / HNS3_BITS_PER_BYTE, 4)
/dpdk/drivers/net/qede/base/
H A Decore_init_fw_funcs.c27 (pq_size ? DIV_ROUND_UP((pq_size + 1) * QM_PQ_ELEMENT_SIZE, 0x1000) : 0)
29 (pq_size ? DIV_ROUND_UP(pq_size, 0x100) - 1 : 0)
1316 tc_headroom_blocks = (u32)DIV_ROUND_UP(req->headroom_per_tc, in ecore_init_brb_ram()
1318 min_pkt_size_blocks = (u32)DIV_ROUND_UP(req->min_pkt_size, in ecore_init_brb_ram()
1337 tc_guaranteed_blocks = (u32)DIV_ROUND_UP(req->guranteed_per_tc, in ecore_init_brb_ram()
2062 #define PHYS_ADDR_DWORDS DIV_ROUND_UP(sizeof(dma_addr_t), 4)
H A Decore_cxt.c344 *p_line += DIV_ROUND_UP(p_blk->total_size, p_blk->real_size_in_page); in ecore_ilt_cli_adv_line()
764 p_t2->num_pages = DIV_ROUND_UP(total_size, psz); in ecore_cxt_src_t2_alloc()
880 lines = DIV_ROUND_UP(sz_left, p_blk->real_size_in_page) - lines_to_skip; in ecore_ilt_blk_alloc()
1003 size = MAP_WORD_SIZE * DIV_ROUND_UP(cid_count, BITS_PER_MAP_WORD); in __ecore_cid_map_alloc_single()
1220 len = DIV_ROUND_UP(p_map->max_count, in ecore_cxt_mngr_setup()
1231 len = DIV_ROUND_UP(p_map->max_count, in ecore_cxt_mngr_setup()
2187 return DIV_ROUND_UP(p_blk->total_size, p_blk->real_size_in_page); in ecore_blk_calculate_pages()
H A Dbcm_osal.h398 #define DIV_ROUND_UP(size, to_what) RTE_DIV_ROUND_UP(size, to_what) macro
H A Decore_chain.h160 DIV_ROUND_UP(elem_cnt, USABLE_ELEMS_PER_PAGE(elem_size, mode))
H A Decore_mcp.c716 max_retries = DIV_ROUND_UP(max_retries, 1000); in ecore_mcp_cmd_and_union()
4246 DIV_ROUND_UP(p_params->retry_interval, in ecore_mcp_resc_lock()
/dpdk/drivers/net/bnx2x/
H A Dbnx2x.h86 #ifndef DIV_ROUND_UP
87 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
442 #define CNIC_ILT_LINES DIV_ROUND_UP(CNIC_CID_MAX, ILT_PAGE_CIDS)
454 #define TM_ILT_LINES DIV_ROUND_UP(TM_ILT_SZ, TM_ILT_PAGE_SZ)
463 #define SRC_ILT_LINES DIV_ROUND_UP(SRC_ILT_SZ, SRC_ILT_PAGE_SZ)
1307 (DIV_ROUND_UP(BNX2X_L2_CID_COUNT(sc), ILT_PAGE_CIDS))
H A Dbnx2x.c2341 line += DIV_ROUND_UP(sc->qm_cid_count * QM_QUEUES_PER_FUNC * 4, in bnx2x_ilt_set_info()
/dpdk/drivers/net/ena/base/
H A Dena_eth_com.h142 num_entries_needed += DIV_ROUND_UP(descs_after_first_entry, in ena_com_is_doorbell_needed()
H A Dena_plat_dpdk.h300 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) macro
/dpdk/drivers/net/qede/
H A Dqede_debug.c333 #define CEIL_DWORDS(size) DIV_ROUND_UP(size, 32)
3060 for (i = 0; i < DIV_ROUND_UP(ram_size, BRB_REG_BIG_RAM_DATA_SIZE); in qed_grc_dump_big_ram()
4161 DIV_ROUND_UP(trace_data_size_bytes + sizeof(struct mcp_trace), in qed_mcp_trace_dump()
4817 valid_conn_pf_pages = DIV_ROUND_UP(valid_conn_pf_cids, in qed_ilt_dump()
4819 valid_conn_vf_pages = DIV_ROUND_UP(valid_conn_vf_cids, in qed_ilt_dump()
/dpdk/drivers/net/i40e/
H A Di40e_rxtx.c1067 count += DIV_ROUND_UP(txd->data_len, I40E_MAX_DATA_PER_TXD); in i40e_calc_pkt_desc()
/dpdk/drivers/net/ice/
H A Dice_rxtx.c2712 count += DIV_ROUND_UP(txd->data_len, ICE_MAX_DATA_PER_TXD); in ice_calc_pkt_desc()