Searched refs:CHELSIO_T5 (Results 1 – 7 of 7) sorted by relevance
23 #define CHELSIO_T5 0x5 macro36 T5_A0 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0),37 T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 1),53 return (CHELSIO_CHIP_VERSION(chip) == CHELSIO_T5); in is_t5()
96 if (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5) in t4vf_wr_mbox_core()317 case CHELSIO_T5: in t4vf_prep_adapter()318 adapter->params.chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, in t4vf_prep_adapter()476 return (CHELSIO_CHIP_VERSION(adapter->params.chip) <= CHELSIO_T5 ? in t4vf_get_pf_from_vf()
535 case CHELSIO_T5: in t4_get_regs_len()1902 case CHELSIO_T5: in t4_get_regs()2184 if ((CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) && in t4_write_rss_key()2967 case CHELSIO_T5: in t4_get_mps_bg_map()3009 case CHELSIO_T5: in t4_get_tp_ch_map()3077 if (CHELSIO_CHIP_VERSION(adap->params.chip) >= CHELSIO_T5) { in t4_get_port_stats()3114 if (CHELSIO_CHIP_VERSION(adap->params.chip) >= CHELSIO_T5) { in t4_get_port_stats()4916 case CHELSIO_T5: in t4_get_chip_type()4917 chip |= CHELSIO_CHIP_CODE(CHELSIO_T5, pl_rev); in t4_get_chip_type()4959 case CHELSIO_T5: in t4_prep_adapter()[all …]
43 if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) { in write_smt_entry()
703 if (CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5) in hwcsum()1190 if (CHELSIO_CHIP_VERSION(adap->params.chip) <= CHELSIO_T5) in t4_eth_xmit()1861 htons(V_FW_IQ_CMD_FL0FBMIN(chip_ver <= CHELSIO_T5 ? in t4_sge_alloc_rxq()1864 V_FW_IQ_CMD_FL0FBMAX(chip_ver <= CHELSIO_T5 ? in t4_sge_alloc_rxq()2529 case CHELSIO_T5: in t4vf_sge_init()
26 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) { in cxgbe_init_hash_filter()1096 if (chip_ver > CHELSIO_T5 && f->fs.type && in cxgbe_set_filter()
1505 if (CHELSIO_CHIP_VERSION(adap->params.chip) > CHELSIO_T5) { in adap_init0()2084 func = CHELSIO_CHIP_VERSION(chip) <= CHELSIO_T5 ? in cxgbe_probe()