1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2019-2021 Broadcom 3 * All rights reserved. 4 */ 5 6 #ifndef _HCAPI_CFA_P4_H_ 7 #define _HCAPI_CFA_P4_H_ 8 9 /** CFA phase 4 fix formatted table(layout) ID definition 10 * 11 */ 12 enum cfa_p4_tbl_id { 13 CFA_P4_TBL_L2CTXT_TCAM = 0, 14 CFA_P4_TBL_L2CTXT_REMAP, 15 CFA_P4_TBL_PROF_TCAM, 16 CFA_P4_TBL_PROF_TCAM_REMAP, 17 CFA_P4_TBL_WC_TCAM, 18 CFA_P4_TBL_WC_TCAM_REC, 19 CFA_P4_TBL_WC_TCAM_REMAP, 20 CFA_P4_TBL_VEB_TCAM, 21 CFA_P4_TBL_SP_TCAM, 22 CFA_P4_TBL_PROF_SPIF_DFLT_L2CTXT, 23 CFA_P4_TBL_PROF_PARIF_DFLT_ACT_REC_PTR, 24 CFA_P4_TBL_PROF_PARIF_ERR_ACT_REC_PTR, 25 CFA_P4_TBL_LKUP_PARIF_DFLT_ACT_REC_PTR, 26 CFA_P4_TBL_MAX 27 }; 28 29 #define CFA_P4_PROF_MAX_KEYS 4 30 enum cfa_p4_mac_sel_mode { 31 CFA_P4_MAC_SEL_MODE_FIRST = 0, 32 CFA_P4_MAC_SEL_MODE_LOWEST = 1, 33 }; 34 35 struct cfa_p4_prof_key_cfg { 36 uint8_t mac_sel[CFA_P4_PROF_MAX_KEYS]; 37 #define CFA_P4_PROF_MAC_SEL_DMAC0 (1 << 0) 38 #define CFA_P4_PROF_MAC_SEL_T_MAC0 (1 << 1) 39 #define CFA_P4_PROF_MAC_SEL_OUTERMOST_MAC0 (1 << 2) 40 #define CFA_P4_PROF_MAC_SEL_DMAC1 (1 << 3) 41 #define CFA_P4_PROF_MAC_SEL_T_MAC1 (1 << 4) 42 #define CFA_P4_PROF_MAC_OUTERMOST_MAC1 (1 << 5) 43 uint8_t pass_cnt; 44 enum cfa_p4_mac_sel_mode mode; 45 }; 46 47 /** 48 * Enumeration of SRAM entry types, used for allocation of 49 * fixed SRAM entities. The memory model for CFA HCAPI 50 * determines if an SRAM entry type is supported. 51 */ 52 enum cfa_p4_action_sram_entry_type { 53 /* NOTE: Any additions to this enum must be reflected on FW 54 * side as well. 55 */ 56 57 /** SRAM Action Record */ 58 CFA_P4_ACTION_SRAM_ENTRY_TYPE_FULL_ACTION, 59 60 CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_0_ACTION, 61 CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_1_ACTION, 62 CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_2_ACTION, 63 CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_3_ACTION, 64 CFA_P4_ACTION_SRAM_ENTRY_TYPE_FORMAT_4_ACTION, 65 66 /** SRAM Action Encap 8 Bytes */ 67 CFA_P4_ACTION_SRAM_ENTRY_TYPE_ENCAP_8B, 68 /** SRAM Action Encap 16 Bytes */ 69 CFA_P4_ACTION_SRAM_ENTRY_TYPE_ENCAP_16B, 70 /** SRAM Action Encap 64 Bytes */ 71 CFA_P4_ACTION_SRAM_ENTRY_TYPE_ENCAP_64B, 72 73 CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_PORT_SRC, 74 CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_PORT_DEST, 75 76 /** SRAM Action Modify IPv4 Source */ 77 CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_SRC, 78 /** SRAM Action Modify IPv4 Destination */ 79 CFA_P4_ACTION_SRAM_ENTRY_TYPE_MODIFY_IPV4_DEST, 80 81 /** SRAM Action Source Properties SMAC */ 82 CFA_P4_ACTION_SRAM_ENTRY_TYPE_SP_SMAC, 83 /** SRAM Action Source Properties SMAC IPv4 */ 84 CFA_P4_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV4, 85 /** SRAM Action Source Properties SMAC IPv6 */ 86 CFA_P4_ACTION_SRAM_ENTRY_TYPE_SP_SMAC_IPV6, 87 /** SRAM Action Statistics 64 Bits */ 88 CFA_P4_ACTION_SRAM_ENTRY_TYPE_STATS_64, 89 CFA_P4_ACTION_SRAM_ENTRY_TYPE_MAX 90 }; 91 92 /** 93 * SRAM Action Record structure holding either an action index or an 94 * action ptr. 95 */ 96 union cfa_p4_action_sram_act_record { 97 /** SRAM Action idx specifies the offset of the SRAM 98 * element within its SRAM Entry Type block. This 99 * index can be written into i.e. an L2 Context. Use 100 * this type for all SRAM Action Record types except 101 * SRAM Full Action records. Use act_ptr instead. 102 */ 103 uint16_t act_idx; 104 /** SRAM Full Action is special in that it needs an 105 * action record pointer. This pointer can be written 106 * into i.e. a Wildcard TCAM entry. 107 */ 108 uint32_t act_ptr; 109 }; 110 111 /** 112 * cfa_p4_action_param parameter definition 113 */ 114 struct cfa_p4_action_param { 115 /** 116 * [in] receive or transmit direction 117 */ 118 uint8_t dir; 119 /** 120 * [in] type of the sram allocation type 121 */ 122 enum cfa_p4_action_sram_entry_type type; 123 /** 124 * [in] action record to set. The 'type' specified lists the 125 * record definition to use in the passed in record. 126 */ 127 union cfa_p4_action_sram_act_record record; 128 /** 129 * [in] number of elements in act_data 130 */ 131 uint32_t act_size; 132 /** 133 * [in] ptr to array of action data 134 */ 135 uint64_t *act_data; 136 }; 137 138 /** 139 * EEM Key entry sizes 140 */ 141 #define CFA_P4_EEM_KEY_MAX_SIZE 52 142 #define CFA_P4_EEM_KEY_RECORD_SIZE 64 143 144 /** 145 * cfa_eem_entry_hdr 146 */ 147 struct cfa_p4_eem_entry_hdr { 148 uint32_t pointer; 149 uint32_t word1; /* 150 * The header is made up of two words, 151 * this is the first word. This field has multiple 152 * subfields, there is no suitable single name for 153 * it so just going with word1. 154 */ 155 #define CFA_P4_EEM_ENTRY_VALID_SHIFT 31 156 #define CFA_P4_EEM_ENTRY_VALID_MASK 0x80000000 157 #define CFA_P4_EEM_ENTRY_L1_CACHEABLE_SHIFT 30 158 #define CFA_P4_EEM_ENTRY_L1_CACHEABLE_MASK 0x40000000 159 #define CFA_P4_EEM_ENTRY_STRENGTH_SHIFT 28 160 #define CFA_P4_EEM_ENTRY_STRENGTH_MASK 0x30000000 161 #define CFA_P4_EEM_ENTRY_RESERVED_SHIFT 17 162 #define CFA_P4_EEM_ENTRY_RESERVED_MASK 0x0FFE0000 163 #define CFA_P4_EEM_ENTRY_KEY_SIZE_SHIFT 8 164 #define CFA_P4_EEM_ENTRY_KEY_SIZE_MASK 0x0001FF00 165 #define CFA_P4_EEM_ENTRY_ACT_REC_SIZE_SHIFT 3 166 #define CFA_P4_EEM_ENTRY_ACT_REC_SIZE_MASK 0x000000F8 167 #define CFA_P4_EEM_ENTRY_ACT_REC_INT_SHIFT 2 168 #define CFA_P4_EEM_ENTRY_ACT_REC_INT_MASK 0x00000004 169 #define CFA_P4_EEM_ENTRY_EXT_FLOW_CTR_SHIFT 1 170 #define CFA_P4_EEM_ENTRY_EXT_FLOW_CTR_MASK 0x00000002 171 #define CFA_P4_EEM_ENTRY_ACT_PTR_MSB_SHIFT 0 172 #define CFA_P4_EEM_ENTRY_ACT_PTR_MSB_MASK 0x00000001 173 }; 174 175 /** 176 * cfa_p4_eem_key_entry 177 */ 178 struct cfa_p4_eem_64b_entry { 179 /** Key is 448 bits - 56 bytes */ 180 uint8_t key[CFA_P4_EEM_KEY_RECORD_SIZE - sizeof(struct cfa_p4_eem_entry_hdr)]; 181 /** Header is 8 bytes long */ 182 struct cfa_p4_eem_entry_hdr hdr; 183 }; 184 185 #endif /* _CFA_HW_P4_H_ */ 186