1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2014-2020 Broadcom 3 * All rights reserved. 4 */ 5 6 #include "ulp_template_db_enum.h" 7 #include "ulp_template_db_field.h" 8 #include "ulp_template_struct.h" 9 #include "ulp_rte_parser.h" 10 #include "ulp_template_db_tbl.h" 11 12 uint32_t ulp_act_prop_map_table[] = { 13 [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] = 14 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN_SZ, 15 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SZ] = 16 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SZ, 17 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_SZ] = 18 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_SZ, 19 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_TYPE] = 20 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_TYPE, 21 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG_NUM] = 22 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG_NUM, 23 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L3_TYPE] = 24 BNXT_ULP_ACT_PROP_SZ_ENCAP_L3_TYPE, 25 [BNXT_ULP_ACT_PROP_IDX_MPLS_POP_NUM] = 26 BNXT_ULP_ACT_PROP_SZ_MPLS_POP_NUM, 27 [BNXT_ULP_ACT_PROP_IDX_MPLS_PUSH_NUM] = 28 BNXT_ULP_ACT_PROP_SZ_MPLS_PUSH_NUM, 29 [BNXT_ULP_ACT_PROP_IDX_PORT_ID] = 30 BNXT_ULP_ACT_PROP_SZ_PORT_ID, 31 [BNXT_ULP_ACT_PROP_IDX_VNIC] = 32 BNXT_ULP_ACT_PROP_SZ_VNIC, 33 [BNXT_ULP_ACT_PROP_IDX_VPORT] = 34 BNXT_ULP_ACT_PROP_SZ_VPORT, 35 [BNXT_ULP_ACT_PROP_IDX_MARK] = 36 BNXT_ULP_ACT_PROP_SZ_MARK, 37 [BNXT_ULP_ACT_PROP_IDX_COUNT] = 38 BNXT_ULP_ACT_PROP_SZ_COUNT, 39 [BNXT_ULP_ACT_PROP_IDX_METER] = 40 BNXT_ULP_ACT_PROP_SZ_METER, 41 [BNXT_ULP_ACT_PROP_IDX_SET_MAC_SRC] = 42 BNXT_ULP_ACT_PROP_SZ_SET_MAC_SRC, 43 [BNXT_ULP_ACT_PROP_IDX_SET_MAC_DST] = 44 BNXT_ULP_ACT_PROP_SZ_SET_MAC_DST, 45 [BNXT_ULP_ACT_PROP_IDX_PUSH_VLAN] = 46 BNXT_ULP_ACT_PROP_SZ_PUSH_VLAN, 47 [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_PCP] = 48 BNXT_ULP_ACT_PROP_SZ_SET_VLAN_PCP, 49 [BNXT_ULP_ACT_PROP_IDX_SET_VLAN_VID] = 50 BNXT_ULP_ACT_PROP_SZ_SET_VLAN_VID, 51 [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_SRC] = 52 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_SRC, 53 [BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST] = 54 BNXT_ULP_ACT_PROP_SZ_SET_IPV4_DST, 55 [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_SRC] = 56 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_SRC, 57 [BNXT_ULP_ACT_PROP_IDX_SET_IPV6_DST] = 58 BNXT_ULP_ACT_PROP_SZ_SET_IPV6_DST, 59 [BNXT_ULP_ACT_PROP_IDX_SET_TP_SRC] = 60 BNXT_ULP_ACT_PROP_SZ_SET_TP_SRC, 61 [BNXT_ULP_ACT_PROP_IDX_SET_TP_DST] = 62 BNXT_ULP_ACT_PROP_SZ_SET_TP_DST, 63 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_0] = 64 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_0, 65 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_1] = 66 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_1, 67 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_2] = 68 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_2, 69 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_3] = 70 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_3, 71 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_4] = 72 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_4, 73 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_5] = 74 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_5, 75 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_6] = 76 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_6, 77 [BNXT_ULP_ACT_PROP_IDX_OF_PUSH_MPLS_7] = 78 BNXT_ULP_ACT_PROP_SZ_OF_PUSH_MPLS_7, 79 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_DMAC] = 80 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_DMAC, 81 [BNXT_ULP_ACT_PROP_IDX_ENCAP_L2_SMAC] = 82 BNXT_ULP_ACT_PROP_SZ_ENCAP_L2_SMAC, 83 [BNXT_ULP_ACT_PROP_IDX_ENCAP_VTAG] = 84 BNXT_ULP_ACT_PROP_SZ_ENCAP_VTAG, 85 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP] = 86 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP, 87 [BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC] = 88 BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC, 89 [BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP] = 90 BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP, 91 [BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] = 92 BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN, 93 [BNXT_ULP_ACT_PROP_IDX_JUMP] = 94 BNXT_ULP_ACT_PROP_SZ_JUMP, 95 [BNXT_ULP_ACT_PROP_IDX_LAST] = 96 BNXT_ULP_ACT_PROP_SZ_LAST 97 }; 98 99 struct bnxt_ulp_rte_act_info ulp_act_info[] = { 100 [RTE_FLOW_ACTION_TYPE_END] = { 101 .act_type = BNXT_ULP_ACT_TYPE_END, 102 .proto_act_func = NULL 103 }, 104 [RTE_FLOW_ACTION_TYPE_VOID] = { 105 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 106 .proto_act_func = ulp_rte_void_act_handler 107 }, 108 [RTE_FLOW_ACTION_TYPE_PASSTHRU] = { 109 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 110 .proto_act_func = NULL 111 }, 112 [RTE_FLOW_ACTION_TYPE_JUMP] = { 113 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 114 .proto_act_func = ulp_rte_jump_act_handler 115 }, 116 [RTE_FLOW_ACTION_TYPE_MARK] = { 117 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 118 .proto_act_func = ulp_rte_mark_act_handler 119 }, 120 [RTE_FLOW_ACTION_TYPE_FLAG] = { 121 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 122 .proto_act_func = NULL 123 }, 124 [RTE_FLOW_ACTION_TYPE_QUEUE] = { 125 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 126 .proto_act_func = NULL 127 }, 128 [RTE_FLOW_ACTION_TYPE_DROP] = { 129 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 130 .proto_act_func = ulp_rte_drop_act_handler 131 }, 132 [RTE_FLOW_ACTION_TYPE_COUNT] = { 133 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 134 .proto_act_func = ulp_rte_count_act_handler 135 }, 136 [RTE_FLOW_ACTION_TYPE_RSS] = { 137 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 138 .proto_act_func = ulp_rte_rss_act_handler 139 }, 140 [RTE_FLOW_ACTION_TYPE_PF] = { 141 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 142 .proto_act_func = ulp_rte_pf_act_handler 143 }, 144 [RTE_FLOW_ACTION_TYPE_VF] = { 145 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 146 .proto_act_func = ulp_rte_vf_act_handler 147 }, 148 [RTE_FLOW_ACTION_TYPE_PHY_PORT] = { 149 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 150 .proto_act_func = ulp_rte_phy_port_act_handler 151 }, 152 [RTE_FLOW_ACTION_TYPE_PORT_ID] = { 153 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 154 .proto_act_func = ulp_rte_port_id_act_handler 155 }, 156 [RTE_FLOW_ACTION_TYPE_METER] = { 157 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 158 .proto_act_func = NULL 159 }, 160 [RTE_FLOW_ACTION_TYPE_SECURITY] = { 161 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 162 .proto_act_func = NULL 163 }, 164 [RTE_FLOW_ACTION_TYPE_OF_SET_MPLS_TTL] = { 165 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 166 .proto_act_func = NULL 167 }, 168 [RTE_FLOW_ACTION_TYPE_OF_DEC_MPLS_TTL] = { 169 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 170 .proto_act_func = NULL 171 }, 172 [RTE_FLOW_ACTION_TYPE_OF_SET_NW_TTL] = { 173 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 174 .proto_act_func = NULL 175 }, 176 [RTE_FLOW_ACTION_TYPE_OF_DEC_NW_TTL] = { 177 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 178 .proto_act_func = NULL 179 }, 180 [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_OUT] = { 181 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 182 .proto_act_func = NULL 183 }, 184 [RTE_FLOW_ACTION_TYPE_OF_COPY_TTL_IN] = { 185 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 186 .proto_act_func = NULL 187 }, 188 [RTE_FLOW_ACTION_TYPE_OF_POP_VLAN] = { 189 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 190 .proto_act_func = ulp_rte_of_pop_vlan_act_handler 191 }, 192 [RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN] = { 193 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 194 .proto_act_func = ulp_rte_of_push_vlan_act_handler 195 }, 196 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID] = { 197 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 198 .proto_act_func = ulp_rte_of_set_vlan_vid_act_handler 199 }, 200 [RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP] = { 201 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 202 .proto_act_func = ulp_rte_of_set_vlan_pcp_act_handler 203 }, 204 [RTE_FLOW_ACTION_TYPE_OF_POP_MPLS] = { 205 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 206 .proto_act_func = NULL 207 }, 208 [RTE_FLOW_ACTION_TYPE_OF_PUSH_MPLS] = { 209 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 210 .proto_act_func = NULL 211 }, 212 [RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP] = { 213 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 214 .proto_act_func = ulp_rte_vxlan_encap_act_handler 215 }, 216 [RTE_FLOW_ACTION_TYPE_VXLAN_DECAP] = { 217 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 218 .proto_act_func = ulp_rte_vxlan_decap_act_handler 219 }, 220 [RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP] = { 221 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 222 .proto_act_func = NULL 223 }, 224 [RTE_FLOW_ACTION_TYPE_NVGRE_DECAP] = { 225 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 226 .proto_act_func = NULL 227 }, 228 [RTE_FLOW_ACTION_TYPE_RAW_ENCAP] = { 229 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 230 .proto_act_func = NULL 231 }, 232 [RTE_FLOW_ACTION_TYPE_RAW_DECAP] = { 233 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 234 .proto_act_func = NULL 235 }, 236 [RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC] = { 237 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 238 .proto_act_func = ulp_rte_set_ipv4_src_act_handler 239 }, 240 [RTE_FLOW_ACTION_TYPE_SET_IPV4_DST] = { 241 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 242 .proto_act_func = ulp_rte_set_ipv4_dst_act_handler 243 }, 244 [RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC] = { 245 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 246 .proto_act_func = NULL 247 }, 248 [RTE_FLOW_ACTION_TYPE_SET_IPV6_DST] = { 249 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 250 .proto_act_func = NULL 251 }, 252 [RTE_FLOW_ACTION_TYPE_SET_TP_SRC] = { 253 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 254 .proto_act_func = ulp_rte_set_tp_src_act_handler 255 }, 256 [RTE_FLOW_ACTION_TYPE_SET_TP_DST] = { 257 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 258 .proto_act_func = ulp_rte_set_tp_dst_act_handler 259 }, 260 [RTE_FLOW_ACTION_TYPE_MAC_SWAP] = { 261 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 262 .proto_act_func = NULL 263 }, 264 [RTE_FLOW_ACTION_TYPE_DEC_TTL] = { 265 .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED, 266 .proto_act_func = ulp_rte_dec_ttl_act_handler 267 }, 268 [RTE_FLOW_ACTION_TYPE_SET_TTL] = { 269 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 270 .proto_act_func = NULL 271 }, 272 [RTE_FLOW_ACTION_TYPE_SET_MAC_SRC] = { 273 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 274 .proto_act_func = NULL 275 }, 276 [RTE_FLOW_ACTION_TYPE_SET_MAC_DST] = { 277 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 278 .proto_act_func = NULL 279 }, 280 [RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ] = { 281 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 282 .proto_act_func = NULL 283 }, 284 [RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ] = { 285 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 286 .proto_act_func = NULL 287 }, 288 [RTE_FLOW_ACTION_TYPE_INC_TCP_ACK] = { 289 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 290 .proto_act_func = NULL 291 }, 292 [RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK] = { 293 .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED, 294 .proto_act_func = NULL 295 } 296 }; 297 298 struct bnxt_ulp_cache_tbl_params ulp_cache_tbl_params[] = { 299 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 | 300 TF_DIR_RX] = { 301 .num_entries = 16384 302 }, 303 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM << 1 | 304 TF_DIR_TX] = { 305 .num_entries = 16384 306 }, 307 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 | 308 TF_DIR_RX] = { 309 .num_entries = 16384 310 }, 311 [BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM << 1 | 312 TF_DIR_TX] = { 313 .num_entries = 16384 314 } 315 }; 316 317 const struct ulp_template_device_tbls ulp_template_stingray_tbls[] = { 318 [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { 319 .tmpl_list = ulp_stingray_class_tmpl_list, 320 .tbl_list = ulp_stingray_class_tbl_list, 321 .key_field_list = ulp_stingray_class_key_field_list, 322 .result_field_list = ulp_stingray_class_result_field_list, 323 .ident_list = ulp_stingray_class_ident_list 324 }, 325 [BNXT_ULP_TEMPLATE_TYPE_ACTION] = { 326 .tmpl_list = ulp_stingray_act_tmpl_list, 327 .tbl_list = ulp_stingray_act_tbl_list, 328 .result_field_list = ulp_stingray_act_result_field_list 329 } 330 }; 331 332 const struct ulp_template_device_tbls ulp_template_wh_plus_tbls[] = { 333 [BNXT_ULP_TEMPLATE_TYPE_CLASS] = { 334 .tmpl_list = ulp_wh_plus_class_tmpl_list, 335 .tbl_list = ulp_wh_plus_class_tbl_list, 336 .key_field_list = ulp_wh_plus_class_key_field_list, 337 .result_field_list = ulp_wh_plus_class_result_field_list, 338 .ident_list = ulp_wh_plus_class_ident_list 339 }, 340 [BNXT_ULP_TEMPLATE_TYPE_ACTION] = { 341 .tmpl_list = ulp_wh_plus_act_tmpl_list, 342 .tbl_list = ulp_wh_plus_act_tbl_list, 343 .result_field_list = ulp_wh_plus_act_result_field_list 344 } 345 }; 346 347 struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = { 348 [BNXT_ULP_DEVICE_ID_WH_PLUS] = { 349 .byte_order = BNXT_ULP_BYTE_ORDER_LE, 350 .encap_byte_swap = 1, 351 .int_flow_db_num_entries = 16384, 352 .ext_flow_db_num_entries = 32768, 353 .mark_db_lfid_entries = 65536, 354 .mark_db_gfid_entries = 65536, 355 .flow_count_db_entries = 16384, 356 .fdb_parent_flow_entries = 2, 357 .num_resources_per_flow = 8, 358 .num_phy_ports = 2, 359 .ext_cntr_table_type = 0, 360 .byte_count_mask = 0x0000000fffffffff, 361 .packet_count_mask = 0xffffffff00000000, 362 .byte_count_shift = 0, 363 .packet_count_shift = 36, 364 .dev_tbls = ulp_template_wh_plus_tbls 365 }, 366 [BNXT_ULP_DEVICE_ID_STINGRAY] = { 367 .byte_order = BNXT_ULP_BYTE_ORDER_LE, 368 .encap_byte_swap = 1, 369 .int_flow_db_num_entries = 16384, 370 .ext_flow_db_num_entries = 32768, 371 .mark_db_lfid_entries = 65536, 372 .mark_db_gfid_entries = 65536, 373 .flow_count_db_entries = 16384, 374 .fdb_parent_flow_entries = 2, 375 .num_resources_per_flow = 8, 376 .num_phy_ports = 2, 377 .ext_cntr_table_type = 0, 378 .byte_count_mask = 0x0000000fffffffff, 379 .packet_count_mask = 0xffffffff00000000, 380 .byte_count_shift = 0, 381 .packet_count_shift = 36, 382 .dev_tbls = ulp_template_stingray_tbls 383 } 384 }; 385 386 struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = { 387 [0] = { 388 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, 389 .resource_type = TF_IDENT_TYPE_PROF_FUNC, 390 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID, 391 .direction = TF_DIR_RX 392 }, 393 [1] = { 394 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, 395 .resource_type = TF_IDENT_TYPE_PROF_FUNC, 396 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_PROF_FUNC_ID, 397 .direction = TF_DIR_TX 398 }, 399 [2] = { 400 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 401 .resource_type = TF_TBL_TYPE_FULL_ACT_RECORD, 402 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_GLB_LB_AREC_PTR, 403 .direction = TF_DIR_TX 404 }, 405 [3] = { 406 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, 407 .resource_type = TF_IDENT_TYPE_PROF_FUNC, 408 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID, 409 .direction = TF_DIR_RX 410 }, 411 [4] = { 412 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, 413 .resource_type = TF_IDENT_TYPE_PROF_FUNC, 414 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID, 415 .direction = TF_DIR_TX 416 }, 417 [5] = { 418 .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER, 419 .resource_type = TF_IDENT_TYPE_PROF_FUNC, 420 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID, 421 .direction = TF_DIR_RX 422 }, 423 [6] = { 424 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 425 .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, 426 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR, 427 .direction = TF_DIR_RX 428 }, 429 [7] = { 430 .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, 431 .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, 432 .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR, 433 .direction = TF_DIR_TX 434 } 435 }; 436 437 struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = { 438 [RTE_FLOW_ITEM_TYPE_END] = { 439 .hdr_type = BNXT_ULP_HDR_TYPE_END, 440 .proto_hdr_func = NULL 441 }, 442 [RTE_FLOW_ITEM_TYPE_VOID] = { 443 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 444 .proto_hdr_func = ulp_rte_void_hdr_handler 445 }, 446 [RTE_FLOW_ITEM_TYPE_INVERT] = { 447 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 448 .proto_hdr_func = NULL 449 }, 450 [RTE_FLOW_ITEM_TYPE_ANY] = { 451 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 452 .proto_hdr_func = NULL 453 }, 454 [RTE_FLOW_ITEM_TYPE_PF] = { 455 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 456 .proto_hdr_func = ulp_rte_pf_hdr_handler 457 }, 458 [RTE_FLOW_ITEM_TYPE_VF] = { 459 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 460 .proto_hdr_func = ulp_rte_vf_hdr_handler 461 }, 462 [RTE_FLOW_ITEM_TYPE_PHY_PORT] = { 463 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 464 .proto_hdr_func = ulp_rte_phy_port_hdr_handler 465 }, 466 [RTE_FLOW_ITEM_TYPE_PORT_ID] = { 467 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 468 .proto_hdr_func = ulp_rte_port_id_hdr_handler 469 }, 470 [RTE_FLOW_ITEM_TYPE_RAW] = { 471 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 472 .proto_hdr_func = NULL 473 }, 474 [RTE_FLOW_ITEM_TYPE_ETH] = { 475 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 476 .proto_hdr_func = ulp_rte_eth_hdr_handler 477 }, 478 [RTE_FLOW_ITEM_TYPE_VLAN] = { 479 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 480 .proto_hdr_func = ulp_rte_vlan_hdr_handler 481 }, 482 [RTE_FLOW_ITEM_TYPE_IPV4] = { 483 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 484 .proto_hdr_func = ulp_rte_ipv4_hdr_handler 485 }, 486 [RTE_FLOW_ITEM_TYPE_IPV6] = { 487 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 488 .proto_hdr_func = ulp_rte_ipv6_hdr_handler 489 }, 490 [RTE_FLOW_ITEM_TYPE_ICMP] = { 491 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 492 .proto_hdr_func = NULL 493 }, 494 [RTE_FLOW_ITEM_TYPE_UDP] = { 495 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 496 .proto_hdr_func = ulp_rte_udp_hdr_handler 497 }, 498 [RTE_FLOW_ITEM_TYPE_TCP] = { 499 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 500 .proto_hdr_func = ulp_rte_tcp_hdr_handler 501 }, 502 [RTE_FLOW_ITEM_TYPE_SCTP] = { 503 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 504 .proto_hdr_func = NULL 505 }, 506 [RTE_FLOW_ITEM_TYPE_VXLAN] = { 507 .hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED, 508 .proto_hdr_func = ulp_rte_vxlan_hdr_handler 509 }, 510 [RTE_FLOW_ITEM_TYPE_E_TAG] = { 511 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 512 .proto_hdr_func = NULL 513 }, 514 [RTE_FLOW_ITEM_TYPE_NVGRE] = { 515 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 516 .proto_hdr_func = NULL 517 }, 518 [RTE_FLOW_ITEM_TYPE_MPLS] = { 519 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 520 .proto_hdr_func = NULL 521 }, 522 [RTE_FLOW_ITEM_TYPE_GRE] = { 523 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 524 .proto_hdr_func = NULL 525 }, 526 [RTE_FLOW_ITEM_TYPE_FUZZY] = { 527 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 528 .proto_hdr_func = NULL 529 }, 530 [RTE_FLOW_ITEM_TYPE_GTP] = { 531 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 532 .proto_hdr_func = NULL 533 }, 534 [RTE_FLOW_ITEM_TYPE_GTPC] = { 535 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 536 .proto_hdr_func = NULL 537 }, 538 [RTE_FLOW_ITEM_TYPE_GTPU] = { 539 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 540 .proto_hdr_func = NULL 541 }, 542 [RTE_FLOW_ITEM_TYPE_ESP] = { 543 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 544 .proto_hdr_func = NULL 545 }, 546 [RTE_FLOW_ITEM_TYPE_GENEVE] = { 547 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 548 .proto_hdr_func = NULL 549 }, 550 [RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = { 551 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 552 .proto_hdr_func = NULL 553 }, 554 [RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = { 555 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 556 .proto_hdr_func = NULL 557 }, 558 [RTE_FLOW_ITEM_TYPE_IPV6_EXT] = { 559 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 560 .proto_hdr_func = NULL 561 }, 562 [RTE_FLOW_ITEM_TYPE_ICMP6] = { 563 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 564 .proto_hdr_func = NULL 565 }, 566 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = { 567 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 568 .proto_hdr_func = NULL 569 }, 570 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = { 571 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 572 .proto_hdr_func = NULL 573 }, 574 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = { 575 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 576 .proto_hdr_func = NULL 577 }, 578 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = { 579 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 580 .proto_hdr_func = NULL 581 }, 582 [RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = { 583 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 584 .proto_hdr_func = NULL 585 }, 586 [RTE_FLOW_ITEM_TYPE_MARK] = { 587 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 588 .proto_hdr_func = NULL 589 }, 590 [RTE_FLOW_ITEM_TYPE_META] = { 591 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 592 .proto_hdr_func = NULL 593 }, 594 [RTE_FLOW_ITEM_TYPE_GRE_KEY] = { 595 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 596 .proto_hdr_func = NULL 597 }, 598 [RTE_FLOW_ITEM_TYPE_GTP_PSC] = { 599 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 600 .proto_hdr_func = NULL 601 }, 602 [RTE_FLOW_ITEM_TYPE_PPPOES] = { 603 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 604 .proto_hdr_func = NULL 605 }, 606 [RTE_FLOW_ITEM_TYPE_PPPOED] = { 607 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 608 .proto_hdr_func = NULL 609 }, 610 [RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = { 611 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 612 .proto_hdr_func = NULL 613 }, 614 [RTE_FLOW_ITEM_TYPE_NSH] = { 615 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 616 .proto_hdr_func = NULL 617 }, 618 [RTE_FLOW_ITEM_TYPE_IGMP] = { 619 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 620 .proto_hdr_func = NULL 621 }, 622 [RTE_FLOW_ITEM_TYPE_AH] = { 623 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 624 .proto_hdr_func = NULL 625 }, 626 [RTE_FLOW_ITEM_TYPE_HIGIG2] = { 627 .hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED, 628 .proto_hdr_func = NULL 629 } 630 }; 631 632 uint32_t bnxt_ulp_encap_vtag_map[] = { 633 BNXT_ULP_SYM_ECV_VTAG_TYPE_NOP, 634 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_1_ENCAP_PRI, 635 BNXT_ULP_SYM_ECV_VTAG_TYPE_ADD_2_ENCAP_PRI 636 }; 637 638 uint32_t ulp_glb_template_tbl[] = { 639 BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC 640 }; 641 642