1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Samsung's S5PV210 SoC device tree source 4 * 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 6 * 7 * Mateusz Krawczuk <[email protected]> 8 * Tomasz Figa <[email protected]> 9 * 10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210 11 * based board files can include this file and provide values for board specfic 12 * bindings. 13 * 14 * Note: This file does not include device nodes for all the controllers in 15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional 16 * nodes can be added to this file. 17 */ 18 19#include <dt-bindings/clock/s5pv210.h> 20#include <dt-bindings/clock/s5pv210-audss.h> 21 22/ { 23 #address-cells = <1>; 24 #size-cells = <1>; 25 26 aliases { 27 csis0 = &csis0; 28 dmc0 = &dmc0; 29 dmc1 = &dmc1; 30 fimc0 = &fimc0; 31 fimc1 = &fimc1; 32 fimc2 = &fimc2; 33 i2c0 = &i2c0; 34 i2c1 = &i2c1; 35 i2c2 = &i2c2; 36 i2s0 = &i2s0; 37 i2s1 = &i2s1; 38 i2s2 = &i2s2; 39 pinctrl0 = &pinctrl0; 40 spi0 = &spi0; 41 spi1 = &spi1; 42 }; 43 44 cpus { 45 #address-cells = <1>; 46 #size-cells = <0>; 47 48 cpu@0 { 49 device_type = "cpu"; 50 compatible = "arm,cortex-a8"; 51 reg = <0>; 52 }; 53 }; 54 55 soc { 56 compatible = "simple-bus"; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 ranges; 60 61 external-clocks { 62 compatible = "simple-bus"; 63 #address-cells = <1>; 64 #size-cells = <0>; 65 66 xxti: oscillator@0 { 67 compatible = "fixed-clock"; 68 reg = <0>; 69 clock-frequency = <0>; 70 clock-output-names = "xxti"; 71 #clock-cells = <0>; 72 }; 73 74 xusbxti: oscillator@1 { 75 compatible = "fixed-clock"; 76 reg = <1>; 77 clock-frequency = <0>; 78 clock-output-names = "xusbxti"; 79 #clock-cells = <0>; 80 }; 81 }; 82 83 onenand: onenand@b0600000 { 84 compatible = "samsung,s5pv210-onenand"; 85 reg = <0xb0600000 0x2000>, 86 <0xb0000000 0x20000>, 87 <0xb0040000 0x20000>; 88 interrupt-parent = <&vic1>; 89 interrupts = <31>; 90 clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>; 91 clock-names = "bus", "onenand"; 92 #address-cells = <1>; 93 #size-cells = <1>; 94 status = "disabled"; 95 }; 96 97 chipid@e0000000 { 98 compatible = "samsung,s5pv210-chipid"; 99 reg = <0xe0000000 0x1000>; 100 }; 101 102 clocks: clock-controller@e0100000 { 103 compatible = "samsung,s5pv210-clock", "simple-bus"; 104 reg = <0xe0100000 0x10000>; 105 clock-names = "xxti", "xusbxti"; 106 clocks = <&xxti>, <&xusbxti>; 107 #clock-cells = <1>; 108 #address-cells = <1>; 109 #size-cells = <1>; 110 ranges; 111 112 pmu_syscon: syscon@e0108000 { 113 compatible = "samsung-s5pv210-pmu", "syscon"; 114 reg = <0xe0108000 0x8000>; 115 }; 116 }; 117 118 pinctrl0: pinctrl@e0200000 { 119 compatible = "samsung,s5pv210-pinctrl"; 120 reg = <0xe0200000 0x1000>; 121 interrupt-parent = <&vic0>; 122 interrupts = <30>; 123 124 wakeup-interrupt-controller { 125 compatible = "samsung,s5pv210-wakeup-eint"; 126 interrupts = <16>; 127 interrupt-parent = <&vic0>; 128 }; 129 }; 130 131 amba { 132 #address-cells = <1>; 133 #size-cells = <1>; 134 compatible = "simple-bus"; 135 ranges; 136 137 pdma0: dma@e0900000 { 138 compatible = "arm,pl330", "arm,primecell"; 139 reg = <0xe0900000 0x1000>; 140 interrupt-parent = <&vic0>; 141 interrupts = <19>; 142 clocks = <&clocks CLK_PDMA0>; 143 clock-names = "apb_pclk"; 144 #dma-cells = <1>; 145 #dma-channels = <8>; 146 #dma-requests = <32>; 147 }; 148 149 pdma1: dma@e0a00000 { 150 compatible = "arm,pl330", "arm,primecell"; 151 reg = <0xe0a00000 0x1000>; 152 interrupt-parent = <&vic0>; 153 interrupts = <20>; 154 clocks = <&clocks CLK_PDMA1>; 155 clock-names = "apb_pclk"; 156 #dma-cells = <1>; 157 #dma-channels = <8>; 158 #dma-requests = <32>; 159 }; 160 }; 161 162 adc: adc@e1700000 { 163 compatible = "samsung,s5pv210-adc"; 164 reg = <0xe1700000 0x1000>; 165 interrupt-parent = <&vic2>; 166 interrupts = <23>, <24>; 167 clocks = <&clocks CLK_TSADC>; 168 clock-names = "adc"; 169 #io-channel-cells = <1>; 170 io-channel-ranges; 171 status = "disabled"; 172 }; 173 174 spi0: spi@e1300000 { 175 compatible = "samsung,s5pv210-spi"; 176 reg = <0xe1300000 0x1000>; 177 interrupt-parent = <&vic1>; 178 interrupts = <15>; 179 dmas = <&pdma0 7>, <&pdma0 6>; 180 dma-names = "tx", "rx"; 181 clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>; 182 clock-names = "spi", "spi_busclk0"; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&spi0_bus>; 185 #address-cells = <1>; 186 #size-cells = <0>; 187 status = "disabled"; 188 }; 189 190 spi1: spi@e1400000 { 191 compatible = "samsung,s5pv210-spi"; 192 reg = <0xe1400000 0x1000>; 193 interrupt-parent = <&vic1>; 194 interrupts = <16>; 195 dmas = <&pdma1 7>, <&pdma1 6>; 196 dma-names = "tx", "rx"; 197 clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>; 198 clock-names = "spi", "spi_busclk0"; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&spi1_bus>; 201 #address-cells = <1>; 202 #size-cells = <0>; 203 status = "disabled"; 204 }; 205 206 keypad: keypad@e1600000 { 207 compatible = "samsung,s5pv210-keypad"; 208 reg = <0xe1600000 0x1000>; 209 interrupt-parent = <&vic2>; 210 interrupts = <25>; 211 clocks = <&clocks CLK_KEYIF>; 212 clock-names = "keypad"; 213 status = "disabled"; 214 }; 215 216 i2c0: i2c@e1800000 { 217 compatible = "samsung,s3c2440-i2c"; 218 reg = <0xe1800000 0x1000>; 219 interrupt-parent = <&vic1>; 220 interrupts = <14>; 221 clocks = <&clocks CLK_I2C0>; 222 clock-names = "i2c"; 223 pinctrl-names = "default"; 224 pinctrl-0 = <&i2c0_bus>; 225 #address-cells = <1>; 226 #size-cells = <0>; 227 status = "disabled"; 228 }; 229 230 i2c2: i2c@e1a00000 { 231 compatible = "samsung,s3c2440-i2c"; 232 reg = <0xe1a00000 0x1000>; 233 interrupt-parent = <&vic1>; 234 interrupts = <19>; 235 clocks = <&clocks CLK_I2C2>; 236 clock-names = "i2c"; 237 pinctrl-0 = <&i2c2_bus>; 238 pinctrl-names = "default"; 239 #address-cells = <1>; 240 #size-cells = <0>; 241 status = "disabled"; 242 }; 243 244 audio-subsystem { 245 compatible = "samsung,s5pv210-audss", "simple-bus"; 246 #address-cells = <1>; 247 #size-cells = <1>; 248 ranges; 249 250 clk_audss: clock-controller@eee10000 { 251 compatible = "samsung,s5pv210-audss-clock"; 252 reg = <0xeee10000 0x1000>; 253 clock-names = "hclk", "xxti", 254 "fout_epll", 255 "sclk_audio0"; 256 clocks = <&clocks DOUT_HCLKP>, <&xxti>, 257 <&clocks FOUT_EPLL>, 258 <&clocks SCLK_AUDIO0>; 259 #clock-cells = <1>; 260 }; 261 262 i2s0: i2s@eee30000 { 263 compatible = "samsung,s5pv210-i2s"; 264 reg = <0xeee30000 0x1000>; 265 interrupt-parent = <&vic2>; 266 interrupts = <16>; 267 dma-names = "rx", "tx", "tx-sec"; 268 dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>; 269 clock-names = "iis", 270 "i2s_opclk0", 271 "i2s_opclk1"; 272 clocks = <&clk_audss CLK_I2S>, 273 <&clk_audss CLK_I2S>, 274 <&clk_audss CLK_DOUT_AUD_BUS>; 275 samsung,idma-addr = <0xc0010000>; 276 pinctrl-names = "default"; 277 pinctrl-0 = <&i2s0_bus>; 278 #sound-dai-cells = <0>; 279 status = "disabled"; 280 }; 281 }; 282 283 i2s1: i2s@e2100000 { 284 compatible = "samsung,s3c6410-i2s"; 285 reg = <0xe2100000 0x1000>; 286 interrupt-parent = <&vic2>; 287 interrupts = <17>; 288 dma-names = "rx", "tx"; 289 dmas = <&pdma1 12>, <&pdma1 13>; 290 clock-names = "iis", "i2s_opclk0"; 291 clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>; 292 pinctrl-names = "default"; 293 pinctrl-0 = <&i2s1_bus>; 294 #sound-dai-cells = <0>; 295 status = "disabled"; 296 }; 297 298 i2s2: i2s@e2a00000 { 299 compatible = "samsung,s3c6410-i2s"; 300 reg = <0xe2a00000 0x1000>; 301 interrupt-parent = <&vic2>; 302 interrupts = <18>; 303 dma-names = "rx", "tx"; 304 dmas = <&pdma1 14>, <&pdma1 15>; 305 clock-names = "iis", "i2s_opclk0"; 306 clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>; 307 pinctrl-names = "default"; 308 pinctrl-0 = <&i2s2_bus>; 309 #sound-dai-cells = <0>; 310 status = "disabled"; 311 }; 312 313 pwm: pwm@e2500000 { 314 compatible = "samsung,s5pc100-pwm"; 315 reg = <0xe2500000 0x1000>; 316 interrupt-parent = <&vic0>; 317 interrupts = <21>, <22>, <23>, <24>, <25>; 318 clock-names = "timers"; 319 clocks = <&clocks CLK_PWM>; 320 #pwm-cells = <3>; 321 }; 322 323 watchdog: watchdog@e2700000 { 324 compatible = "samsung,s3c6410-wdt"; 325 reg = <0xe2700000 0x1000>; 326 interrupt-parent = <&vic0>; 327 interrupts = <26>; 328 clock-names = "watchdog"; 329 clocks = <&clocks CLK_WDT>; 330 }; 331 332 rtc: rtc@e2800000 { 333 compatible = "samsung,s3c6410-rtc"; 334 reg = <0xe2800000 0x100>; 335 interrupt-parent = <&vic0>; 336 interrupts = <28>, <29>; 337 clocks = <&clocks CLK_RTC>; 338 clock-names = "rtc"; 339 status = "disabled"; 340 }; 341 342 uart0: serial@e2900000 { 343 compatible = "samsung,s5pv210-uart"; 344 reg = <0xe2900000 0x400>; 345 interrupt-parent = <&vic1>; 346 interrupts = <10>; 347 clock-names = "uart", "clk_uart_baud0", 348 "clk_uart_baud1"; 349 clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>, 350 <&clocks SCLK_UART0>; 351 status = "disabled"; 352 }; 353 354 uart1: serial@e2900400 { 355 compatible = "samsung,s5pv210-uart"; 356 reg = <0xe2900400 0x400>; 357 interrupt-parent = <&vic1>; 358 interrupts = <11>; 359 clock-names = "uart", "clk_uart_baud0", 360 "clk_uart_baud1"; 361 clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>, 362 <&clocks SCLK_UART1>; 363 status = "disabled"; 364 }; 365 366 uart2: serial@e2900800 { 367 compatible = "samsung,s5pv210-uart"; 368 reg = <0xe2900800 0x400>; 369 interrupt-parent = <&vic1>; 370 interrupts = <12>; 371 clock-names = "uart", "clk_uart_baud0", 372 "clk_uart_baud1"; 373 clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>, 374 <&clocks SCLK_UART2>; 375 status = "disabled"; 376 }; 377 378 uart3: serial@e2900c00 { 379 compatible = "samsung,s5pv210-uart"; 380 reg = <0xe2900c00 0x400>; 381 interrupt-parent = <&vic1>; 382 interrupts = <13>; 383 clock-names = "uart", "clk_uart_baud0", 384 "clk_uart_baud1"; 385 clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>, 386 <&clocks SCLK_UART3>; 387 status = "disabled"; 388 }; 389 390 sdhci0: sdhci@eb000000 { 391 compatible = "samsung,s3c6410-sdhci"; 392 reg = <0xeb000000 0x100000>; 393 interrupt-parent = <&vic1>; 394 interrupts = <26>; 395 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 396 clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>, 397 <&clocks SCLK_MMC0>; 398 status = "disabled"; 399 }; 400 401 sdhci1: sdhci@eb100000 { 402 compatible = "samsung,s3c6410-sdhci"; 403 reg = <0xeb100000 0x100000>; 404 interrupt-parent = <&vic1>; 405 interrupts = <27>; 406 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 407 clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>, 408 <&clocks SCLK_MMC1>; 409 status = "disabled"; 410 }; 411 412 sdhci2: sdhci@eb200000 { 413 compatible = "samsung,s3c6410-sdhci"; 414 reg = <0xeb200000 0x100000>; 415 interrupt-parent = <&vic1>; 416 interrupts = <28>; 417 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2"; 418 clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>, 419 <&clocks SCLK_MMC2>; 420 status = "disabled"; 421 }; 422 423 sdhci3: sdhci@eb300000 { 424 compatible = "samsung,s3c6410-sdhci"; 425 reg = <0xeb300000 0x100000>; 426 interrupt-parent = <&vic3>; 427 interrupts = <2>; 428 clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3"; 429 clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>, 430 <&clocks SCLK_MMC3>; 431 status = "disabled"; 432 }; 433 434 hsotg: hsotg@ec000000 { 435 compatible = "samsung,s3c6400-hsotg"; 436 reg = <0xec000000 0x20000>; 437 interrupt-parent = <&vic1>; 438 interrupts = <24>; 439 clocks = <&clocks CLK_USB_OTG>; 440 clock-names = "otg"; 441 phy-names = "usb2-phy"; 442 phys = <&usbphy 0>; 443 status = "disabled"; 444 }; 445 446 usbphy: usbphy@ec100000 { 447 compatible = "samsung,s5pv210-usb2-phy"; 448 reg = <0xec100000 0x100>; 449 samsung,pmureg-phandle = <&pmu_syscon>; 450 clocks = <&clocks CLK_USB_OTG>, <&xusbxti>; 451 clock-names = "phy", "ref"; 452 #phy-cells = <1>; 453 status = "disabled"; 454 }; 455 456 ehci: ehci@ec200000 { 457 compatible = "samsung,exynos4210-ehci"; 458 reg = <0xec200000 0x100>; 459 interrupts = <23>; 460 interrupt-parent = <&vic1>; 461 clocks = <&clocks CLK_USB_HOST>; 462 clock-names = "usbhost"; 463 #address-cells = <1>; 464 #size-cells = <0>; 465 status = "disabled"; 466 467 port@0 { 468 reg = <0>; 469 phys = <&usbphy 1>; 470 }; 471 }; 472 473 ohci: ohci@ec300000 { 474 compatible = "samsung,exynos4210-ohci"; 475 reg = <0xec300000 0x100>; 476 interrupts = <23>; 477 interrupt-parent = <&vic1>; 478 clocks = <&clocks CLK_USB_HOST>; 479 clock-names = "usbhost"; 480 #address-cells = <1>; 481 #size-cells = <0>; 482 status = "disabled"; 483 484 port@0 { 485 reg = <0>; 486 phys = <&usbphy 1>; 487 }; 488 }; 489 490 mfc: codec@f1700000 { 491 compatible = "samsung,mfc-v5"; 492 reg = <0xf1700000 0x10000>; 493 interrupt-parent = <&vic2>; 494 interrupts = <14>; 495 clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>; 496 clock-names = "sclk_mfc", "mfc"; 497 }; 498 499 vic0: interrupt-controller@f2000000 { 500 compatible = "arm,pl192-vic"; 501 interrupt-controller; 502 reg = <0xf2000000 0x1000>; 503 #interrupt-cells = <1>; 504 }; 505 506 vic1: interrupt-controller@f2100000 { 507 compatible = "arm,pl192-vic"; 508 interrupt-controller; 509 reg = <0xf2100000 0x1000>; 510 #interrupt-cells = <1>; 511 }; 512 513 vic2: interrupt-controller@f2200000 { 514 compatible = "arm,pl192-vic"; 515 interrupt-controller; 516 reg = <0xf2200000 0x1000>; 517 #interrupt-cells = <1>; 518 }; 519 520 vic3: interrupt-controller@f2300000 { 521 compatible = "arm,pl192-vic"; 522 interrupt-controller; 523 reg = <0xf2300000 0x1000>; 524 #interrupt-cells = <1>; 525 }; 526 527 fimd: fimd@f8000000 { 528 compatible = "samsung,s5pv210-fimd"; 529 interrupt-parent = <&vic2>; 530 reg = <0xf8000000 0x20000>; 531 interrupt-names = "fifo", "vsync", "lcd_sys"; 532 interrupts = <0>, <1>, <2>; 533 clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>; 534 clock-names = "sclk_fimd", "fimd"; 535 status = "disabled"; 536 }; 537 538 dmc0: dmc@f0000000 { 539 compatible = "samsung,s5pv210-dmc"; 540 reg = <0xf0000000 0x1000>; 541 }; 542 543 dmc1: dmc@f1400000 { 544 compatible = "samsung,s5pv210-dmc"; 545 reg = <0xf1400000 0x1000>; 546 }; 547 548 g2d: g2d@fa000000 { 549 compatible = "samsung,s5pv210-g2d"; 550 reg = <0xfa000000 0x1000>; 551 interrupt-parent = <&vic2>; 552 interrupts = <9>; 553 clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>; 554 clock-names = "sclk_fimg2d", "fimg2d"; 555 }; 556 557 mdma1: mdma@fa200000 { 558 compatible = "arm,pl330", "arm,primecell"; 559 reg = <0xfa200000 0x1000>; 560 interrupt-parent = <&vic0>; 561 interrupts = <18>; 562 clocks = <&clocks CLK_MDMA>; 563 clock-names = "apb_pclk"; 564 #dma-cells = <1>; 565 #dma-channels = <8>; 566 #dma-requests = <1>; 567 }; 568 569 rotator: rotator@fa300000 { 570 compatible = "samsung,s5pv210-rotator"; 571 reg = <0xfa300000 0x1000>; 572 interrupt-parent = <&vic2>; 573 interrupts = <4>; 574 clocks = <&clocks CLK_ROTATOR>; 575 clock-names = "rotator"; 576 }; 577 578 i2c1: i2c@fab00000 { 579 compatible = "samsung,s3c2440-i2c"; 580 reg = <0xfab00000 0x1000>; 581 interrupt-parent = <&vic2>; 582 interrupts = <13>; 583 clocks = <&clocks CLK_I2C1>; 584 clock-names = "i2c"; 585 pinctrl-names = "default"; 586 pinctrl-0 = <&i2c1_bus>; 587 #address-cells = <1>; 588 #size-cells = <0>; 589 status = "disabled"; 590 }; 591 592 camera: camera { 593 compatible = "samsung,fimc", "simple-bus"; 594 pinctrl-names = "default"; 595 pinctrl-0 = <>; 596 clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>; 597 clock-names = "sclk_cam0", "sclk_cam1"; 598 #address-cells = <1>; 599 #size-cells = <1>; 600 #clock-cells = <1>; 601 clock-output-names = "cam_a_clkout", "cam_b_clkout"; 602 ranges; 603 604 csis0: csis@fa600000 { 605 compatible = "samsung,s5pv210-csis"; 606 reg = <0xfa600000 0x4000>; 607 interrupt-parent = <&vic2>; 608 interrupts = <29>; 609 clocks = <&clocks CLK_CSIS>, 610 <&clocks SCLK_CSIS>; 611 clock-names = "clk_csis", 612 "sclk_csis"; 613 bus-width = <4>; 614 status = "disabled"; 615 #address-cells = <1>; 616 #size-cells = <0>; 617 }; 618 619 fimc0: fimc@fb200000 { 620 compatible = "samsung,s5pv210-fimc"; 621 reg = <0xfb200000 0x1000>; 622 interrupts = <5>; 623 interrupt-parent = <&vic2>; 624 clocks = <&clocks CLK_FIMC0>, 625 <&clocks SCLK_FIMC0>; 626 clock-names = "fimc", 627 "sclk_fimc"; 628 samsung,pix-limits = <4224 8192 1920 4224>; 629 samsung,min-pix-alignment = <16 8>; 630 samsung,cam-if; 631 }; 632 633 fimc1: fimc@fb300000 { 634 compatible = "samsung,s5pv210-fimc"; 635 reg = <0xfb300000 0x1000>; 636 interrupt-parent = <&vic2>; 637 interrupts = <6>; 638 clocks = <&clocks CLK_FIMC1>, 639 <&clocks SCLK_FIMC1>; 640 clock-names = "fimc", 641 "sclk_fimc"; 642 samsung,pix-limits = <4224 8192 1920 4224>; 643 samsung,min-pix-alignment = <1 1>; 644 samsung,mainscaler-ext; 645 samsung,cam-if; 646 samsung,lcd-wb; 647 }; 648 649 fimc2: fimc@fb400000 { 650 compatible = "samsung,s5pv210-fimc"; 651 reg = <0xfb400000 0x1000>; 652 interrupt-parent = <&vic2>; 653 interrupts = <7>; 654 clocks = <&clocks CLK_FIMC2>, 655 <&clocks SCLK_FIMC2>; 656 clock-names = "fimc", 657 "sclk_fimc"; 658 samsung,pix-limits = <1920 8192 1280 1920>; 659 samsung,min-pix-alignment = <16 8>; 660 samsung,rotators = <0>; 661 samsung,cam-if; 662 }; 663 }; 664 665 jpeg_codec: jpeg-codec@fb600000 { 666 compatible = "samsung,s5pv210-jpeg"; 667 reg = <0xfb600000 0x1000>; 668 interrupt-parent = <&vic2>; 669 interrupts = <8>; 670 clocks = <&clocks CLK_JPEG>; 671 clock-names = "jpeg"; 672 }; 673 }; 674}; 675 676#include "s5pv210-pinctrl.dtsi" 677