1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause AND BSD-2-Clause
3 *
4 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5 * Copyright (C) 1995, 1996 TooLs GmbH.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by TooLs GmbH.
19 * 4. The name of TooLs GmbH may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 * $NetBSD: clock.c,v 1.9 2000/01/19 02:52:19 msaitoh Exp $
34 */
35 /*
36 * Copyright (C) 2001 Benno Rice.
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
47 *
48 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
49 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
50 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
51 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
52 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
53 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
54 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
55 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
56 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
57 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58 */
59
60 #include <sys/cdefs.h>
61 #include <sys/param.h>
62 #include <sys/systm.h>
63 #include <sys/kernel.h>
64 #include <sys/bus.h>
65 #include <sys/interrupt.h>
66 #include <sys/pcpu.h>
67 #include <sys/sysctl.h>
68 #include <sys/timeet.h>
69 #include <sys/timetc.h>
70 #include <sys/vdso.h>
71
72 #include <dev/ofw/openfirm.h>
73
74 #include <machine/clock.h>
75 #include <machine/cpu.h>
76 #include <machine/intr_machdep.h>
77 #include <machine/md_var.h>
78 #include <machine/smp.h>
79
80 /*
81 * Initially we assume a processor with a bus frequency of 12.5 MHz.
82 */
83 static int initialized = 0;
84 static uint64_t ps_per_tick = 80000;
85 static u_long ticks_per_sec = 12500000;
86 static u_long *decr_counts[MAXCPU];
87
88 static int decr_et_start(struct eventtimer *et,
89 sbintime_t first, sbintime_t period);
90 static int decr_et_stop(struct eventtimer *et);
91 static timecounter_get_t decr_get_timecount;
92 static uint32_t decr_vdso_timehands(struct vdso_timehands *vdso_th,
93 struct timecounter *tc);
94 #ifdef COMPAT_FREEBSD32
95 static uint32_t decr_vdso_timehands32(struct vdso_timehands32 *vdso_th32,
96 struct timecounter *tc);
97 #endif
98
99 struct decr_state {
100 int mode; /* 0 - off, 1 - periodic, 2 - one-shot. */
101 int32_t div; /* Periodic divisor. */
102 };
103 DPCPU_DEFINE_STATIC(struct decr_state, decr_state);
104
105 static struct eventtimer decr_et;
106 static struct timecounter decr_tc = {
107 .tc_get_timecount = decr_get_timecount,
108 .tc_counter_mask = ~0u,
109 .tc_name = "timebase",
110 .tc_quality = 1000,
111 .tc_fill_vdso_timehands = decr_vdso_timehands,
112 #ifdef COMPAT_FREEBSD32
113 .tc_fill_vdso_timehands32 = decr_vdso_timehands32,
114 #endif
115 };
116
117 /*
118 * Decrementer interrupt handler.
119 */
120 void
decr_intr(struct trapframe * frame)121 decr_intr(struct trapframe *frame)
122 {
123 struct decr_state *s = DPCPU_PTR(decr_state);
124 int nticks = 0;
125 int32_t val;
126
127 if (!initialized)
128 return;
129
130 (*decr_counts[curcpu])++;
131
132 #ifdef BOOKE
133 /*
134 * Interrupt handler must reset DIS to avoid getting another
135 * interrupt once EE is enabled.
136 */
137 mtspr(SPR_TSR, TSR_DIS);
138 #endif
139
140 if (s->mode == 1) {
141 /*
142 * Based on the actual time delay since the last decrementer
143 * reload, we arrange for earlier interrupt next time.
144 */
145 __asm ("mfdec %0" : "=r"(val));
146 while (val < 0) {
147 val += s->div;
148 nticks++;
149 }
150 mtdec(val);
151 } else if (s->mode == 2) {
152 nticks = 1;
153 decr_et_stop(NULL);
154 } else if (s->mode == 0) {
155 /* Potemkin timer ran out without an event. Just reset it. */
156 decr_et_stop(NULL);
157 }
158
159 while (nticks-- > 0) {
160 if (decr_et.et_active)
161 decr_et.et_event_cb(&decr_et, decr_et.et_arg);
162 }
163 }
164
165 void
cpu_initclocks(void)166 cpu_initclocks(void)
167 {
168
169 decr_tc_init();
170 cpu_initclocks_bsp();
171 }
172
173 /*
174 * BSP early initialization.
175 */
176 void
decr_init(void)177 decr_init(void)
178 {
179 struct cpuref cpu;
180 char buf[32];
181
182 /*
183 * Check the BSP's timebase frequency. Sometimes we can't find the BSP,
184 * so fall back to the first CPU in this case.
185 */
186 if (platform_smp_get_bsp(&cpu) != 0)
187 platform_smp_first_cpu(&cpu);
188 ticks_per_sec = platform_timebase_freq(&cpu);
189 ps_per_tick = 1000000000000 / ticks_per_sec;
190
191 set_cputicker(mftb, ticks_per_sec, false);
192 snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
193 intrcnt_add(buf, &decr_counts[curcpu]);
194 decr_et_stop(NULL);
195 initialized = 1;
196 }
197
198 #ifdef SMP
199 /*
200 * AP early initialization.
201 */
202 void
decr_ap_init(void)203 decr_ap_init(void)
204 {
205 char buf[32];
206
207 snprintf(buf, sizeof(buf), "cpu%d:decrementer", curcpu);
208 intrcnt_add(buf, &decr_counts[curcpu]);
209 decr_et_stop(NULL);
210 }
211 #endif
212
213 /*
214 * Final initialization.
215 */
216 void
decr_tc_init(void)217 decr_tc_init(void)
218 {
219
220 decr_tc.tc_frequency = ticks_per_sec;
221 tc_init(&decr_tc);
222 decr_et.et_name = "decrementer";
223 decr_et.et_flags = ET_FLAGS_PERIODIC | ET_FLAGS_ONESHOT |
224 ET_FLAGS_PERCPU;
225 decr_et.et_quality = 1000;
226 decr_et.et_frequency = ticks_per_sec;
227 decr_et.et_min_period = (0x00000002LLU << 32) / ticks_per_sec;
228 decr_et.et_max_period = (0x7fffffffLLU << 32) / ticks_per_sec;
229 decr_et.et_start = decr_et_start;
230 decr_et.et_stop = decr_et_stop;
231 decr_et.et_priv = NULL;
232 et_register(&decr_et);
233 }
234
235 uint32_t
decr_vdso_timehands(struct vdso_timehands * vdso_th,struct timecounter * tc)236 decr_vdso_timehands(struct vdso_timehands *vdso_th, struct timecounter *tc)
237 {
238 vdso_th->th_algo = VDSO_TH_ALGO_PPC_TB;
239 bzero(vdso_th->th_res, sizeof(vdso_th->th_res));
240 return (initialized == 1);
241 }
242
243 #ifdef COMPAT_FREEBSD32
244 uint32_t
decr_vdso_timehands32(struct vdso_timehands32 * vdso_th32,struct timecounter * tc)245 decr_vdso_timehands32(struct vdso_timehands32 *vdso_th32,
246 struct timecounter *tc)
247 {
248 vdso_th32->th_algo = VDSO_TH_ALGO_PPC_TB;
249 bzero(vdso_th32->th_res, sizeof(vdso_th32->th_res));
250 return (initialized == 1);
251 }
252 #endif
253
254 /*
255 * Event timer start method.
256 */
257 static int
decr_et_start(struct eventtimer * et,sbintime_t first,sbintime_t period)258 decr_et_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
259 {
260 struct decr_state *s = DPCPU_PTR(decr_state);
261 uint32_t fdiv;
262 #ifdef BOOKE
263 uint32_t tcr;
264 #endif
265
266 if (period != 0) {
267 s->mode = 1;
268 s->div = (decr_et.et_frequency * period) >> 32;
269 } else {
270 s->mode = 2;
271 s->div = 0;
272 }
273 if (first != 0)
274 fdiv = (decr_et.et_frequency * first) >> 32;
275 else
276 fdiv = s->div;
277
278 #ifdef BOOKE
279 tcr = mfspr(SPR_TCR);
280 tcr |= TCR_DIE;
281 if (s->mode == 1) {
282 mtspr(SPR_DECAR, s->div);
283 tcr |= TCR_ARE;
284 } else
285 tcr &= ~TCR_ARE;
286 mtdec(fdiv);
287 mtspr(SPR_TCR, tcr);
288 #else
289 mtdec(fdiv);
290 #endif
291
292 return (0);
293 }
294
295 /*
296 * Event timer stop method.
297 */
298 static int
decr_et_stop(struct eventtimer * et)299 decr_et_stop(struct eventtimer *et)
300 {
301 struct decr_state *s = DPCPU_PTR(decr_state);
302 #ifdef BOOKE
303 uint32_t tcr;
304 #endif
305
306 s->mode = 0;
307 s->div = 0x7fffffff;
308 #ifdef BOOKE
309 tcr = mfspr(SPR_TCR);
310 tcr &= ~(TCR_DIE | TCR_ARE);
311 mtspr(SPR_TCR, tcr);
312 #else
313 mtdec(s->div);
314 #endif
315 return (0);
316 }
317
318 /*
319 * Timecounter get method.
320 */
321 static unsigned
decr_get_timecount(struct timecounter * tc)322 decr_get_timecount(struct timecounter *tc)
323 {
324 return (mftb());
325 }
326
327 /*
328 * Wait for about n microseconds (at least!).
329 */
330 void
DELAY(int n)331 DELAY(int n)
332 {
333 volatile u_quad_t tb;
334 u_quad_t ttb;
335
336 TSENTER();
337 tb = mftb();
338 ttb = tb + howmany((uint64_t)n * 1000000, ps_per_tick);
339 nop_prio_vlow();
340 while (tb < ttb)
341 tb = mftb();
342 nop_prio_medium();
343 TSEXIT();
344 }
345