1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(C) 2019 Marvell International Ltd.
3  */
4 
5 #ifndef _OTX2_DEV_H
6 #define _OTX2_DEV_H
7 
8 #include <rte_bus_pci.h>
9 
10 #include "otx2_common.h"
11 #include "otx2_irq.h"
12 #include "otx2_mbox.h"
13 #include "otx2_mempool.h"
14 
15 /* Common HWCAP flags. Use from LSB bits */
16 #define OTX2_HWCAP_F_VF		BIT_ULL(8) /* VF device */
17 #define otx2_dev_is_vf(dev)	(dev->hwcap & OTX2_HWCAP_F_VF)
18 #define otx2_dev_is_pf(dev)	(!(dev->hwcap & OTX2_HWCAP_F_VF))
19 #define otx2_dev_is_lbk(dev)	((dev->hwcap & OTX2_HWCAP_F_VF) && \
20 				 (dev->tx_chan_base < 0x700))
21 #define otx2_dev_revid(dev)	(dev->hwcap & 0xFF)
22 #define otx2_dev_is_sdp(dev)	(dev->sdp_link)
23 
24 #define otx2_dev_is_vf_or_sdp(dev)				\
25 	(otx2_dev_is_vf(dev) || otx2_dev_is_sdp(dev))
26 
27 #define otx2_dev_is_A0(dev)					\
28 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) &&	\
29 	 (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0))
30 #define otx2_dev_is_Ax(dev)					\
31 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0))
32 
33 #define otx2_dev_is_95xx_A0(dev)				\
34 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) &&	\
35 	 (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0) &&	\
36 	 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x1))
37 #define otx2_dev_is_95xx_Ax(dev)				\
38 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) &&	\
39 	 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x1))
40 
41 #define otx2_dev_is_96xx_A0(dev)				\
42 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) &&	\
43 	 (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0) &&	\
44 	 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
45 #define otx2_dev_is_96xx_Ax(dev)				\
46 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x0) &&	\
47 	 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
48 
49 #define otx2_dev_is_96xx_Cx(dev)				\
50 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x2) &&	\
51 	 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
52 
53 #define otx2_dev_is_96xx_C0(dev)				\
54 	((RVU_PCI_REV_MAJOR(otx2_dev_revid(dev)) == 0x2) &&	\
55 	 (RVU_PCI_REV_MINOR(otx2_dev_revid(dev)) == 0x0) &&	\
56 	 (RVU_PCI_REV_MIDR_ID(otx2_dev_revid(dev)) == 0x0))
57 
58 struct otx2_dev;
59 
60 /* Link status callback */
61 typedef void (*otx2_link_status_t)(struct otx2_dev *dev,
62 				   struct cgx_link_user_info *link);
63 /* PTP info callback */
64 typedef int (*otx2_ptp_info_t)(struct otx2_dev *dev, bool ptp_en);
65 
66 struct otx2_dev_ops {
67 	otx2_link_status_t link_status_update;
68 	otx2_ptp_info_t ptp_info_update;
69 };
70 
71 #define OTX2_DEV					\
72 	int node __rte_cache_aligned;			\
73 	uint16_t pf;					\
74 	int16_t vf;					\
75 	uint16_t pf_func;				\
76 	uint8_t mbox_active;				\
77 	bool drv_inited;				\
78 	uint64_t active_vfs[MAX_VFPF_DWORD_BITS];	\
79 	uintptr_t bar2;					\
80 	uintptr_t bar4;					\
81 	struct otx2_mbox mbox_local;			\
82 	struct otx2_mbox mbox_up;			\
83 	struct otx2_mbox mbox_vfpf;			\
84 	struct otx2_mbox mbox_vfpf_up;			\
85 	otx2_intr_t intr;				\
86 	int timer_set;	/* ~0 : no alarm handling */	\
87 	uint64_t hwcap;					\
88 	struct otx2_npa_lf npalf;			\
89 	struct otx2_mbox *mbox;				\
90 	uint16_t maxvf;					\
91 	const struct otx2_dev_ops *ops
92 
93 struct otx2_dev {
94 	OTX2_DEV;
95 };
96 
97 __rte_internal
98 int otx2_dev_priv_init(struct rte_pci_device *pci_dev, void *otx2_dev);
99 
100 /* Common dev init and fini routines */
101 
102 static __rte_always_inline int
otx2_dev_init(struct rte_pci_device * pci_dev,void * otx2_dev)103 otx2_dev_init(struct rte_pci_device *pci_dev, void *otx2_dev)
104 {
105 	struct otx2_dev *dev = otx2_dev;
106 	uint8_t rev_id;
107 	int rc;
108 
109 	rc = rte_pci_read_config(pci_dev, &rev_id,
110 				 1, RVU_PCI_REVISION_ID);
111 	if (rc != 1) {
112 		otx2_err("Failed to read pci revision id, rc=%d", rc);
113 		return rc;
114 	}
115 
116 	dev->hwcap = rev_id;
117 	return otx2_dev_priv_init(pci_dev, otx2_dev);
118 }
119 
120 __rte_internal
121 void otx2_dev_fini(struct rte_pci_device *pci_dev, void *otx2_dev);
122 __rte_internal
123 int otx2_dev_active_vfs(void *otx2_dev);
124 
125 #define RVU_PFVF_PF_SHIFT	10
126 #define RVU_PFVF_PF_MASK	0x3F
127 #define RVU_PFVF_FUNC_SHIFT	0
128 #define RVU_PFVF_FUNC_MASK	0x3FF
129 
130 static inline int
otx2_get_vf(uint16_t pf_func)131 otx2_get_vf(uint16_t pf_func)
132 {
133 	return (((pf_func >> RVU_PFVF_FUNC_SHIFT) & RVU_PFVF_FUNC_MASK) - 1);
134 }
135 
136 static inline int
otx2_get_pf(uint16_t pf_func)137 otx2_get_pf(uint16_t pf_func)
138 {
139 	return (pf_func >> RVU_PFVF_PF_SHIFT) & RVU_PFVF_PF_MASK;
140 }
141 
142 static inline int
otx2_pfvf_func(int pf,int vf)143 otx2_pfvf_func(int pf, int vf)
144 {
145 	return (pf << RVU_PFVF_PF_SHIFT) | ((vf << RVU_PFVF_FUNC_SHIFT) + 1);
146 }
147 
148 static inline int
otx2_is_afvf(uint16_t pf_func)149 otx2_is_afvf(uint16_t pf_func)
150 {
151 	return !(pf_func & ~RVU_PFVF_FUNC_MASK);
152 }
153 
154 #endif /* _OTX2_DEV_H */
155