1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2020 Mellanox Technologies, Ltd
3 */
4
5 #include <rte_malloc.h>
6 #include <rte_log.h>
7 #include <rte_errno.h>
8 #include <rte_pci.h>
9 #include <rte_regexdev.h>
10 #include <rte_regexdev_core.h>
11 #include <rte_regexdev_driver.h>
12
13 #include <mlx5_common_pci.h>
14 #include <mlx5_glue.h>
15 #include <mlx5_devx_cmds.h>
16 #include <mlx5_prm.h>
17
18 #include "mlx5_regex.h"
19 #include "mlx5_regex_utils.h"
20 #include "mlx5_rxp_csrs.h"
21
22 #define MLX5_REGEX_DRIVER_NAME regex_mlx5
23 #define MLX5_REGEX_LOG_NAME pmd.regex.mlx5
24
25 int mlx5_regex_logtype;
26
27 const struct rte_regexdev_ops mlx5_regexdev_ops = {
28 .dev_info_get = mlx5_regex_info_get,
29 .dev_configure = mlx5_regex_configure,
30 .dev_db_import = mlx5_regex_rules_db_import,
31 .dev_qp_setup = mlx5_regex_qp_setup,
32 .dev_start = mlx5_regex_start,
33 .dev_stop = mlx5_regex_stop,
34 .dev_close = mlx5_regex_close,
35 };
36
37 int
mlx5_regex_start(struct rte_regexdev * dev __rte_unused)38 mlx5_regex_start(struct rte_regexdev *dev __rte_unused)
39 {
40 return 0;
41 }
42
43 int
mlx5_regex_stop(struct rte_regexdev * dev __rte_unused)44 mlx5_regex_stop(struct rte_regexdev *dev __rte_unused)
45 {
46 return 0;
47 }
48
49 int
mlx5_regex_close(struct rte_regexdev * dev __rte_unused)50 mlx5_regex_close(struct rte_regexdev *dev __rte_unused)
51 {
52 return 0;
53 }
54
55 static struct ibv_device *
mlx5_regex_get_ib_device_match(struct rte_pci_addr * addr)56 mlx5_regex_get_ib_device_match(struct rte_pci_addr *addr)
57 {
58 int n;
59 struct ibv_device **ibv_list = mlx5_glue->get_device_list(&n);
60 struct ibv_device *ibv_match = NULL;
61
62 if (!ibv_list) {
63 rte_errno = ENOSYS;
64 return NULL;
65 }
66 while (n-- > 0) {
67 struct rte_pci_addr pci_addr;
68
69 DRV_LOG(DEBUG, "Checking device \"%s\"..", ibv_list[n]->name);
70 if (mlx5_dev_to_pci_addr(ibv_list[n]->ibdev_path, &pci_addr))
71 continue;
72 if (rte_pci_addr_cmp(addr, &pci_addr))
73 continue;
74 ibv_match = ibv_list[n];
75 break;
76 }
77 if (!ibv_match)
78 rte_errno = ENOENT;
79 mlx5_glue->free_device_list(ibv_list);
80 return ibv_match;
81 }
82 static int
mlx5_regex_engines_status(struct ibv_context * ctx,int num_engines)83 mlx5_regex_engines_status(struct ibv_context *ctx, int num_engines)
84 {
85 uint32_t fpga_ident = 0;
86 int err;
87 int i;
88
89 for (i = 0; i < num_engines; i++) {
90 err = mlx5_devx_regex_register_read(ctx, i,
91 MLX5_RXP_CSR_IDENTIFIER,
92 &fpga_ident);
93 fpga_ident = (fpga_ident & (0x0000FFFF));
94 if (err || fpga_ident != MLX5_RXP_IDENTIFIER) {
95 DRV_LOG(ERR, "Failed setup RXP %d err %d database "
96 "memory 0x%x", i, err, fpga_ident);
97 if (!err)
98 err = EINVAL;
99 return err;
100 }
101 }
102 return 0;
103 }
104
105 static void
mlx5_regex_get_name(char * name,struct rte_pci_device * pci_dev __rte_unused)106 mlx5_regex_get_name(char *name, struct rte_pci_device *pci_dev __rte_unused)
107 {
108 sprintf(name, "mlx5_regex_%02x:%02x.%02x", pci_dev->addr.bus,
109 pci_dev->addr.devid, pci_dev->addr.function);
110 }
111
112 static int
mlx5_regex_pci_probe(struct rte_pci_driver * pci_drv __rte_unused,struct rte_pci_device * pci_dev)113 mlx5_regex_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
114 struct rte_pci_device *pci_dev)
115 {
116 struct ibv_device *ibv;
117 struct mlx5_regex_priv *priv = NULL;
118 struct ibv_context *ctx = NULL;
119 struct mlx5_hca_attr attr;
120 char name[RTE_REGEXDEV_NAME_MAX_LEN];
121 int ret;
122
123 ibv = mlx5_regex_get_ib_device_match(&pci_dev->addr);
124 if (!ibv) {
125 DRV_LOG(ERR, "No matching IB device for PCI slot "
126 PCI_PRI_FMT ".", pci_dev->addr.domain,
127 pci_dev->addr.bus, pci_dev->addr.devid,
128 pci_dev->addr.function);
129 return -rte_errno;
130 }
131 DRV_LOG(INFO, "PCI information matches for device \"%s\".",
132 ibv->name);
133 ctx = mlx5_glue->dv_open_device(ibv);
134 if (!ctx) {
135 DRV_LOG(ERR, "Failed to open IB device \"%s\".", ibv->name);
136 rte_errno = ENODEV;
137 return -rte_errno;
138 }
139 ret = mlx5_devx_cmd_query_hca_attr(ctx, &attr);
140 if (ret) {
141 DRV_LOG(ERR, "Unable to read HCA capabilities.");
142 rte_errno = ENOTSUP;
143 goto dev_error;
144 } else if (!attr.regex || attr.regexp_num_of_engines == 0) {
145 DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe "
146 "old FW/OFED version?");
147 rte_errno = ENOTSUP;
148 goto dev_error;
149 }
150 if (mlx5_regex_engines_status(ctx, 2)) {
151 DRV_LOG(ERR, "RegEx engine error.");
152 rte_errno = ENOMEM;
153 goto dev_error;
154 }
155 priv = rte_zmalloc("mlx5 regex device private", sizeof(*priv),
156 RTE_CACHE_LINE_SIZE);
157 if (!priv) {
158 DRV_LOG(ERR, "Failed to allocate private memory.");
159 rte_errno = ENOMEM;
160 goto dev_error;
161 }
162 priv->ctx = ctx;
163 priv->nb_engines = 2; /* attr.regexp_num_of_engines */
164 /* Default RXP programming mode to Shared. */
165 priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE;
166 mlx5_regex_get_name(name, pci_dev);
167 priv->regexdev = rte_regexdev_register(name);
168 if (priv->regexdev == NULL) {
169 DRV_LOG(ERR, "Failed to register RegEx device.");
170 rte_errno = rte_errno ? rte_errno : EINVAL;
171 goto error;
172 }
173 ret = mlx5_glue->devx_query_eqn(ctx, 0, &priv->eqn);
174 if (ret) {
175 DRV_LOG(ERR, "can't query event queue number.");
176 rte_errno = ENOMEM;
177 goto error;
178 }
179 /*
180 * This PMD always claims the write memory barrier on UAR
181 * registers writings, it is safe to allocate UAR with any
182 * memory mapping type.
183 */
184 priv->uar = mlx5_devx_alloc_uar(ctx, -1);
185 if (!priv->uar) {
186 DRV_LOG(ERR, "can't allocate uar.");
187 rte_errno = ENOMEM;
188 goto error;
189 }
190 priv->pd = mlx5_glue->alloc_pd(ctx);
191 if (!priv->pd) {
192 DRV_LOG(ERR, "can't allocate pd.");
193 rte_errno = ENOMEM;
194 goto error;
195 }
196 priv->regexdev->dev_ops = &mlx5_regexdev_ops;
197 priv->regexdev->enqueue = mlx5_regexdev_enqueue;
198 priv->regexdev->dequeue = mlx5_regexdev_dequeue;
199 priv->regexdev->device = (struct rte_device *)pci_dev;
200 priv->regexdev->data->dev_private = priv;
201 priv->regexdev->state = RTE_REGEXDEV_READY;
202 priv->mr_scache.reg_mr_cb = mlx5_common_verbs_reg_mr;
203 priv->mr_scache.dereg_mr_cb = mlx5_common_verbs_dereg_mr;
204 ret = mlx5_mr_btree_init(&priv->mr_scache.cache,
205 MLX5_MR_BTREE_CACHE_N * 2,
206 rte_socket_id());
207 if (ret) {
208 DRV_LOG(ERR, "MR init tree failed.");
209 rte_errno = ENOMEM;
210 goto error;
211 }
212 return 0;
213
214 error:
215 if (priv->pd)
216 mlx5_glue->dealloc_pd(priv->pd);
217 if (priv->uar)
218 mlx5_glue->devx_free_uar(priv->uar);
219 if (priv->regexdev)
220 rte_regexdev_unregister(priv->regexdev);
221 dev_error:
222 if (ctx)
223 mlx5_glue->close_device(ctx);
224 if (priv)
225 rte_free(priv);
226 return -rte_errno;
227 }
228
229 static int
mlx5_regex_pci_remove(struct rte_pci_device * pci_dev)230 mlx5_regex_pci_remove(struct rte_pci_device *pci_dev)
231 {
232 char name[RTE_REGEXDEV_NAME_MAX_LEN];
233 struct rte_regexdev *dev;
234 struct mlx5_regex_priv *priv = NULL;
235
236 mlx5_regex_get_name(name, pci_dev);
237 dev = rte_regexdev_get_device_by_name(name);
238 if (!dev)
239 return 0;
240 priv = dev->data->dev_private;
241 if (priv) {
242 if (priv->pd)
243 mlx5_glue->dealloc_pd(priv->pd);
244 if (priv->uar)
245 mlx5_glue->devx_free_uar(priv->uar);
246 if (priv->regexdev)
247 rte_regexdev_unregister(priv->regexdev);
248 if (priv->ctx)
249 mlx5_glue->close_device(priv->ctx);
250 if (priv->regexdev)
251 rte_regexdev_unregister(priv->regexdev);
252 rte_free(priv);
253 }
254 return 0;
255 }
256
257 static const struct rte_pci_id mlx5_regex_pci_id_map[] = {
258 {
259 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
260 PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF)
261 },
262 {
263 RTE_PCI_DEVICE(PCI_VENDOR_ID_MELLANOX,
264 PCI_DEVICE_ID_MELLANOX_CONNECTX7BF)
265 },
266 {
267 .vendor_id = 0
268 }
269 };
270
271 static struct mlx5_pci_driver mlx5_regex_driver = {
272 .driver_class = MLX5_CLASS_REGEX,
273 .pci_driver = {
274 .driver = {
275 .name = RTE_STR(MLX5_REGEX_DRIVER_NAME),
276 },
277 .id_table = mlx5_regex_pci_id_map,
278 .probe = mlx5_regex_pci_probe,
279 .remove = mlx5_regex_pci_remove,
280 .drv_flags = 0,
281 },
282 };
283
RTE_INIT(rte_mlx5_regex_init)284 RTE_INIT(rte_mlx5_regex_init)
285 {
286 mlx5_common_init();
287 if (mlx5_glue)
288 mlx5_pci_driver_register(&mlx5_regex_driver);
289 }
290
291 RTE_LOG_REGISTER(mlx5_regex_logtype, MLX5_REGEX_LOG_NAME, NOTICE)
292 RTE_PMD_EXPORT_NAME(MLX5_REGEX_DRIVER_NAME, __COUNTER__);
293 RTE_PMD_REGISTER_PCI_TABLE(MLX5_REGEX_DRIVER_NAME, mlx5_regex_pci_id_map);
294 RTE_PMD_REGISTER_KMOD_DEP(MLX5_REGEX_DRIVER_NAME, "* ib_uverbs & mlx5_core & mlx5_ib");
295