1 /*-
2 * Copyright 2016 Stanislav Galabov
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29
30 #include "opt_platform.h"
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/conf.h>
35 #include <sys/bus.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/proc.h>
41 #include <sys/resource.h>
42 #include <sys/gpio.h>
43
44 #include <machine/bus.h>
45 #include <machine/intr.h>
46
47 #include <mips/mediatek/mtk_soc.h>
48
49 #include <dev/gpio/gpiobusvar.h>
50
51 #include <dev/fdt/fdt_common.h>
52 #include <dev/ofw/ofw_bus.h>
53 #include <dev/ofw/ofw_bus_subr.h>
54
55 #include <dt-bindings/interrupt-controller/irq.h>
56
57 #include "gpio_if.h"
58 #include "pic_if.h"
59
60 #define MTK_GPIO_PINS 32
61
62 enum mtk_gpio_regs {
63 GPIO_PIOINT = 0,
64 GPIO_PIOEDGE,
65 GPIO_PIORENA,
66 GPIO_PIOFENA,
67 GPIO_PIODATA,
68 GPIO_PIODIR,
69 GPIO_PIOPOL,
70 GPIO_PIOSET,
71 GPIO_PIORESET,
72 GPIO_PIOTOG,
73 GPIO_PIOMAX
74 };
75
76 struct mtk_gpio_pin_irqsrc {
77 struct intr_irqsrc isrc;
78 u_int irq;
79 };
80
81 struct mtk_gpio_pin {
82 uint32_t pin_caps;
83 uint32_t pin_flags;
84 enum intr_trigger intr_trigger;
85 enum intr_polarity intr_polarity;
86 char pin_name[GPIOMAXNAME];
87 struct mtk_gpio_pin_irqsrc pin_irqsrc;
88 };
89
90 struct mtk_gpio_softc {
91 device_t dev;
92 device_t busdev;
93 struct resource *res[2];
94 struct mtx mtx;
95 struct mtk_gpio_pin pins[MTK_GPIO_PINS];
96 void *intrhand;
97
98 uint8_t regs[GPIO_PIOMAX];
99 uint32_t num_pins;
100 uint8_t do_remap;
101 };
102
103 #define PIC_INTR_ISRC(sc, irq) (&(sc)->pins[(irq)].pin_irqsrc.isrc)
104
105 static struct resource_spec mtk_gpio_spec[] = {
106 { SYS_RES_MEMORY, 0, RF_ACTIVE },
107 { SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE },
108 { -1, 0 }
109 };
110
111 static int mtk_gpio_probe(device_t dev);
112 static int mtk_gpio_attach(device_t dev);
113 static int mtk_gpio_detach(device_t dev);
114 static int mtk_gpio_intr(void *arg);
115
116 #define MTK_GPIO_LOCK(sc) mtx_lock_spin(&(sc)->mtx)
117 #define MTK_GPIO_UNLOCK(sc) mtx_unlock_spin(&(sc)->mtx)
118 #define MTK_GPIO_LOCK_INIT(sc) \
119 mtx_init(&(sc)->mtx, device_get_nameunit((sc)->dev), \
120 "mtk_gpio", MTX_SPIN)
121 #define MTK_GPIO_LOCK_DESTROY(sc) mtx_destroy(&(sc)->mtx)
122
123 #define MTK_WRITE_4(sc, reg, val) \
124 bus_write_4((sc)->res[0], (sc)->regs[(reg)], (val))
125 #define MTK_READ_4(sc, reg) \
126 bus_read_4((sc)->res[0], (sc)->regs[(reg)])
127
128 static struct ofw_compat_data compat_data[] = {
129 { "ralink,rt2880-gpio", 1 },
130 { "ralink,rt3050-gpio", 1 },
131 { "ralink,rt3352-gpio", 1 },
132 { "ralink,rt3883-gpio", 1 },
133 { "ralink,rt5350-gpio", 1 },
134 { "ralink,mt7620a-gpio", 1 },
135 { NULL, 0 }
136 };
137
138 static int
mtk_gpio_probe(device_t dev)139 mtk_gpio_probe(device_t dev)
140 {
141 phandle_t node;
142
143 if (!ofw_bus_status_okay(dev))
144 return (ENXIO);
145
146 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
147 return (ENXIO);
148
149 node = ofw_bus_get_node(dev);
150 if (!OF_hasprop(node, "gpio-controller"))
151 return (ENXIO);
152
153 device_set_desc(dev, "MTK GPIO Controller (v1)");
154
155 return (BUS_PROBE_DEFAULT);
156 }
157
158 static int
mtk_pic_register_isrcs(struct mtk_gpio_softc * sc)159 mtk_pic_register_isrcs(struct mtk_gpio_softc *sc)
160 {
161 int error;
162 uint32_t irq;
163 struct intr_irqsrc *isrc;
164 const char *name;
165
166 name = device_get_nameunit(sc->dev);
167 for (irq = 0; irq < sc->num_pins; irq++) {
168 sc->pins[irq].pin_irqsrc.irq = irq;
169 isrc = PIC_INTR_ISRC(sc, irq);
170 error = intr_isrc_register(isrc, sc->dev, 0, "%s", name);
171 if (error != 0) {
172 /* XXX call intr_isrc_deregister */
173 device_printf(sc->dev, "%s failed", __func__);
174 return (error);
175 }
176 }
177
178 return (0);
179 }
180
181 static int
mtk_gpio_pin_set_direction(struct mtk_gpio_softc * sc,uint32_t pin,uint32_t dir)182 mtk_gpio_pin_set_direction(struct mtk_gpio_softc *sc, uint32_t pin,
183 uint32_t dir)
184 {
185 uint32_t regval, mask = (1u << pin);
186
187 if (!(sc->pins[pin].pin_caps & dir))
188 return (EINVAL);
189
190 regval = MTK_READ_4(sc, GPIO_PIODIR);
191 if (dir == GPIO_PIN_INPUT)
192 regval &= ~mask;
193 else
194 regval |= mask;
195 MTK_WRITE_4(sc, GPIO_PIODIR, regval);
196
197 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INPUT | GPIO_PIN_OUTPUT);
198 sc->pins[pin].pin_flags |= dir;
199
200 return (0);
201 }
202
203 static int
mtk_gpio_pin_set_invert(struct mtk_gpio_softc * sc,uint32_t pin,uint32_t val)204 mtk_gpio_pin_set_invert(struct mtk_gpio_softc *sc, uint32_t pin, uint32_t val)
205 {
206 uint32_t regval, mask = (1u << pin);
207
208 regval = MTK_READ_4(sc, GPIO_PIOPOL);
209 if (val)
210 regval |= mask;
211 else
212 regval &= ~mask;
213 MTK_WRITE_4(sc, GPIO_PIOPOL, regval);
214 sc->pins[pin].pin_flags &= ~(GPIO_PIN_INVIN | GPIO_PIN_INVOUT);
215 sc->pins[pin].pin_flags |= val;
216
217 return (0);
218 }
219
220 static void
mtk_gpio_pin_probe(struct mtk_gpio_softc * sc,uint32_t pin)221 mtk_gpio_pin_probe(struct mtk_gpio_softc *sc, uint32_t pin)
222 {
223 uint32_t mask = (1u << pin);
224 uint32_t val;
225
226 /* Clear cached gpio config */
227 sc->pins[pin].pin_flags = 0;
228
229 val = MTK_READ_4(sc, GPIO_PIORENA) |
230 MTK_READ_4(sc, GPIO_PIOFENA);
231 if (val & mask) {
232 /* Pin is in interrupt mode */
233 sc->pins[pin].intr_trigger = INTR_TRIGGER_EDGE;
234 val = MTK_READ_4(sc, GPIO_PIORENA);
235 if (val & mask)
236 sc->pins[pin].intr_polarity = INTR_POLARITY_HIGH;
237 else
238 sc->pins[pin].intr_polarity = INTR_POLARITY_LOW;
239 }
240
241 val = MTK_READ_4(sc, GPIO_PIODIR);
242 if (val & mask)
243 sc->pins[pin].pin_flags |= GPIO_PIN_OUTPUT;
244 else
245 sc->pins[pin].pin_flags |= GPIO_PIN_INPUT;
246
247 val = MTK_READ_4(sc, GPIO_PIOPOL);
248 if (val & mask) {
249 if (sc->pins[pin].pin_flags & GPIO_PIN_INPUT) {
250 sc->pins[pin].pin_flags |= GPIO_PIN_INVIN;
251 } else {
252 sc->pins[pin].pin_flags |= GPIO_PIN_INVOUT;
253 }
254 }
255 }
256
257 static int
mtk_gpio_attach(device_t dev)258 mtk_gpio_attach(device_t dev)
259 {
260 struct mtk_gpio_softc *sc;
261 phandle_t node;
262 uint32_t i, num_pins;
263
264 sc = device_get_softc(dev);
265 sc->dev = dev;
266
267 if (bus_alloc_resources(dev, mtk_gpio_spec, sc->res)) {
268 device_printf(dev, "could not allocate resources for device\n");
269 return (ENXIO);
270 }
271
272 MTK_GPIO_LOCK_INIT(sc);
273
274 node = ofw_bus_get_node(dev);
275
276 if (OF_hasprop(node, "clocks"))
277 mtk_soc_start_clock(dev);
278 if (OF_hasprop(node, "resets"))
279 mtk_soc_reset_device(dev);
280
281 if (OF_getprop(node, "ralink,register-map", sc->regs,
282 GPIO_PIOMAX) <= 0) {
283 device_printf(dev, "Failed to read register map\n");
284 return (ENXIO);
285 }
286
287 if (OF_hasprop(node, "ralink,num-gpios") && (OF_getencprop(node,
288 "ralink,num-gpios", &num_pins, sizeof(num_pins)) >= 0))
289 sc->num_pins = num_pins;
290 else
291 sc->num_pins = MTK_GPIO_PINS;
292
293 for (i = 0; i < sc->num_pins; i++) {
294 sc->pins[i].pin_caps |= GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
295 GPIO_PIN_INVIN | GPIO_PIN_INVOUT |
296 GPIO_INTR_EDGE_RISING | GPIO_INTR_EDGE_FALLING;
297 sc->pins[i].intr_polarity = INTR_POLARITY_HIGH;
298 sc->pins[i].intr_trigger = INTR_TRIGGER_EDGE;
299
300 snprintf(sc->pins[i].pin_name, GPIOMAXNAME - 1, "gpio%c%d",
301 device_get_unit(dev) + 'a', i);
302 sc->pins[i].pin_name[GPIOMAXNAME - 1] = '\0';
303
304 mtk_gpio_pin_probe(sc, i);
305 }
306
307 if (mtk_pic_register_isrcs(sc) != 0) {
308 device_printf(dev, "could not register PIC ISRCs\n");
309 goto fail;
310 }
311
312 if (intr_pic_register(dev, OF_xref_from_node(node)) == NULL) {
313 device_printf(dev, "could not register PIC\n");
314 goto fail;
315 }
316
317 if (bus_setup_intr(dev, sc->res[1], INTR_TYPE_MISC | INTR_MPSAFE,
318 mtk_gpio_intr, NULL, sc, &sc->intrhand) != 0)
319 goto fail_pic;
320
321 sc->busdev = gpiobus_attach_bus(dev);
322 if (sc->busdev == NULL)
323 goto fail_pic;
324
325 return (0);
326 fail_pic:
327 intr_pic_deregister(dev, OF_xref_from_node(node));
328 fail:
329 if(sc->intrhand != NULL)
330 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
331 bus_release_resources(dev, mtk_gpio_spec, sc->res);
332 MTK_GPIO_LOCK_DESTROY(sc);
333 return (ENXIO);
334 }
335
336 static int
mtk_gpio_detach(device_t dev)337 mtk_gpio_detach(device_t dev)
338 {
339 struct mtk_gpio_softc *sc = device_get_softc(dev);
340 phandle_t node;
341
342 node = ofw_bus_get_node(dev);
343 intr_pic_deregister(dev, OF_xref_from_node(node));
344 if (sc->intrhand != NULL)
345 bus_teardown_intr(dev, sc->res[1], sc->intrhand);
346 bus_release_resources(dev, mtk_gpio_spec, sc->res);
347 MTK_GPIO_LOCK_DESTROY(sc);
348 return (0);
349 }
350
351 static device_t
mtk_gpio_get_bus(device_t dev)352 mtk_gpio_get_bus(device_t dev)
353 {
354 struct mtk_gpio_softc *sc = device_get_softc(dev);
355
356 return (sc->busdev);
357 }
358
359 static int
mtk_gpio_pin_max(device_t dev,int * maxpin)360 mtk_gpio_pin_max(device_t dev, int *maxpin)
361 {
362 struct mtk_gpio_softc *sc = device_get_softc(dev);
363
364 *maxpin = sc->num_pins - 1;
365
366 return (0);
367 }
368
369 static int
mtk_gpio_pin_getcaps(device_t dev,uint32_t pin,uint32_t * caps)370 mtk_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps)
371 {
372 struct mtk_gpio_softc *sc = device_get_softc(dev);
373
374 if (pin >= sc->num_pins)
375 return (EINVAL);
376
377 MTK_GPIO_LOCK(sc);
378 *caps = sc->pins[pin].pin_caps;
379 MTK_GPIO_UNLOCK(sc);
380
381 return (0);
382 }
383
384 static int
mtk_gpio_pin_getflags(device_t dev,uint32_t pin,uint32_t * flags)385 mtk_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags)
386 {
387 struct mtk_gpio_softc *sc = device_get_softc(dev);
388
389 if (pin >= sc->num_pins)
390 return (EINVAL);
391
392 MTK_GPIO_LOCK(sc);
393 *flags = sc->pins[pin].pin_flags;
394 MTK_GPIO_UNLOCK(sc);
395
396 return (0);
397 }
398
399 static int
mtk_gpio_pin_getname(device_t dev,uint32_t pin,char * name)400 mtk_gpio_pin_getname(device_t dev, uint32_t pin, char *name)
401 {
402 struct mtk_gpio_softc *sc = device_get_softc(dev);
403
404 if (pin >= sc->num_pins)
405 return (EINVAL);
406
407 strncpy(name, sc->pins[pin].pin_name, GPIOMAXNAME - 1);
408 name[GPIOMAXNAME - 1] = '\0';
409
410 return (0);
411 }
412
413 static int
mtk_gpio_pin_setflags(device_t dev,uint32_t pin,uint32_t flags)414 mtk_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags)
415 {
416 struct mtk_gpio_softc *sc;
417 int retval;
418
419 sc = device_get_softc(dev);
420
421 if (pin >= sc->num_pins)
422 return (EINVAL);
423
424 MTK_GPIO_LOCK(sc);
425 retval = mtk_gpio_pin_set_direction(sc, pin,
426 flags & (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT));
427 if (retval == 0)
428 retval = mtk_gpio_pin_set_invert(sc, pin,
429 flags & (GPIO_PIN_INVIN | GPIO_PIN_INVOUT));
430 MTK_GPIO_UNLOCK(sc);
431
432 return (retval);
433 }
434
435 static int
mtk_gpio_pin_set(device_t dev,uint32_t pin,unsigned int value)436 mtk_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value)
437 {
438 struct mtk_gpio_softc *sc;
439 int ret;
440
441 sc = device_get_softc(dev);
442 ret = 0;
443
444 if (pin >= sc->num_pins)
445 return (EINVAL);
446
447 MTK_GPIO_LOCK(sc);
448 if (value)
449 MTK_WRITE_4(sc, GPIO_PIOSET, (1u << pin));
450 else
451 MTK_WRITE_4(sc, GPIO_PIORESET, (1u << pin));
452 MTK_GPIO_UNLOCK(sc);
453
454 return (ret);
455 }
456
457 static int
mtk_gpio_pin_get(device_t dev,uint32_t pin,unsigned int * val)458 mtk_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val)
459 {
460 struct mtk_gpio_softc *sc;
461 uint32_t data;
462 int ret;
463
464 sc = device_get_softc(dev);
465 ret = 0;
466
467 if (pin >= sc->num_pins)
468 return (EINVAL);
469
470 MTK_GPIO_LOCK(sc);
471 data = MTK_READ_4(sc, GPIO_PIODATA);
472 *val = (data & (1u << pin)) ? 1 : 0;
473 MTK_GPIO_UNLOCK(sc);
474
475 return (ret);
476 }
477
478 static int
mtk_gpio_pin_toggle(device_t dev,uint32_t pin)479 mtk_gpio_pin_toggle(device_t dev, uint32_t pin)
480 {
481 struct mtk_gpio_softc *sc;
482 int ret;
483
484 sc = device_get_softc(dev);
485 ret = 0;
486
487 if (pin >= sc->num_pins)
488 return (EINVAL);
489
490 MTK_GPIO_LOCK(sc);
491 if (!(sc->pins[pin].pin_flags & GPIO_PIN_OUTPUT)) {
492 ret = EINVAL;
493 goto out;
494 }
495 MTK_WRITE_4(sc, GPIO_PIOTOG, (1u << pin));
496
497 out:
498 MTK_GPIO_UNLOCK(sc);
499
500 return (ret);
501 }
502
503 static int
mtk_gpio_pic_map_fdt(struct mtk_gpio_softc * sc,struct intr_map_data_fdt * daf,u_int * irqp,uint32_t * modep)504 mtk_gpio_pic_map_fdt(struct mtk_gpio_softc *sc,
505 struct intr_map_data_fdt *daf, u_int *irqp, uint32_t *modep)
506 {
507 u_int irq;
508
509 if (daf->ncells != 1) {
510 device_printf(sc->dev, "Invalid #interrupt-cells\n");
511 return (EINVAL);
512 }
513
514 irq = daf->cells[0];
515
516 if (irq >= sc->num_pins) {
517 device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
518 return (EINVAL);
519 }
520
521 *irqp = irq;
522 if (modep != NULL)
523 *modep = GPIO_INTR_EDGE_BOTH;
524
525 return (0);
526 }
527
528 static int
mtk_gpio_pic_map_gpio(struct mtk_gpio_softc * sc,struct intr_map_data_gpio * dag,u_int * irqp,uint32_t * modep)529 mtk_gpio_pic_map_gpio(struct mtk_gpio_softc *sc,
530 struct intr_map_data_gpio *dag, u_int *irqp, uint32_t *modep)
531 {
532 u_int irq;
533
534 irq = dag->gpio_pin_num;
535 if (irq >= sc->num_pins) {
536 device_printf(sc->dev, "Invalid interrupt number %u\n", irq);
537 return (EINVAL);
538 }
539
540 *irqp = irq;
541 if (modep != NULL)
542 *modep = dag->gpio_intr_mode;
543
544 return (0);
545 }
546
547 static int
mtk_gpio_pic_map_intr(device_t dev,struct intr_map_data * data,struct intr_irqsrc ** isrcp)548 mtk_gpio_pic_map_intr(device_t dev, struct intr_map_data *data,
549 struct intr_irqsrc **isrcp)
550 {
551 int error;
552 u_int irq;
553 struct mtk_gpio_softc *sc;
554
555 sc = device_get_softc(dev);
556 switch (data->type) {
557 case INTR_MAP_DATA_FDT:
558 error = (mtk_gpio_pic_map_fdt(sc,
559 (struct intr_map_data_fdt *)data, &irq, NULL));
560 break;
561 case INTR_MAP_DATA_GPIO:
562 error = (mtk_gpio_pic_map_gpio(sc,
563 (struct intr_map_data_gpio *)data, &irq, NULL));
564 break;
565 default:
566 error = EINVAL;
567 break;
568 }
569
570 if (error != 0) {
571 device_printf(dev, "Invalid map type\n");
572 return (error);
573 }
574
575 *isrcp = PIC_INTR_ISRC(sc, irq);
576 return (0);
577 }
578
579 static void
mtk_gpio_pic_enable_intr(device_t dev,struct intr_irqsrc * isrc)580 mtk_gpio_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
581 {
582 struct mtk_gpio_softc *sc;
583 struct mtk_gpio_pin_irqsrc *pisrc;
584 uint32_t pin, mask, val;
585
586 sc = device_get_softc(dev);
587
588 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
589 pin = pisrc->irq;
590 mask = 1u << pin;
591
592 MTK_GPIO_LOCK(sc);
593
594 if (sc->pins[pin].intr_polarity == INTR_POLARITY_LOW) {
595 val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
596 MTK_WRITE_4(sc, GPIO_PIORENA, val);
597 val = MTK_READ_4(sc, GPIO_PIOFENA) | mask;
598 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
599 } else {
600 val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
601 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
602 val = MTK_READ_4(sc, GPIO_PIORENA) | mask;
603 MTK_WRITE_4(sc, GPIO_PIORENA, val);
604 }
605
606 MTK_GPIO_UNLOCK(sc);
607 }
608
609 static void
mtk_gpio_pic_disable_intr(device_t dev,struct intr_irqsrc * isrc)610 mtk_gpio_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
611 {
612 struct mtk_gpio_softc *sc;
613 struct mtk_gpio_pin_irqsrc *pisrc;
614 uint32_t pin, mask, val;
615
616 sc = device_get_softc(dev);
617
618 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
619 pin = pisrc->irq;
620 mask = 1u << pin;
621
622 MTK_GPIO_LOCK(sc);
623
624 val = MTK_READ_4(sc, GPIO_PIORENA) & ~mask;
625 MTK_WRITE_4(sc, GPIO_PIORENA, val);
626 val = MTK_READ_4(sc, GPIO_PIOFENA) & ~mask;
627 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
628
629 MTK_GPIO_UNLOCK(sc);
630 }
631
632 static void
mtk_gpio_pic_pre_ithread(device_t dev,struct intr_irqsrc * isrc)633 mtk_gpio_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
634 {
635
636 mtk_gpio_pic_disable_intr(dev, isrc);
637 }
638
639 static void
mtk_gpio_pic_post_ithread(device_t dev,struct intr_irqsrc * isrc)640 mtk_gpio_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
641 {
642
643 mtk_gpio_pic_enable_intr(dev, isrc);
644 }
645
646 static void
mtk_gpio_pic_post_filter(device_t dev,struct intr_irqsrc * isrc)647 mtk_gpio_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
648 {
649 struct mtk_gpio_softc *sc;
650 struct mtk_gpio_pin_irqsrc *pisrc;
651
652 pisrc = (struct mtk_gpio_pin_irqsrc *)isrc;
653 sc = device_get_softc(dev);
654 MTK_GPIO_LOCK(sc);
655 MTK_WRITE_4(sc, GPIO_PIOINT, 1u << pisrc->irq);
656 MTK_GPIO_UNLOCK(sc);
657 }
658
659 static int
mtk_gpio_pic_setup_intr(device_t dev,struct intr_irqsrc * isrc,struct resource * res,struct intr_map_data * data)660 mtk_gpio_pic_setup_intr(device_t dev, struct intr_irqsrc *isrc,
661 struct resource *res, struct intr_map_data *data)
662 {
663 struct mtk_gpio_softc *sc;
664 uint32_t val;
665 int error;
666 uint32_t mode;
667 u_int irq;
668
669 if (data == NULL)
670 return (ENOTSUP);
671
672 sc = device_get_softc(dev);
673
674 switch (data->type) {
675 case INTR_MAP_DATA_FDT:
676 error = mtk_gpio_pic_map_fdt(sc,
677 (struct intr_map_data_fdt *)data, &irq, &mode);
678 break;
679 case INTR_MAP_DATA_GPIO:
680 error = mtk_gpio_pic_map_gpio(sc,
681 (struct intr_map_data_gpio *)data, &irq, &mode);
682 break;
683 default:
684 error = ENOTSUP;
685 break;
686 }
687
688 if (error != 0)
689 return (error);
690
691 MTK_GPIO_LOCK(sc);
692 if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_RISING) {
693 val = MTK_READ_4(sc, GPIO_PIORENA) | (1u << irq);
694 MTK_WRITE_4(sc, GPIO_PIORENA, val);
695 }
696 if (mode == GPIO_INTR_EDGE_BOTH || mode == GPIO_INTR_EDGE_FALLING) {
697 val = MTK_READ_4(sc, GPIO_PIOFENA) | (1u << irq);
698 MTK_WRITE_4(sc, GPIO_PIOFENA, val);
699 }
700 MTK_GPIO_UNLOCK(sc);
701 return (0);
702 }
703
704 static int
mtk_gpio_intr(void * arg)705 mtk_gpio_intr(void *arg)
706 {
707 struct mtk_gpio_softc *sc;
708 uint32_t i, interrupts;
709
710 sc = arg;
711 interrupts = MTK_READ_4(sc, GPIO_PIOINT);
712 MTK_WRITE_4(sc, GPIO_PIOINT, interrupts);
713
714 for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
715 if ((interrupts & 0x1) == 0)
716 continue;
717 if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
718 curthread->td_intr_frame) != 0) {
719 device_printf(sc->dev, "spurious interrupt %d\n", i);
720 }
721 }
722
723 return (FILTER_HANDLED);
724 }
725
726 static phandle_t
mtk_gpio_get_node(device_t bus,device_t dev)727 mtk_gpio_get_node(device_t bus, device_t dev)
728 {
729
730 /* We only have one child, the GPIO bus, which needs our own node. */
731 return (ofw_bus_get_node(bus));
732 }
733
734 static device_method_t mtk_gpio_methods[] = {
735 /* Device interface */
736 DEVMETHOD(device_probe, mtk_gpio_probe),
737 DEVMETHOD(device_attach, mtk_gpio_attach),
738 DEVMETHOD(device_detach, mtk_gpio_detach),
739
740 /* GPIO protocol */
741 DEVMETHOD(gpio_get_bus, mtk_gpio_get_bus),
742 DEVMETHOD(gpio_pin_max, mtk_gpio_pin_max),
743 DEVMETHOD(gpio_pin_getname, mtk_gpio_pin_getname),
744 DEVMETHOD(gpio_pin_getflags, mtk_gpio_pin_getflags),
745 DEVMETHOD(gpio_pin_getcaps, mtk_gpio_pin_getcaps),
746 DEVMETHOD(gpio_pin_setflags, mtk_gpio_pin_setflags),
747 DEVMETHOD(gpio_pin_get, mtk_gpio_pin_get),
748 DEVMETHOD(gpio_pin_set, mtk_gpio_pin_set),
749 DEVMETHOD(gpio_pin_toggle, mtk_gpio_pin_toggle),
750
751 /* Interrupt controller interface */
752 DEVMETHOD(pic_disable_intr, mtk_gpio_pic_disable_intr),
753 DEVMETHOD(pic_enable_intr, mtk_gpio_pic_enable_intr),
754 DEVMETHOD(pic_map_intr, mtk_gpio_pic_map_intr),
755 DEVMETHOD(pic_setup_intr, mtk_gpio_pic_setup_intr),
756 DEVMETHOD(pic_post_filter, mtk_gpio_pic_post_filter),
757 DEVMETHOD(pic_post_ithread, mtk_gpio_pic_post_ithread),
758 DEVMETHOD(pic_pre_ithread, mtk_gpio_pic_pre_ithread),
759
760 /* ofw_bus interface */
761 DEVMETHOD(ofw_bus_get_node, mtk_gpio_get_node),
762
763 DEVMETHOD_END
764 };
765
766 static driver_t mtk_gpio_driver = {
767 "gpio",
768 mtk_gpio_methods,
769 sizeof(struct mtk_gpio_softc),
770 };
771
772 static devclass_t mtk_gpio_devclass;
773
774 EARLY_DRIVER_MODULE(mtk_gpio_v1, simplebus, mtk_gpio_driver,
775 mtk_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
776