1 //===-- X86TargetParser - Parser for X86 features ---------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a target parser to recognise X86 hardware features. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_SUPPORT_X86TARGETPARSER_H 14 #define LLVM_SUPPORT_X86TARGETPARSER_H 15 16 #include "llvm/ADT/ArrayRef.h" 17 #include "llvm/ADT/StringMap.h" 18 19 namespace llvm { 20 template <typename T> class SmallVectorImpl; 21 class StringRef; 22 23 namespace X86 { 24 25 // This should be kept in sync with libcc/compiler-rt as its included by clang 26 // as a proxy for what's in libgcc/compiler-rt. 27 enum ProcessorVendors : unsigned { 28 VENDOR_DUMMY, 29 #define X86_VENDOR(ENUM, STRING) \ 30 ENUM, 31 #include "llvm/Support/X86TargetParser.def" 32 VENDOR_OTHER 33 }; 34 35 // This should be kept in sync with libcc/compiler-rt as its included by clang 36 // as a proxy for what's in libgcc/compiler-rt. 37 enum ProcessorTypes : unsigned { 38 CPU_TYPE_DUMMY, 39 #define X86_CPU_TYPE(ENUM, STRING) \ 40 ENUM, 41 #include "llvm/Support/X86TargetParser.def" 42 CPU_TYPE_MAX 43 }; 44 45 // This should be kept in sync with libcc/compiler-rt as its included by clang 46 // as a proxy for what's in libgcc/compiler-rt. 47 enum ProcessorSubtypes : unsigned { 48 CPU_SUBTYPE_DUMMY, 49 #define X86_CPU_SUBTYPE(ENUM, STRING) \ 50 ENUM, 51 #include "llvm/Support/X86TargetParser.def" 52 CPU_SUBTYPE_MAX 53 }; 54 55 // This should be kept in sync with libcc/compiler-rt as it should be used 56 // by clang as a proxy for what's in libgcc/compiler-rt. 57 enum ProcessorFeatures { 58 #define X86_FEATURE(ENUM, STRING) FEATURE_##ENUM, 59 #include "llvm/Support/X86TargetParser.def" 60 CPU_FEATURE_MAX 61 }; 62 63 enum CPUKind { 64 CK_None, 65 CK_i386, 66 CK_i486, 67 CK_WinChipC6, 68 CK_WinChip2, 69 CK_C3, 70 CK_i586, 71 CK_Pentium, 72 CK_PentiumMMX, 73 CK_PentiumPro, 74 CK_i686, 75 CK_Pentium2, 76 CK_Pentium3, 77 CK_PentiumM, 78 CK_C3_2, 79 CK_Yonah, 80 CK_Pentium4, 81 CK_Prescott, 82 CK_Nocona, 83 CK_Core2, 84 CK_Penryn, 85 CK_Bonnell, 86 CK_Silvermont, 87 CK_Goldmont, 88 CK_GoldmontPlus, 89 CK_Tremont, 90 CK_Nehalem, 91 CK_Westmere, 92 CK_SandyBridge, 93 CK_IvyBridge, 94 CK_Haswell, 95 CK_Broadwell, 96 CK_SkylakeClient, 97 CK_SkylakeServer, 98 CK_Cascadelake, 99 CK_Cooperlake, 100 CK_Cannonlake, 101 CK_IcelakeClient, 102 CK_Rocketlake, 103 CK_IcelakeServer, 104 CK_Tigerlake, 105 CK_SapphireRapids, 106 CK_Alderlake, 107 CK_KNL, 108 CK_KNM, 109 CK_Lakemont, 110 CK_K6, 111 CK_K6_2, 112 CK_K6_3, 113 CK_Athlon, 114 CK_AthlonXP, 115 CK_K8, 116 CK_K8SSE3, 117 CK_AMDFAM10, 118 CK_BTVER1, 119 CK_BTVER2, 120 CK_BDVER1, 121 CK_BDVER2, 122 CK_BDVER3, 123 CK_BDVER4, 124 CK_ZNVER1, 125 CK_ZNVER2, 126 CK_ZNVER3, 127 CK_x86_64, 128 CK_x86_64_v2, 129 CK_x86_64_v3, 130 CK_x86_64_v4, 131 CK_Geode, 132 }; 133 134 /// Parse \p CPU string into a CPUKind. Will only accept 64-bit capable CPUs if 135 /// \p Only64Bit is true. 136 CPUKind parseArchX86(StringRef CPU, bool Only64Bit = false); 137 CPUKind parseTuneCPU(StringRef CPU, bool Only64Bit = false); 138 139 /// Provide a list of valid CPU names. If \p Only64Bit is true, the list will 140 /// only contain 64-bit capable CPUs. 141 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values, 142 bool Only64Bit = false); 143 /// Provide a list of valid -mtune names. 144 void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values, 145 bool Only64Bit = false); 146 147 /// Get the key feature prioritizing target multiversioning. 148 ProcessorFeatures getKeyFeature(CPUKind Kind); 149 150 /// Fill in the features that \p CPU supports into \p Features. 151 void getFeaturesForCPU(StringRef CPU, SmallVectorImpl<StringRef> &Features); 152 153 /// Set or clear entries in \p Features that are implied to be enabled/disabled 154 /// by the provided \p Feature. 155 void updateImpliedFeatures(StringRef Feature, bool Enabled, 156 StringMap<bool> &Features); 157 158 uint64_t getCpuSupportsMask(ArrayRef<StringRef> FeatureStrs); 159 unsigned getFeaturePriority(ProcessorFeatures Feat); 160 161 } // namespace X86 162 } // namespace llvm 163 164 #endif 165