1 //===-- AArch64TargetParser - Parser for AArch64 features -------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements a target parser to recognise AArch64 hardware features 11 // such as FPU/CPU/ARCH and extension names. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_SUPPORT_AARCH64TARGETPARSERCOMMON_H 16 #define LLVM_SUPPORT_AARCH64TARGETPARSERCOMMON_H 17 18 #include "llvm/ADT/StringRef.h" 19 #include "llvm/ADT/Triple.h" 20 #include "llvm/Support/ARMTargetParser.h" 21 #include <vector> 22 23 // FIXME:This should be made into class design,to avoid dupplication. 24 namespace llvm { 25 namespace AArch64 { 26 27 // Arch extension modifiers for CPUs. 28 enum ArchExtKind : unsigned { 29 AEK_INVALID = 0, 30 AEK_NONE = 1, 31 AEK_CRC = 1 << 1, 32 AEK_CRYPTO = 1 << 2, 33 AEK_FP = 1 << 3, 34 AEK_SIMD = 1 << 4, 35 AEK_FP16 = 1 << 5, 36 AEK_PROFILE = 1 << 6, 37 AEK_RAS = 1 << 7, 38 AEK_LSE = 1 << 8, 39 AEK_SVE = 1 << 9, 40 AEK_DOTPROD = 1 << 10, 41 AEK_RCPC = 1 << 11, 42 AEK_RDM = 1 << 12, 43 AEK_SM4 = 1 << 13, 44 AEK_SHA3 = 1 << 14, 45 AEK_SHA2 = 1 << 15, 46 AEK_AES = 1 << 16, 47 AEK_FP16FML = 1 << 17, 48 AEK_RAND = 1 << 18, 49 AEK_MTE = 1 << 19, 50 AEK_SSBS = 1 << 20, 51 AEK_SB = 1 << 21, 52 AEK_PREDRES = 1 << 22, 53 }; 54 55 enum class ArchKind { 56 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID, 57 #include "AArch64TargetParser.def" 58 }; 59 60 const ARM::ArchNames<ArchKind> AArch64ARCHNames[] = { 61 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \ 62 ARCH_BASE_EXT) \ 63 {NAME, \ 64 sizeof(NAME) - 1, \ 65 CPU_ATTR, \ 66 sizeof(CPU_ATTR) - 1, \ 67 SUB_ARCH, \ 68 sizeof(SUB_ARCH) - 1, \ 69 ARM::FPUKind::ARCH_FPU, \ 70 ARCH_BASE_EXT, \ 71 AArch64::ArchKind::ID, \ 72 ARCH_ATTR}, 73 #include "AArch64TargetParser.def" 74 }; 75 76 const ARM::ExtName AArch64ARCHExtNames[] = { 77 #define AARCH64_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \ 78 {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE}, 79 #include "AArch64TargetParser.def" 80 }; 81 82 const ARM::CpuNames<ArchKind> AArch64CPUNames[] = { 83 #define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \ 84 {NAME, sizeof(NAME) - 1, AArch64::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT}, 85 #include "AArch64TargetParser.def" 86 }; 87 88 const ArchKind ArchKinds[] = { 89 #define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \ 90 ArchKind::ID, 91 #include "AArch64TargetParser.def" 92 }; 93 94 // FIXME: These should be moved to TargetTuple once it exists 95 bool getExtensionFeatures(unsigned Extensions, 96 std::vector<StringRef> &Features); 97 bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features); 98 99 StringRef getArchName(ArchKind AK); 100 unsigned getArchAttr(ArchKind AK); 101 StringRef getCPUAttr(ArchKind AK); 102 StringRef getSubArch(ArchKind AK); 103 StringRef getArchExtName(unsigned ArchExtKind); 104 StringRef getArchExtFeature(StringRef ArchExt); 105 106 // Information by Name 107 unsigned getDefaultFPU(StringRef CPU, ArchKind AK); 108 unsigned getDefaultExtensions(StringRef CPU, ArchKind AK); 109 StringRef getDefaultCPU(StringRef Arch); 110 ArchKind getCPUArchKind(StringRef CPU); 111 112 // Parser 113 ArchKind parseArch(StringRef Arch); 114 ArchExtKind parseArchExt(StringRef ArchExt); 115 ArchKind parseCPUArch(StringRef CPU); 116 // Used by target parser tests 117 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values); 118 119 bool isX18ReservedByDefault(const Triple &TT); 120 121 } // namespace AArch64 122 } // namespace llvm 123 124 #endif 125