1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019 Intel Corporation
3 */
4
5 #include <stdint.h>
6 #include <unistd.h>
7
8 #include <rte_bus_pci.h>
9 #include <rte_ethdev.h>
10 #include <rte_pci.h>
11 #include <rte_malloc.h>
12
13 #include <rte_mbuf.h>
14 #include <rte_sched.h>
15 #include <rte_ethdev_driver.h>
16 #include <rte_spinlock.h>
17
18 #include <rte_io.h>
19 #include <rte_rawdev.h>
20 #include <rte_rawdev_pmd.h>
21 #include <rte_bus_ifpga.h>
22 #include <ifpga_logs.h>
23
24 #include "ipn3ke_rawdev_api.h"
25 #include "ipn3ke_flow.h"
26 #include "ipn3ke_logs.h"
27 #include "ipn3ke_ethdev.h"
28
29 static int ipn3ke_rpst_scan_num;
30 static pthread_t ipn3ke_rpst_scan_thread;
31
32 /** Double linked list of representor port. */
33 TAILQ_HEAD(ipn3ke_rpst_list, ipn3ke_rpst);
34
35 static struct ipn3ke_rpst_list ipn3ke_rpst_list =
36 TAILQ_HEAD_INITIALIZER(ipn3ke_rpst_list);
37
38 static rte_spinlock_t ipn3ke_link_notify_list_lk = RTE_SPINLOCK_INITIALIZER;
39
40 static int
41 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst);
42
43 static int
ipn3ke_rpst_dev_infos_get(struct rte_eth_dev * ethdev,struct rte_eth_dev_info * dev_info)44 ipn3ke_rpst_dev_infos_get(struct rte_eth_dev *ethdev,
45 struct rte_eth_dev_info *dev_info)
46 {
47 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
48 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
49
50 dev_info->speed_capa =
51 (hw->retimer.mac_type ==
52 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) ?
53 ETH_LINK_SPEED_10G :
54 ((hw->retimer.mac_type ==
55 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) ?
56 ETH_LINK_SPEED_25G :
57 ETH_LINK_SPEED_AUTONEG);
58
59 dev_info->max_rx_queues = 1;
60 dev_info->max_tx_queues = 1;
61 dev_info->min_rx_bufsize = IPN3KE_AFU_BUF_SIZE_MIN;
62 dev_info->max_rx_pktlen = IPN3KE_AFU_FRAME_SIZE_MAX;
63 dev_info->max_mac_addrs = hw->port_num;
64 dev_info->max_vfs = 0;
65 dev_info->default_txconf = (struct rte_eth_txconf) {
66 .offloads = 0,
67 };
68 dev_info->rx_queue_offload_capa = 0;
69 dev_info->rx_offload_capa =
70 DEV_RX_OFFLOAD_VLAN_STRIP |
71 DEV_RX_OFFLOAD_QINQ_STRIP |
72 DEV_RX_OFFLOAD_IPV4_CKSUM |
73 DEV_RX_OFFLOAD_UDP_CKSUM |
74 DEV_RX_OFFLOAD_TCP_CKSUM |
75 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
76 DEV_RX_OFFLOAD_VLAN_EXTEND |
77 DEV_RX_OFFLOAD_VLAN_FILTER |
78 DEV_RX_OFFLOAD_JUMBO_FRAME;
79
80 dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE;
81 dev_info->tx_offload_capa =
82 DEV_TX_OFFLOAD_VLAN_INSERT |
83 DEV_TX_OFFLOAD_QINQ_INSERT |
84 DEV_TX_OFFLOAD_IPV4_CKSUM |
85 DEV_TX_OFFLOAD_UDP_CKSUM |
86 DEV_TX_OFFLOAD_TCP_CKSUM |
87 DEV_TX_OFFLOAD_SCTP_CKSUM |
88 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
89 DEV_TX_OFFLOAD_TCP_TSO |
90 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
91 DEV_TX_OFFLOAD_GRE_TNL_TSO |
92 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
93 DEV_TX_OFFLOAD_GENEVE_TNL_TSO |
94 DEV_TX_OFFLOAD_MULTI_SEGS |
95 dev_info->tx_queue_offload_capa;
96
97 dev_info->dev_capa =
98 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
99 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
100
101 dev_info->switch_info.name = ethdev->device->name;
102 dev_info->switch_info.domain_id = rpst->switch_domain_id;
103 dev_info->switch_info.port_id = rpst->port_id;
104
105 return 0;
106 }
107
108 static int
ipn3ke_rpst_dev_configure(__rte_unused struct rte_eth_dev * dev)109 ipn3ke_rpst_dev_configure(__rte_unused struct rte_eth_dev *dev)
110 {
111 return 0;
112 }
113
114 static int
ipn3ke_rpst_dev_start(struct rte_eth_dev * dev)115 ipn3ke_rpst_dev_start(struct rte_eth_dev *dev)
116 {
117 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
118 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
119 struct rte_rawdev *rawdev;
120 uint64_t base_mac;
121 uint32_t val;
122 char attr_name[IPN3KE_RAWDEV_ATTR_LEN_MAX];
123
124 rawdev = hw->rawdev;
125
126 memset(attr_name, 0, sizeof(attr_name));
127 snprintf(attr_name, IPN3KE_RAWDEV_ATTR_LEN_MAX, "%s",
128 "LineSideBaseMAC");
129 rawdev->dev_ops->attr_get(rawdev, attr_name, &base_mac);
130 rte_ether_addr_copy((struct rte_ether_addr *)&base_mac,
131 &rpst->mac_addr);
132
133 rte_ether_addr_copy(&rpst->mac_addr, &dev->data->mac_addrs[0]);
134 dev->data->mac_addrs->addr_bytes[RTE_ETHER_ADDR_LEN - 1] =
135 (uint8_t)rpst->port_id + 1;
136
137 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
138 /* Set mac address */
139 rte_memcpy(((char *)(&val)),
140 (char *)&dev->data->mac_addrs->addr_bytes[0],
141 sizeof(uint32_t));
142 (*hw->f_mac_write)(hw,
143 val,
144 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
145 rpst->port_id,
146 0);
147 rte_memcpy(((char *)(&val)),
148 (char *)&dev->data->mac_addrs->addr_bytes[4],
149 sizeof(uint16_t));
150 (*hw->f_mac_write)(hw,
151 val,
152 IPN3KE_MAC_PRIMARY_MAC_ADDR1,
153 rpst->port_id,
154 0);
155
156 /* Enable the TX path */
157 ipn3ke_xmac_tx_enable(hw, rpst->port_id, 0);
158
159 /* Disables source address override */
160 ipn3ke_xmac_smac_ovd_dis(hw, rpst->port_id, 0);
161
162 /* Enable the RX path */
163 ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
164
165 /* Clear line side TX statistics counters */
166 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
167
168 /* Clear line side RX statistics counters */
169 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
170
171 /* Clear NIC side TX statistics counters */
172 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
173
174 /* Clear NIC side RX statistics counters */
175 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
176 } else if (hw->retimer.mac_type ==
177 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
178 /* Clear line side TX statistics counters */
179 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
180
181 /* Clear line side RX statistics counters */
182 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
183
184 /* Clear NIC side TX statistics counters */
185 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
186
187 /* Clear NIC side RX statistics counters */
188 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
189 }
190
191 ipn3ke_rpst_link_update(dev, 0);
192
193 return 0;
194 }
195
196 static int
ipn3ke_rpst_dev_stop(struct rte_eth_dev * dev)197 ipn3ke_rpst_dev_stop(struct rte_eth_dev *dev)
198 {
199 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
200 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
201
202 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
203 /* Disable the TX path */
204 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
205
206 /* Disable the RX path */
207 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
208 }
209
210 return 0;
211 }
212
213 static int
ipn3ke_rpst_dev_close(struct rte_eth_dev * dev)214 ipn3ke_rpst_dev_close(struct rte_eth_dev *dev)
215 {
216 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
217 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
218
219 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
220 return 0;
221
222 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
223 /* Disable the TX path */
224 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
225
226 /* Disable the RX path */
227 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
228 }
229
230 return 0;
231 }
232
233 /*
234 * Reset PF device only to re-initialize resources in PMD layer
235 */
236 static int
ipn3ke_rpst_dev_reset(struct rte_eth_dev * dev)237 ipn3ke_rpst_dev_reset(struct rte_eth_dev *dev)
238 {
239 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
240 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
241
242 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
243 /* Disable the TX path */
244 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
245
246 /* Disable the RX path */
247 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
248 }
249
250 return 0;
251 }
252
253 static int
ipn3ke_rpst_rx_queue_start(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t rx_queue_id)254 ipn3ke_rpst_rx_queue_start(__rte_unused struct rte_eth_dev *dev,
255 __rte_unused uint16_t rx_queue_id)
256 {
257 return 0;
258 }
259
260 static int
ipn3ke_rpst_rx_queue_stop(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t rx_queue_id)261 ipn3ke_rpst_rx_queue_stop(__rte_unused struct rte_eth_dev *dev,
262 __rte_unused uint16_t rx_queue_id)
263 {
264 return 0;
265 }
266
267 static int
ipn3ke_rpst_tx_queue_start(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t tx_queue_id)268 ipn3ke_rpst_tx_queue_start(__rte_unused struct rte_eth_dev *dev,
269 __rte_unused uint16_t tx_queue_id)
270 {
271 return 0;
272 }
273
274 static int
ipn3ke_rpst_tx_queue_stop(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t tx_queue_id)275 ipn3ke_rpst_tx_queue_stop(__rte_unused struct rte_eth_dev *dev,
276 __rte_unused uint16_t tx_queue_id)
277 {
278 return 0;
279 }
280
281 static int
ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t queue_idx,__rte_unused uint16_t nb_desc,__rte_unused unsigned int socket_id,__rte_unused const struct rte_eth_rxconf * rx_conf,__rte_unused struct rte_mempool * mp)282 ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev *dev,
283 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,
284 __rte_unused unsigned int socket_id,
285 __rte_unused const struct rte_eth_rxconf *rx_conf,
286 __rte_unused struct rte_mempool *mp)
287 {
288 return 0;
289 }
290
291 static void
ipn3ke_rpst_rx_queue_release(__rte_unused void * rxq)292 ipn3ke_rpst_rx_queue_release(__rte_unused void *rxq)
293 {
294 }
295
296 static int
ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t queue_idx,__rte_unused uint16_t nb_desc,__rte_unused unsigned int socket_id,__rte_unused const struct rte_eth_txconf * tx_conf)297 ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev *dev,
298 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,
299 __rte_unused unsigned int socket_id,
300 __rte_unused const struct rte_eth_txconf *tx_conf)
301 {
302 return 0;
303 }
304
305 static void
ipn3ke_rpst_tx_queue_release(__rte_unused void * txq)306 ipn3ke_rpst_tx_queue_release(__rte_unused void *txq)
307 {
308 }
309
310 /* Statistics collected by each port, VSI, VEB, and S-channel */
311 struct ipn3ke_rpst_eth_stats {
312 uint64_t tx_bytes; /* gotc */
313 uint64_t tx_multicast; /* mptc */
314 uint64_t tx_broadcast; /* bptc */
315 uint64_t tx_unicast; /* uptc */
316 uint64_t tx_discards; /* tdpc */
317 uint64_t tx_errors; /* tepc */
318 uint64_t rx_bytes; /* gorc */
319 uint64_t rx_multicast; /* mprc */
320 uint64_t rx_broadcast; /* bprc */
321 uint64_t rx_unicast; /* uprc */
322 uint64_t rx_discards; /* rdpc */
323 uint64_t rx_unknown_protocol; /* rupp */
324 };
325
326 /* store statistics names and its offset in stats structure */
327 struct ipn3ke_rpst_xstats_name_offset {
328 char name[RTE_ETH_XSTATS_NAME_SIZE];
329 unsigned int offset;
330 };
331
332 static const struct ipn3ke_rpst_xstats_name_offset
333 ipn3ke_rpst_stats_strings[] = {
334 {"tx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
335 tx_multicast)},
336 {"tx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
337 tx_broadcast)},
338 {"tx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
339 tx_unicast)},
340 {"tx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats,
341 tx_discards)},
342 {"rx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
343 rx_multicast)},
344 {"rx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
345 rx_broadcast)},
346 {"rx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
347 rx_unicast)},
348 {"rx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats,
349 rx_discards)},
350 {"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
351 rx_unknown_protocol)},
352 };
353
354 #define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
355 sizeof(ipn3ke_rpst_stats_strings[0]))
356
357 #define IPN3KE_RPST_PRIO_XSTATS_CNT 8
358
359 /* Statistics collected by the MAC */
360 struct ipn3ke_rpst_hw_port_stats {
361 /* eth stats collected by the port */
362 struct ipn3ke_rpst_eth_stats eth;
363
364 /* additional port specific stats */
365 uint64_t tx_dropped_link_down;
366 uint64_t crc_errors;
367 uint64_t illegal_bytes;
368 uint64_t error_bytes;
369 uint64_t mac_local_faults;
370 uint64_t mac_remote_faults;
371 uint64_t rx_length_errors;
372 uint64_t link_xon_rx;
373 uint64_t link_xoff_rx;
374 uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
375 uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
376 uint64_t link_xon_tx;
377 uint64_t link_xoff_tx;
378 uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
379 uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
380 uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
381 uint64_t rx_size_64;
382 uint64_t rx_size_65_127;
383 uint64_t rx_size_128_255;
384 uint64_t rx_size_256_511;
385 uint64_t rx_size_512_1023;
386 uint64_t rx_size_1024_1518;
387 uint64_t rx_size_big;
388 uint64_t rx_undersize;
389 uint64_t rx_fragments;
390 uint64_t rx_oversize;
391 uint64_t rx_jabber;
392 uint64_t tx_size_64;
393 uint64_t tx_size_65_127;
394 uint64_t tx_size_128_255;
395 uint64_t tx_size_256_511;
396 uint64_t tx_size_512_1023;
397 uint64_t tx_size_1024_1518;
398 uint64_t tx_size_1519_to_max;
399 uint64_t mac_short_packet_dropped;
400 uint64_t checksum_error;
401 /* flow director stats */
402 uint64_t fd_atr_match;
403 uint64_t fd_sb_match;
404 uint64_t fd_atr_tunnel_match;
405 uint32_t fd_atr_status;
406 uint32_t fd_sb_status;
407 /* EEE LPI */
408 uint32_t tx_lpi_status;
409 uint32_t rx_lpi_status;
410 uint64_t tx_lpi_count;
411 uint64_t rx_lpi_count;
412 };
413
414 static const struct ipn3ke_rpst_xstats_name_offset
415 ipn3ke_rpst_hw_port_strings[] = {
416 {"tx_link_down_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats,
417 tx_dropped_link_down)},
418 {"rx_crc_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
419 crc_errors)},
420 {"rx_illegal_byte_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
421 illegal_bytes)},
422 {"rx_error_bytes", offsetof(struct ipn3ke_rpst_hw_port_stats,
423 error_bytes)},
424 {"mac_local_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
425 mac_local_faults)},
426 {"mac_remote_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
427 mac_remote_faults)},
428 {"rx_length_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
429 rx_length_errors)},
430 {"tx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
431 link_xon_tx)},
432 {"rx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
433 link_xon_rx)},
434 {"tx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
435 link_xoff_tx)},
436 {"rx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
437 link_xoff_rx)},
438 {"rx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
439 rx_size_64)},
440 {"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
441 rx_size_65_127)},
442 {"rx_size_128_to_255_packets",
443 offsetof(struct ipn3ke_rpst_hw_port_stats,
444 rx_size_128_255)},
445 {"rx_size_256_to_511_packets",
446 offsetof(struct ipn3ke_rpst_hw_port_stats,
447 rx_size_256_511)},
448 {"rx_size_512_to_1023_packets",
449 offsetof(struct ipn3ke_rpst_hw_port_stats,
450 rx_size_512_1023)},
451 {"rx_size_1024_to_1518_packets",
452 offsetof(struct ipn3ke_rpst_hw_port_stats,
453 rx_size_1024_1518)},
454 {"rx_size_1519_to_max_packets",
455 offsetof(struct ipn3ke_rpst_hw_port_stats,
456 rx_size_big)},
457 {"rx_undersized_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
458 rx_undersize)},
459 {"rx_oversize_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
460 rx_oversize)},
461 {"rx_mac_short_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats,
462 mac_short_packet_dropped)},
463 {"rx_fragmented_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
464 rx_fragments)},
465 {"rx_jabber_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
466 rx_jabber)},
467 {"tx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
468 tx_size_64)},
469 {"tx_size_65_to_127_packets",
470 offsetof(struct ipn3ke_rpst_hw_port_stats,
471 tx_size_65_127)},
472 {"tx_size_128_to_255_packets",
473 offsetof(struct ipn3ke_rpst_hw_port_stats,
474 tx_size_128_255)},
475 {"tx_size_256_to_511_packets",
476 offsetof(struct ipn3ke_rpst_hw_port_stats,
477 tx_size_256_511)},
478 {"tx_size_512_to_1023_packets",
479 offsetof(struct ipn3ke_rpst_hw_port_stats,
480 tx_size_512_1023)},
481 {"tx_size_1024_to_1518_packets",
482 offsetof(struct ipn3ke_rpst_hw_port_stats,
483 tx_size_1024_1518)},
484 {"tx_size_1519_to_max_packets",
485 offsetof(struct ipn3ke_rpst_hw_port_stats,
486 tx_size_1519_to_max)},
487 {"rx_flow_director_atr_match_packets",
488 offsetof(struct ipn3ke_rpst_hw_port_stats,
489 fd_atr_match)},
490 {"rx_flow_director_sb_match_packets",
491 offsetof(struct ipn3ke_rpst_hw_port_stats,
492 fd_sb_match)},
493 {"tx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats,
494 tx_lpi_status)},
495 {"rx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats,
496 rx_lpi_status)},
497 {"tx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats,
498 tx_lpi_count)},
499 {"rx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats,
500 rx_lpi_count)},
501 };
502
503 #define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
504 / sizeof(ipn3ke_rpst_hw_port_strings[0]))
505
506 static const struct ipn3ke_rpst_xstats_name_offset
507 ipn3ke_rpst_rxq_prio_strings[] = {
508 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
509 priority_xon_rx)},
510 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
511 priority_xoff_rx)},
512 };
513
514 #define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
515 / sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
516
517 static const struct ipn3ke_rpst_xstats_name_offset
518 ipn3ke_rpst_txq_prio_strings[] = {
519 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
520 priority_xon_tx)},
521 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
522 priority_xoff_tx)},
523 {"xon_to_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
524 priority_xon_2_xoff)},
525 };
526
527 #define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
528 / sizeof(ipn3ke_rpst_txq_prio_strings[0]))
529
530 static uint32_t
ipn3ke_rpst_xstats_calc_num(void)531 ipn3ke_rpst_xstats_calc_num(void)
532 {
533 return IPN3KE_RPST_ETH_XSTATS_CNT
534 + IPN3KE_RPST_HW_PORT_XSTATS_CNT
535 + (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
536 * IPN3KE_RPST_PRIO_XSTATS_CNT)
537 + (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
538 * IPN3KE_RPST_PRIO_XSTATS_CNT);
539 }
540
541 static void
ipn3ke_rpst_25g_nic_side_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)542 ipn3ke_rpst_25g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw,
543 uint16_t port_id)
544 {
545 uint32_t tmp = 0x00000001;
546 /* Bit[0]: Software can set this bit to the value of 1
547 * to reset all of the TX statistics registers at the same time.
548 * This bit is selfclearing.
549 */
550 (*hw->f_mac_write)(hw,
551 tmp,
552 IPN3KE_25G_TX_STATISTICS_CONFIG,
553 port_id,
554 1);
555
556 while (tmp & 0x00000001) {
557 tmp = 0x00000000;
558 (*hw->f_mac_read)(hw,
559 &tmp,
560 IPN3KE_25G_TX_STATISTICS_CONFIG,
561 port_id,
562 1);
563 if (tmp & 0x00000001)
564 usleep(5);
565 else
566 return;
567 }
568 }
569
570 static void
ipn3ke_rpst_25g_nic_side_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)571 ipn3ke_rpst_25g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw,
572 uint16_t port_id)
573 {
574 uint32_t tmp = 0x00000001;
575 /* Bit[0]: Software can set this bit to the value of 1
576 * to reset all of the RX statistics registers at the same time.
577 * This bit is selfclearing.
578 */
579 (*hw->f_mac_write)(hw,
580 tmp,
581 IPN3KE_25G_RX_STATISTICS_CONFIG,
582 port_id,
583 1);
584
585 while (tmp & 0x00000001) {
586 tmp = 0x00000000;
587 (*hw->f_mac_read)(hw,
588 &tmp,
589 IPN3KE_25G_RX_STATISTICS_CONFIG,
590 port_id,
591 1);
592 if (tmp & 0x00000001)
593 usleep(5);
594 else
595 return;
596 }
597 }
598
599 static void
ipn3ke_rpst_10g_nic_side_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)600 ipn3ke_rpst_10g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw,
601 uint16_t port_id)
602 {
603 uint32_t tmp;
604
605 /*Bit [0]: Set this register to 1 to clear all TX statistics
606 *counters.
607 *The IP core clears this bit when all counters are cleared.
608 *Bits [31:1]: Reserved.
609 */
610 tmp = 0x00000000;
611 (*hw->f_mac_read)(hw,
612 &tmp,
613 IPN3KE_10G_TX_STATS_CLR,
614 port_id,
615 1);
616 tmp |= 0x00000001;
617 (*hw->f_mac_write)(hw,
618 tmp,
619 IPN3KE_10G_TX_STATS_CLR,
620 port_id,
621 1);
622 }
623
624 static void
ipn3ke_rpst_10g_nic_side_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)625 ipn3ke_rpst_10g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw,
626 uint16_t port_id)
627 {
628 uint32_t tmp;
629
630 /*Bit [0]: Set this register to 1 to clear all RX statistics
631 *counters.
632 *The IP core clears this bit when all counters are cleared.
633 *Bits [31:1]: Reserved
634 */
635 tmp = 0x00000000;
636 (*hw->f_mac_read)(hw,
637 &tmp,
638 IPN3KE_10G_RX_STATS_CLR,
639 port_id,
640 1);
641 tmp |= 0x00000001;
642 (*hw->f_mac_write)(hw,
643 tmp,
644 IPN3KE_10G_RX_STATS_CLR,
645 port_id,
646 1);
647 }
648
649 static uint64_t
ipn3ke_rpst_read_64bits_statistics_register(uint32_t addr_lo,uint32_t addr_hi,struct ipn3ke_hw * hw,uint16_t port_id)650 ipn3ke_rpst_read_64bits_statistics_register(uint32_t addr_lo,
651 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id)
652 {
653 uint32_t statistics_lo = 0x00000000;
654 uint32_t statistics_hi = 0x00000000;
655 uint64_t statistics = 0x0000000000000000;
656
657 (*hw->f_mac_read)(hw,
658 &statistics_lo,
659 addr_lo,
660 port_id,
661 0);
662
663 (*hw->f_mac_read)(hw,
664 &statistics_hi,
665 addr_hi,
666 port_id,
667 0);
668
669 statistics += statistics_hi;
670 statistics = statistics << IPN3KE_REGISTER_WIDTH;
671 statistics += statistics_lo;
672 return statistics;
673
674 }
675
676 static int
ipn3ke_rpst_read_25g_lineside_stats_registers(struct ipn3ke_hw * hw,uint16_t port_id,struct ipn3ke_rpst_hw_port_stats * hw_stats)677 ipn3ke_rpst_read_25g_lineside_stats_registers
678 (struct ipn3ke_hw *hw,
679 uint16_t port_id,
680 struct ipn3ke_rpst_hw_port_stats *hw_stats)
681 {
682 uint32_t tmp;
683 uint64_t statistics;
684
685 memset(hw_stats, 0, sizeof(*hw_stats));
686
687 /*check Tx statistics is real time.
688 *if statistics has been paused, make it real time.
689 */
690 tmp = 0x00000000;
691 (*hw->f_mac_read)(hw,
692 &tmp,
693 IPN3KE_25G_TX_STATISTICS_CONFIG,
694 port_id,
695 0);
696
697 if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
698 tmp &= 0xfffffffb;
699 (*hw->f_mac_write)(hw,
700 tmp,
701 IPN3KE_25G_TX_STATISTICS_CONFIG,
702 port_id,
703 0);
704 }
705
706 tmp = 0x00000000;
707 (*hw->f_mac_read)(hw,
708 &tmp,
709 IPN3KE_25G_TX_STATISTICS_STATUS,
710 port_id,
711 0);
712 if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
713 tmp = 0x00000000;
714 (*hw->f_mac_read)(hw,
715 &tmp,
716 IPN3KE_25G_TX_STATISTICS_CONFIG,
717 port_id,
718 0);
719 tmp &= 0xfffffffb;
720 (*hw->f_mac_write)(hw,
721 tmp,
722 IPN3KE_25G_TX_STATISTICS_CONFIG,
723 port_id,
724 0);
725 }
726
727 /*check Rx statistics is real time.
728 *if statistics has been paused, make it real time.
729 */
730 tmp = 0x00000000;
731 (*hw->f_mac_read)(hw,
732 &tmp,
733 IPN3KE_25G_RX_STATISTICS_CONFIG,
734 port_id,
735 0);
736 if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
737 tmp &= 0xfffffffb;
738 (*hw->f_mac_write)(hw,
739 tmp,
740 IPN3KE_25G_RX_STATISTICS_CONFIG,
741 port_id,
742 0);
743 }
744
745 tmp = 0x00000000;
746 (*hw->f_mac_read)(hw,
747 &tmp,
748 IPN3KE_25G_RX_STATISTICS_STATUS,
749 port_id,
750 0);
751
752 if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
753 tmp = 0x00000000;
754 (*hw->f_mac_read)(hw,
755 &tmp,
756 IPN3KE_25G_RX_STATISTICS_CONFIG,
757 port_id,
758 0);
759 tmp &= 0xfffffffb;
760 (*hw->f_mac_write)(hw,
761 tmp,
762 IPN3KE_25G_RX_STATISTICS_CONFIG,
763 port_id,
764 0);
765 }
766
767 /* pause Tx counter to read the statistics */
768 tmp = 0x00000000;
769 (*hw->f_mac_read)(hw,
770 &tmp,
771 IPN3KE_25G_TX_STATISTICS_CONFIG,
772 port_id,
773 0);
774 tmp |= 0x00000004;
775 (*hw->f_mac_write)(hw,
776 tmp,
777 IPN3KE_25G_TX_STATISTICS_CONFIG,
778 port_id,
779 0);
780
781 /* pause Rx counter to read the statistics */
782 tmp = 0x00000000;
783 (*hw->f_mac_read)(hw,
784 &tmp,
785 IPN3KE_25G_RX_STATISTICS_CONFIG,
786 port_id,
787 0);
788 tmp |= 0x00000004;
789 (*hw->f_mac_write)(hw,
790 tmp,
791 IPN3KE_25G_RX_STATISTICS_CONFIG,
792 port_id,
793 0);
794
795 /*Number of transmitted frames less than 64 bytes
796 *and reporting a CRC error
797 */
798 statistics = ipn3ke_rpst_read_64bits_statistics_register(
799 IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
800 IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
801 hw, port_id);
802 hw_stats->eth.tx_errors += statistics;
803 hw_stats->crc_errors += statistics;
804
805 /*Number of transmitted oversized frames reporting a CRC error*/
806 statistics = ipn3ke_rpst_read_64bits_statistics_register(
807 IPN3KE_25G_CNTR_TX_JABBERS_LO,
808 IPN3KE_25G_CNTR_TX_JABBERS_HI,
809 hw, port_id);
810 hw_stats->eth.tx_errors += statistics;
811 hw_stats->crc_errors += statistics;
812
813 /* Number of transmitted packets with FCS errors */
814 statistics = ipn3ke_rpst_read_64bits_statistics_register(
815 IPN3KE_25G_CNTR_TX_FCS_LO,
816 IPN3KE_25G_CNTR_TX_FCS_HI,
817 hw, port_id);
818 hw_stats->eth.tx_errors += statistics;
819 hw_stats->checksum_error += statistics;
820
821 /*Number of transmitted frames with a frame of length at
822 *least 64 reporting a CRC error
823 */
824 statistics = ipn3ke_rpst_read_64bits_statistics_register(
825 IPN3KE_25G_CNTR_TX_CRCERR_LO,
826 IPN3KE_25G_CNTR_TX_CRCERR_HI,
827 hw, port_id);
828 hw_stats->eth.tx_errors += statistics;
829 hw_stats->crc_errors += statistics;
830
831 /*Number of errored multicast frames transmitted,
832 *excluding control frames
833 */
834 statistics = ipn3ke_rpst_read_64bits_statistics_register(
835 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
836 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
837 hw, port_id);
838 hw_stats->eth.tx_errors += statistics;
839
840 /*Number of errored broadcast frames transmitted,
841 *excluding control frames
842 */
843 statistics = ipn3ke_rpst_read_64bits_statistics_register(
844 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
845 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
846 hw, port_id);
847 hw_stats->eth.tx_errors += statistics;
848
849 /*Number of errored unicast frames transmitted,
850 *excluding control frames
851 */
852 statistics = ipn3ke_rpst_read_64bits_statistics_register(
853 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
854 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
855 hw, port_id);
856 hw_stats->eth.tx_errors += statistics;
857
858 /* Number of errored multicast control frames transmitted */
859 statistics = ipn3ke_rpst_read_64bits_statistics_register(
860 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
861 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
862 hw, port_id);
863 hw_stats->eth.tx_errors += statistics;
864
865 /* Number of errored broadcast control frames transmitted */
866 statistics = ipn3ke_rpst_read_64bits_statistics_register(
867 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
868 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
869 hw, port_id);
870 hw_stats->eth.tx_errors += statistics;
871
872 /* Number of errored unicast control frames transmitted */
873 statistics = ipn3ke_rpst_read_64bits_statistics_register(
874 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
875 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
876 hw, port_id);
877 hw_stats->eth.tx_errors += statistics;
878
879 /* Number of errored pause frames transmitted */
880 statistics = ipn3ke_rpst_read_64bits_statistics_register(
881 IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
882 IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
883 hw, port_id);
884 hw_stats->eth.tx_errors += statistics;
885
886 /*Number of 64-byte transmitted frames,
887 *including the CRC field but excluding the preamble
888 *and SFD bytes
889 */
890 statistics = ipn3ke_rpst_read_64bits_statistics_register(
891 IPN3KE_25G_CNTR_TX_64B_LO,
892 IPN3KE_25G_CNTR_TX_64B_HI,
893 hw, port_id);
894 hw_stats->tx_size_64 += statistics;
895
896 /* Number of transmitted frames between 65 and 127 bytes */
897 statistics = ipn3ke_rpst_read_64bits_statistics_register(
898 IPN3KE_25G_CNTR_TX_65_127B_LO,
899 IPN3KE_25G_CNTR_TX_65_127B_HI,
900 hw, port_id);
901 hw_stats->tx_size_65_127 += statistics;
902
903 /* Number of transmitted frames between 128 and 255 bytes */
904 statistics = ipn3ke_rpst_read_64bits_statistics_register(
905 IPN3KE_25G_CNTR_TX_128_255B_LO,
906 IPN3KE_25G_CNTR_TX_128_255B_HI,
907 hw, port_id);
908 hw_stats->tx_size_128_255 += statistics;
909
910 /* Number of transmitted frames between 256 and 511 bytes */
911 statistics = ipn3ke_rpst_read_64bits_statistics_register(
912 IPN3KE_25G_CNTR_TX_256_511B_LO,
913 IPN3KE_25G_CNTR_TX_256_511B_HI,
914 hw, port_id);
915 hw_stats->tx_size_256_511 += statistics;
916
917 /* Number of transmitted frames between 512 and 1023 bytes */
918 statistics = ipn3ke_rpst_read_64bits_statistics_register(
919 IPN3KE_25G_CNTR_TX_512_1023B_LO,
920 IPN3KE_25G_CNTR_TX_512_1023B_HI,
921 hw, port_id);
922 hw_stats->tx_size_512_1023 += statistics;
923
924 /* Number of transmitted frames between 1024 and 1518 bytes */
925 statistics = ipn3ke_rpst_read_64bits_statistics_register(
926 IPN3KE_25G_CNTR_TX_1024_1518B_LO,
927 IPN3KE_25G_CNTR_TX_1024_1518B_HI,
928 hw, port_id);
929 hw_stats->tx_size_1024_1518 += statistics;
930
931 /*Number of transmitted frames of size between 1519 bytes
932 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
933 *register
934 */
935 statistics = ipn3ke_rpst_read_64bits_statistics_register(
936 IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
937 IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
938 hw, port_id);
939 hw_stats->tx_size_1519_to_max += statistics;
940
941 /*Number of oversized frames (frames with more bytes than the
942 *number specified in the MAX_TX_SIZE_CONFIG register)
943 *transmitted
944 */
945 statistics = ipn3ke_rpst_read_64bits_statistics_register(
946 IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
947 IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
948 hw, port_id);
949
950 /*Number of valid multicast frames transmitted,
951 *excluding control frames
952 */
953 statistics = ipn3ke_rpst_read_64bits_statistics_register(
954 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
955 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
956 hw, port_id);
957 hw_stats->eth.tx_multicast += statistics;
958
959 /*Number of valid broadcast frames transmitted,
960 *excluding control frames
961 */
962 statistics = ipn3ke_rpst_read_64bits_statistics_register(
963 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
964 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
965 hw, port_id);
966 hw_stats->eth.tx_broadcast += statistics;
967
968 /*Number of valid unicast frames transmitted,
969 *excluding control frames
970 */
971 statistics = ipn3ke_rpst_read_64bits_statistics_register(
972 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
973 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
974 hw, port_id);
975 hw_stats->eth.tx_unicast += statistics;
976
977 /*Number of valid multicast frames transmitted,
978 *excluding data frames
979 */
980 statistics = ipn3ke_rpst_read_64bits_statistics_register(
981 IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
982 IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
983 hw, port_id);
984 hw_stats->eth.tx_multicast += statistics;
985
986 /*Number of valid broadcast frames transmitted,
987 *excluding data frames
988 */
989 statistics = ipn3ke_rpst_read_64bits_statistics_register(
990 IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
991 IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
992 hw, port_id);
993 hw_stats->eth.tx_broadcast += statistics;
994
995 /*Number of valid unicast frames transmitted,
996 *excluding data frames
997 */
998 statistics = ipn3ke_rpst_read_64bits_statistics_register(
999 IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
1000 IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
1001 hw, port_id);
1002 hw_stats->eth.tx_unicast += statistics;
1003
1004 /* Number of valid pause frames transmitted */
1005 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1006 IPN3KE_25G_CNTR_TX_PAUSE_LO,
1007 IPN3KE_25G_CNTR_TX_PAUSE_HI,
1008 hw, port_id);
1009
1010 /*Number of transmitted runt packets. The IP core does not
1011 *transmit frames of length less than nine bytes.
1012 *The IP core pads frames of length nine bytes to 64 bytes to
1013 *extend them to 64 bytes. Therefore, this counter does not
1014 *increment in normal operating conditions.
1015 */
1016 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1017 IPN3KE_25G_CNTR_TX_RUNT_LO,
1018 IPN3KE_25G_CNTR_TX_RUNT_HI,
1019 hw, port_id);
1020
1021 /*Number of transmitted payload bytes in frames with no FCS,
1022 *undersized, oversized, or payload length errors.
1023 *If VLAN detection is turned off for the TX MAC (bit[1]
1024 *of the TX_MAC_CONTROL register at offset 0x40A has
1025 *the value of 1), the IP core counts the VLAN header bytes
1026 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
1027 *as payload bytes. This register is compliant with
1028 *the requirements for aOctetsTransmittedOK in section
1029 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
1030 */
1031 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1032 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
1033 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
1034 hw, port_id);
1035 hw_stats->eth.tx_bytes += statistics;
1036
1037 /*Number of transmitted bytes in frames with no FCS, undersized,
1038 *oversized, or payload length errors. This register is
1039 *compliant with the requirements for ifOutOctets in RFC3635
1040 *(Managed Objects for Ethernet-like Interface Types)
1041 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
1042 *Management Information Base (RMON)).
1043 */
1044 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1045 IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
1046 IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
1047 hw, port_id);
1048
1049 /*Number of received frames less than 64 bytes
1050 *and reporting a CRC error
1051 */
1052 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1053 IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
1054 IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
1055 hw, port_id);
1056 hw_stats->eth.rx_discards += statistics;
1057 hw_stats->crc_errors += statistics;
1058 hw_stats->rx_length_errors += statistics;
1059
1060 /* Number of received oversized frames reporting a CRC error */
1061 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1062 IPN3KE_25G_CNTR_RX_JABBERS_LO,
1063 IPN3KE_25G_CNTR_RX_JABBERS_HI,
1064 hw, port_id);
1065 hw_stats->eth.rx_discards += statistics;
1066 hw_stats->crc_errors += statistics;
1067 hw_stats->rx_length_errors += statistics;
1068
1069 /*Number of received packets with FCS errors.
1070 *This register maintains a count of the number of pulses
1071 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
1072 */
1073 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1074 IPN3KE_25G_CNTR_RX_FCS_LO,
1075 IPN3KE_25G_CNTR_RX_FCS_HI,
1076 hw, port_id);
1077 hw_stats->eth.rx_discards += statistics;
1078 hw_stats->checksum_error += statistics;
1079
1080 /*Number of received frames with a frame of length at least 64
1081 *with CRC error
1082 */
1083 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1084 IPN3KE_25G_CNTR_RX_CRCERR_LO,
1085 IPN3KE_25G_CNTR_RX_CRCERR_HI,
1086 hw, port_id);
1087 hw_stats->eth.rx_discards += statistics;
1088 hw_stats->crc_errors += statistics;
1089
1090 /*Number of errored multicast frames received,
1091 *excluding control frames
1092 */
1093 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1094 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
1095 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
1096 hw, port_id);
1097 hw_stats->eth.rx_discards += statistics;
1098
1099 /*Number of errored broadcast frames received,
1100 *excluding control frames
1101 */
1102 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1103 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
1104 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
1105 hw, port_id);
1106 hw_stats->eth.rx_discards += statistics;
1107
1108 /*Number of errored unicast frames received,
1109 *excluding control frames
1110 */
1111 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1112 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
1113 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
1114 hw, port_id);
1115 hw_stats->eth.rx_discards += statistics;
1116
1117 /* Number of errored multicast control frames received */
1118 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1119 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
1120 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
1121 hw, port_id);
1122 hw_stats->eth.rx_discards += statistics;
1123
1124 /* Number of errored broadcast control frames received */
1125 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1126 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
1127 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
1128 hw, port_id);
1129 hw_stats->eth.rx_discards += statistics;
1130
1131 /* Number of errored unicast control frames received */
1132 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1133 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
1134 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
1135 hw, port_id);
1136 hw_stats->eth.rx_discards += statistics;
1137
1138 /* Number of errored pause frames received */
1139 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1140 IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
1141 IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
1142 hw, port_id);
1143 hw_stats->eth.rx_discards += statistics;
1144
1145 /*Number of 64-byte received frames,
1146 *including the CRC field but excluding the preamble
1147 *and SFD bytes
1148 */
1149 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1150 IPN3KE_25G_CNTR_RX_64B_LO,
1151 IPN3KE_25G_CNTR_RX_64B_HI,
1152 hw, port_id);
1153 hw_stats->rx_size_64 += statistics;
1154
1155 /*Number of received frames between 65 and 127 bytes */
1156 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1157 IPN3KE_25G_CNTR_RX_65_127B_LO,
1158 IPN3KE_25G_CNTR_RX_65_127B_HI,
1159 hw, port_id);
1160 hw_stats->rx_size_65_127 += statistics;
1161
1162 /*Number of received frames between 128 and 255 bytes
1163 */
1164 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1165 IPN3KE_25G_CNTR_RX_128_255B_LO,
1166 IPN3KE_25G_CNTR_RX_128_255B_HI,
1167 hw, port_id);
1168 hw_stats->rx_size_128_255 += statistics;
1169
1170 /*Number of received frames between 256 and 511 bytes
1171 */
1172 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1173 IPN3KE_25G_CNTR_RX_256_511B_LO,
1174 IPN3KE_25G_CNTR_RX_256_511B_HI,
1175 hw, port_id);
1176 hw_stats->rx_size_256_511 += statistics;
1177
1178 /*Number of received frames between 512 and 1023 bytes
1179 */
1180 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1181 IPN3KE_25G_CNTR_RX_512_1023B_LO,
1182 IPN3KE_25G_CNTR_RX_512_1023B_HI,
1183 hw, port_id);
1184 hw_stats->rx_size_512_1023 += statistics;
1185
1186 /*Number of received frames between 1024 and 1518 bytes
1187 */
1188 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1189 IPN3KE_25G_CNTR_RX_1024_1518B_LO,
1190 IPN3KE_25G_CNTR_RX_1024_1518B_HI,
1191 hw, port_id);
1192 hw_stats->rx_size_1024_1518 += statistics;
1193
1194 /*Number of received frames of size between 1519 bytes
1195 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
1196 *register
1197 */
1198 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1199 IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
1200 IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
1201 hw, port_id);
1202 hw_stats->rx_size_big += statistics;
1203
1204 /*Number of oversized frames (frames with more bytes
1205 *than the number specified in the MAX_TX_SIZE_CONFIG register)
1206 *received
1207 */
1208 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1209 IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
1210 IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
1211 hw, port_id);
1212 hw_stats->rx_jabber += statistics;
1213
1214 /*Number of valid multicast frames received,
1215 *excluding control frames
1216 */
1217 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1218 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
1219 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
1220 hw, port_id);
1221 hw_stats->eth.rx_multicast += statistics;
1222
1223 /*Number of valid broadcast frames received,
1224 *excluding control frames
1225 */
1226 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1227 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
1228 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
1229 hw, port_id);
1230 hw_stats->eth.rx_broadcast += statistics;
1231
1232 /*Number of valid unicast frames received,
1233 *excluding control frames
1234 */
1235 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1236 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
1237 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
1238 hw, port_id);
1239 hw_stats->eth.rx_unicast += statistics;
1240
1241 /*Number of valid multicast frames received,
1242 *excluding data frames
1243 */
1244 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1245 IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
1246 IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
1247 hw, port_id);
1248 hw_stats->eth.rx_multicast += statistics;
1249
1250 /*Number of valid broadcast frames received,
1251 *excluding data frames
1252 */
1253 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1254 IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
1255 IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
1256 hw, port_id);
1257 hw_stats->eth.rx_broadcast += statistics;
1258
1259 /*Number of valid unicast frames received,
1260 *excluding data frames
1261 */
1262 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1263 IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
1264 IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
1265 hw, port_id);
1266 hw_stats->eth.rx_unicast += statistics;
1267
1268 /*Number of received pause frames, with or without error
1269 */
1270 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1271 IPN3KE_25G_CNTR_RX_PAUSE_LO,
1272 IPN3KE_25G_CNTR_RX_PAUSE_HI,
1273 hw, port_id);
1274
1275 /*Number of received runt packets. A runt is a packet of size
1276 *less than 64 bytes but greater than eight bytes.
1277 *If a packet is eight bytes or smaller, it is considered
1278 *a decoding error and not a runt frame, and the IP core
1279 *does not flag it nor count it as a runt.
1280 */
1281 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1282 IPN3KE_25G_CNTR_RX_RUNT_LO,
1283 IPN3KE_25G_CNTR_RX_RUNT_HI,
1284 hw, port_id);
1285
1286 /*Number of received payload bytes in frames with no FCS,
1287 *undersized, oversized, or payload length errors.
1288 *If VLAN detection is turned off for the RX MAC (bit [1] of the
1289 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
1290 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
1291 *8 bytes for stacked VLAN) as payload bytes.
1292 *This register is compliant with the requirements for
1293 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
1294 *802.3-2008
1295 */
1296 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1297 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
1298 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
1299 hw, port_id);
1300 hw_stats->eth.rx_bytes += statistics;
1301
1302 /*Number of received bytes in frames with no FCS, undersized,
1303 *oversized, or payload length errors.
1304 *This register is compliant with the requirements for
1305 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
1306 *Interface Types) and RX etherStatsOctets in RFC2819
1307 *(Remote Network Monitoring Management Information Base
1308 *(RMON)).
1309 */
1310 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1311 IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
1312 IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
1313 hw, port_id);
1314
1315 /*resume Tx counter to real time
1316 */
1317 tmp = 0x00000000;
1318 (*hw->f_mac_read)(hw,
1319 &tmp,
1320 IPN3KE_25G_TX_STATISTICS_CONFIG,
1321 port_id,
1322 0);
1323 tmp &= 0xfffffffb;
1324 (*hw->f_mac_write)(hw,
1325 tmp,
1326 IPN3KE_25G_TX_STATISTICS_CONFIG,
1327 port_id,
1328 0);
1329
1330 /*resume Rx counter to real time
1331 */
1332 tmp = 0x00000000;
1333 (*hw->f_mac_read)(hw,
1334 &tmp,
1335 IPN3KE_25G_RX_STATISTICS_CONFIG,
1336 port_id,
1337 0);
1338 tmp &= 0xfffffffb;
1339 (*hw->f_mac_write)(hw,
1340 tmp,
1341 IPN3KE_25G_RX_STATISTICS_CONFIG,
1342 port_id,
1343 0);
1344
1345 return 0;
1346 }
1347
1348 static void
ipn3ke_rpst_25g_lineside_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)1349 ipn3ke_rpst_25g_lineside_tx_stats_reset(struct ipn3ke_hw *hw,
1350 uint16_t port_id)
1351 {
1352 uint32_t tmp = 0x00000001;
1353 /* Bit[0]: Software can set this bit to the value of 1
1354 * to reset all of the TX statistics registers at the same time.
1355 * This bit is selfclearing.
1356 */
1357 (*hw->f_mac_write)(hw,
1358 tmp,
1359 IPN3KE_25G_TX_STATISTICS_CONFIG,
1360 port_id,
1361 0);
1362
1363 while (tmp & 0x00000001) {
1364 tmp = 0x00000000;
1365 (*hw->f_mac_read)(hw,
1366 &tmp,
1367 IPN3KE_25G_TX_STATISTICS_CONFIG,
1368 port_id,
1369 0);
1370 if (tmp & 0x00000001)
1371 usleep(5);
1372 else
1373 return;
1374 }
1375 }
1376
1377 static void
ipn3ke_rpst_25g_lineside_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)1378 ipn3ke_rpst_25g_lineside_rx_stats_reset(struct ipn3ke_hw *hw,
1379 uint16_t port_id)
1380 {
1381 uint32_t tmp = 0x00000001;
1382 /* Bit[0]: Software can set this bit to the value of 1
1383 * to reset all of the RX statistics registers at the same time.
1384 * This bit is selfclearing.
1385 */
1386 (*hw->f_mac_write)(hw,
1387 tmp,
1388 IPN3KE_25G_RX_STATISTICS_CONFIG,
1389 port_id,
1390 0);
1391
1392 while (tmp & 0x00000001) {
1393 tmp = 0x00000000;
1394 (*hw->f_mac_read)(hw,
1395 &tmp,
1396 IPN3KE_25G_RX_STATISTICS_CONFIG,
1397 port_id,
1398 0);
1399 if (tmp & 0x00000001)
1400 usleep(5);
1401 else
1402 return;
1403 }
1404 }
1405
1406 static uint64_t
ipn3ke_rpst_read_36bits_statistics_register(uint32_t addr_lo,uint32_t addr_hi,struct ipn3ke_hw * hw,uint16_t port_id)1407 ipn3ke_rpst_read_36bits_statistics_register(uint32_t addr_lo,
1408 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id)
1409 {
1410 uint32_t statistics_lo = 0x00000000;
1411 uint32_t statistics_hi = 0x00000000;
1412 uint64_t statistics = 0x0000000000000000;
1413
1414 (*hw->f_mac_read)(hw,
1415 &statistics_lo,
1416 addr_lo,
1417 port_id,
1418 0);
1419 (*hw->f_mac_read)(hw,
1420 &statistics_hi,
1421 addr_hi,
1422 port_id,
1423 0);
1424 statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
1425 statistics += statistics_hi;
1426 statistics = statistics << IPN3KE_REGISTER_WIDTH;
1427 statistics += statistics_lo;
1428 return statistics;
1429 }
1430
1431 static int
ipn3ke_rpst_read_10g_lineside_stats_registers(struct ipn3ke_hw * hw,uint16_t port_id,struct ipn3ke_rpst_hw_port_stats * hw_stats,struct rte_eth_stats * stats)1432 ipn3ke_rpst_read_10g_lineside_stats_registers
1433 (struct ipn3ke_hw *hw,
1434 uint16_t port_id,
1435 struct ipn3ke_rpst_hw_port_stats *hw_stats,
1436 struct rte_eth_stats *stats)
1437 {
1438 uint64_t statistics = 0;
1439
1440 memset(hw_stats, 0, sizeof(*hw_stats));
1441 memset(stats, 0, sizeof(*stats));
1442
1443 /*36-bit statistics counter that collects the number of frames
1444 *that are successfully transmitted, including control frames.
1445 */
1446 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1447 IPN3KE_10G_TX_STATS_FRAME_OK_LO,
1448 IPN3KE_10G_TX_STATS_FRAME_OK_HI,
1449 hw, port_id);
1450 stats->opackets = statistics;
1451
1452 /*36-bit statistics counter that collects the number of frames
1453 *that are successfully received, including control frames.
1454 */
1455 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1456 IPN3KE_10G_RX_STATS_FRAME_OK_LO,
1457 IPN3KE_10G_RX_STATS_FRAME_OK_HI,
1458 hw, port_id);
1459 stats->ipackets = statistics;
1460
1461 /*36-bit statistics counter that collects the number of frames
1462 *transmitted with error, including control frames.
1463 */
1464 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1465 IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
1466 IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
1467 hw, port_id);
1468 stats->oerrors = statistics;
1469 hw_stats->eth.tx_errors = statistics;
1470
1471 /*36-bit statistics counter that collects the number of frames
1472 *received with error, including control frames.
1473 */
1474 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1475 IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
1476 IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
1477 hw, port_id);
1478 stats->ierrors = statistics;
1479 hw_stats->eth.rx_discards = statistics;
1480
1481 /*36-bit statistics counter that collects the number
1482 *of RX frames with CRC error.
1483 */
1484 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1485 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
1486 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
1487 hw, port_id);
1488 hw_stats->crc_errors = statistics;
1489
1490 /*64-bit statistics counter that collects the payload length,
1491 *including the bytes in control frames.
1492 *The payload length is the number of data and padding bytes
1493 *transmitted.
1494 *If the tx_vlan_detection[0] register bit is set to 1,
1495 *the VLAN and stacked VLAN tags are counted as part of
1496 *the TX payload.
1497 */
1498 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1499 IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
1500 IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
1501 hw, port_id);
1502 stats->obytes = statistics;
1503 hw_stats->eth.tx_bytes = statistics;
1504
1505 /*64-bit statistics counter that collects the payload length,
1506 *including the bytes in control frames.
1507 *The payload length is the number of data and padding bytes
1508 *received.
1509 *If the rx_vlan_detection[0] register bit is set to 1,
1510 *the VLAN and stacked VLAN tags are counted as part of
1511 *the RX payload.
1512 */
1513 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1514 IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
1515 IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
1516 hw, port_id);
1517 stats->ibytes = statistics;
1518 hw_stats->eth.rx_bytes = statistics;
1519
1520 /*36-bit statistics counter that collects the number of
1521 *valid pause frames transmitted.
1522 */
1523 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1524 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
1525 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
1526 hw, port_id);
1527
1528 /*36-bit statistics counter that collects the number of
1529 *valid pause frames received.
1530 */
1531 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1532 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
1533 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
1534 hw, port_id);
1535
1536 /*36-bit statistics counter that collects the number of frames
1537 *transmitted that are invalid and with error.
1538 */
1539 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1540 IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
1541 IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
1542 hw, port_id);
1543
1544 /*36-bit statistics counter that collects the number of frames
1545 *received that are invalid and with error.
1546 */
1547 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1548 IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
1549 IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
1550 hw, port_id);
1551
1552 /*36-bit statistics counter that collects the number of
1553 *good unicast frames transmitted,
1554 *excluding control frames.
1555 */
1556 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1557 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
1558 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
1559 hw, port_id);
1560 hw_stats->eth.tx_unicast = statistics;
1561
1562 /*36-bit statistics counter that collects the number of
1563 *good unicast frames received,
1564 *excluding control frames.
1565 */
1566 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1567 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
1568 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
1569 hw, port_id);
1570 hw_stats->eth.rx_unicast = statistics;
1571
1572 /*36-bit statistics counter that collects the number of
1573 *unicast frames transmitted with error,
1574 *excluding control frames.
1575 */
1576 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1577 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
1578 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
1579 hw, port_id);
1580
1581 /*36-bit statistics counter that collects the number of
1582 *unicast frames received with error,
1583 *excluding control frames.
1584 */
1585 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1586 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
1587 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
1588 hw, port_id);
1589
1590 /*36-bit statistics counter that collects the number of
1591 *good multicast frames transmitted,
1592 *excluding control frames.
1593 */
1594 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1595 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
1596 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
1597 hw, port_id);
1598 hw_stats->eth.tx_multicast = statistics;
1599
1600 /*36-bit statistics counter that collects the number of
1601 *good multicast frames received,
1602 *excluding control frames.
1603 */
1604 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1605 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
1606 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
1607 hw, port_id);
1608 hw_stats->eth.rx_multicast = statistics;
1609
1610 /*36-bit statistics counter that collects the number of
1611 *multicast frames transmitted with error,
1612 *excluding control frames.
1613 */
1614 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1615 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
1616 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
1617 hw, port_id);
1618
1619 /*36-bit statistics counter that collects the number
1620 *of multicast frames received with error,
1621 *excluding control frames.
1622 */
1623 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1624 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
1625 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
1626 hw, port_id);
1627
1628 /*36-bit statistics counter that collects the number of
1629 *good broadcast frames transmitted,
1630 *excluding control frames.
1631 */
1632 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1633 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
1634 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
1635 hw, port_id);
1636 hw_stats->eth.tx_broadcast = statistics;
1637
1638 /*36-bit statistics counter that collects the number of
1639 *good broadcast frames received,
1640 *excluding control frames.
1641 */
1642 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1643 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
1644 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
1645 hw, port_id);
1646 hw_stats->eth.rx_broadcast = statistics;
1647
1648 /*36-bit statistics counter that collects the number
1649 *of broadcast frames transmitted with error,
1650 *excluding control frames.
1651 */
1652 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1653 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
1654 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
1655 hw, port_id);
1656
1657 /*36-bit statistics counter that collects the number of
1658 *broadcast frames received with error,
1659 *excluding control frames.
1660 */
1661 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1662 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
1663 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
1664 hw, port_id);
1665
1666 /*64-bit statistics counter that collects the total number of
1667 *octets transmitted.
1668 *This count includes good, errored, and invalid frames.
1669 */
1670 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1671 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
1672 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
1673 hw, port_id);
1674
1675 /*64-bit statistics counter that collects the total number of
1676 *octets received.
1677 *This count includes good, errored, and invalid frames.
1678 */
1679 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1680 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
1681 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
1682 hw, port_id);
1683
1684 /*36-bit statistics counter that collects the total number of
1685 *good, errored, and invalid frames transmitted.
1686 */
1687 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1688 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
1689 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
1690 hw, port_id);
1691
1692 /*36-bit statistics counter that collects the total number of
1693 *good, errored, and invalid frames received.
1694 */
1695 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1696 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
1697 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
1698 hw, port_id);
1699
1700 /*36-bit statistics counter that collects the number of
1701 *undersized TX frames.
1702 */
1703 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1704 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
1705 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
1706 hw, port_id);
1707
1708 /*36-bit statistics counter that collects the number of
1709 *undersized RX frames.
1710 */
1711 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1712 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
1713 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
1714 hw, port_id);
1715 hw_stats->rx_undersize = statistics;
1716
1717 /*36-bit statistics counter that collects the number of
1718 *TX frames whose length exceeds the maximum frame length
1719 *specified.
1720 */
1721 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1722 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
1723 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
1724 hw, port_id);
1725
1726 /*36-bit statistics counter that collects the number of
1727 *RX frames whose length exceeds the maximum frame length
1728 *specified.
1729 */
1730 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1731 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
1732 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
1733 hw, port_id);
1734 hw_stats->rx_oversize = statistics;
1735
1736 /*36-bit statistics counter that collects the number of
1737 *64-byte TX frames,
1738 *including the CRC field
1739 *but excluding the preamble and SFD bytes.
1740 *This count includes good, errored, and invalid frames.
1741 */
1742 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1743 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
1744 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
1745 hw, port_id);
1746 hw_stats->tx_size_64 = statistics;
1747
1748 /*36-bit statistics counter that collects the number of
1749 *64-byte RX frames,
1750 *including the CRC field
1751 *but excluding the preamble and SFD bytes.
1752 *This count includes good, errored, and invalid frames.
1753 */
1754 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1755 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
1756 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
1757 hw, port_id);
1758 hw_stats->rx_size_64 = statistics;
1759
1760 /*36-bit statistics counter that collects the number of
1761 *TX frames between the length of 65 and 127 bytes,
1762 *including the CRC field
1763 *but excluding the preamble and SFD bytes.
1764 *This count includes good, errored, and invalid frames.
1765 */
1766 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1767 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
1768 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
1769 hw, port_id);
1770 hw_stats->tx_size_65_127 = statistics;
1771
1772 /*36-bit statistics counter that collects the number of
1773 *RX frames between the length of 65 and 127 bytes,
1774 *including the CRC field
1775 *but excluding the preamble and SFD bytes.
1776 *This count includes good, errored, and invalid frames.
1777 */
1778 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1779 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
1780 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
1781 hw, port_id);
1782 hw_stats->rx_size_65_127 = statistics;
1783
1784 /*36-bit statistics counter that collects the number of
1785 *TX frames between the length of 128 and 255 bytes,
1786 *including the CRC field
1787 *but excluding the preamble and SFD bytes.
1788 *This count includes good, errored, and invalid frames.
1789 */
1790 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1791 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
1792 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
1793 hw, port_id);
1794 hw_stats->tx_size_128_255 = statistics;
1795
1796 /*36-bit statistics counter that collects the number of
1797 *RX frames between the length of 128 and 255 bytes,
1798 *including the CRC field
1799 *but excluding the preamble and SFD bytes.
1800 *This count includes good, errored, and invalid frames.
1801 */
1802 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1803 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
1804 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
1805 hw, port_id);
1806 hw_stats->rx_size_128_255 = statistics;
1807
1808 /*36-bit statistics counter that collects the number of
1809 *TX frames between the length of 256 and 511 bytes,
1810 *including the CRC field
1811 *but excluding the preamble and SFD bytes.
1812 *This count includes good, errored, and invalid frames.
1813 */
1814 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1815 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
1816 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
1817 hw, port_id);
1818 hw_stats->tx_size_256_511 = statistics;
1819
1820 /*36-bit statistics counter that collects the number of
1821 *RX frames between the length of 256 and 511 bytes,
1822 *including the CRC field
1823 *but excluding the preamble and SFD bytes.
1824 *This count includes good, errored, and invalid frames.
1825 */
1826 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1827 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
1828 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
1829 hw, port_id);
1830 hw_stats->rx_size_256_511 = statistics;
1831
1832 /*36-bit statistics counter that collects the number of
1833 *TX frames between the length of 512 and 1023 bytes,
1834 *including the CRC field
1835 *but excluding the preamble and SFD bytes.
1836 *This count includes good, errored, and invalid frames.
1837 */
1838 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1839 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
1840 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
1841 hw, port_id);
1842 hw_stats->tx_size_512_1023 = statistics;
1843
1844 /*36-bit statistics counter that collects the number of
1845 *RX frames between the length of 512 and 1023 bytes,
1846 *including the CRC field
1847 *but excluding the preamble and SFD bytes.
1848 *This count includes good, errored, and invalid frames.
1849 */
1850 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1851 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
1852 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
1853 hw, port_id);
1854 hw_stats->rx_size_512_1023 = statistics;
1855
1856 /*36-bit statistics counter that collects the number of
1857 *TX frames between the length of 1024 and 1518 bytes,
1858 *including the CRC field but
1859 *excluding the preamble and SFD bytes.
1860 *This count includes good, errored, and invalid frames.
1861 */
1862 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1863 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
1864 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
1865 hw, port_id);
1866 hw_stats->tx_size_1024_1518 = statistics;
1867
1868 /*36-bit statistics counter that collects the number of
1869 *RX frames between the length of 1024 and 1518 bytes,
1870 *including the CRC field
1871 *but excluding the preamble and SFD bytes.
1872 *This count includes good, errored, and invalid frames.
1873 */
1874 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1875 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
1876 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
1877 hw, port_id);
1878 hw_stats->rx_size_1024_1518 = statistics;
1879
1880 /*36-bit statistics counter that collects the number of
1881 *TX frames equal or more than the length of 1,519 bytes,
1882 *including the CRC field
1883 *but excluding the preamble and SFD bytes.
1884 *This count includes good, errored, and invalid frames.
1885 */
1886 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1887 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
1888 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
1889 hw, port_id);
1890 hw_stats->tx_size_1519_to_max = statistics;
1891
1892 /*36-bit statistics counter that collects the number of
1893 *RX frames equal or more than the length of 1,519 bytes,
1894 *including the CRC field
1895 *but excluding the preamble and SFD bytes.
1896 *This count includes good,
1897 *errored, and invalid frames.
1898 */
1899 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1900 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
1901 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
1902 hw, port_id);
1903 hw_stats->rx_size_big = statistics;
1904
1905 /*36-bit statistics counter that collects the total number of
1906 *RX frames with length less than 64 bytes and CRC error.
1907 *The MAC does not drop these frames.
1908 */
1909 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1910 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
1911 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
1912 hw, port_id);
1913
1914 /*36-bit statistics counter that collects the number of
1915 *oversized RX frames with CRC error.
1916 *The MAC does not drop these frames.
1917 */
1918 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1919 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
1920 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
1921 hw, port_id);
1922
1923 /*36-bit statistics counter that collects the number of
1924 *RX frames with CRC error,
1925 *whose length is between 64 and the maximum frame length
1926 *specified in the register.
1927 *The MAC does not drop these frames.
1928 */
1929 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1930 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
1931 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
1932 hw, port_id);
1933
1934 /*36-bit statistics counter that collects the number of
1935 *valid TX unicast control frames.
1936 */
1937 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1938 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
1939 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
1940 hw, port_id);
1941 hw_stats->eth.tx_unicast += statistics;
1942
1943 /*36-bit statistics counter that collects the number of
1944 *valid RX unicast control frames.
1945 */
1946 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1947 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
1948 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
1949 hw, port_id);
1950 hw_stats->eth.rx_unicast += statistics;
1951
1952 /*36-bit statistics counter that collects the number of
1953 *valid TX multicast control frames.
1954 */
1955 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1956 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
1957 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
1958 hw, port_id);
1959 hw_stats->eth.tx_multicast += statistics;
1960
1961 /*36-bit statistics counter that collects the number of
1962 *valid RX multicast control frames.
1963 */
1964 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1965 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
1966 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
1967 hw, port_id);
1968 hw_stats->eth.rx_multicast += statistics;
1969
1970 /*36-bit statistics counter that collects the number of
1971 *valid TX broadcast control frames.
1972 */
1973 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1974 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
1975 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
1976 hw, port_id);
1977 hw_stats->eth.tx_broadcast += statistics;
1978
1979 /*36-bit statistics counter that collects the number of
1980 *valid RX broadcast control frames.
1981 */
1982 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1983 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
1984 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
1985 hw, port_id);
1986 hw_stats->eth.rx_broadcast += statistics;
1987
1988 /*36-bit statistics counter that collects the number of
1989 *valid TX PFC frames.
1990 */
1991 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1992 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
1993 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
1994 hw, port_id);
1995
1996 /*36-bit statistics counter that collects the number of
1997 *valid RX PFC frames.
1998 */
1999 statistics = ipn3ke_rpst_read_36bits_statistics_register(
2000 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
2001 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
2002 hw, port_id);
2003
2004 return 0;
2005 }
2006
2007 static void
ipn3ke_rpst_10g_lineside_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)2008 ipn3ke_rpst_10g_lineside_tx_stats_reset(struct ipn3ke_hw *hw,
2009 uint16_t port_id)
2010 {
2011 uint32_t tmp;
2012
2013 /*Bit [0]: Set this register to 1 to clear all TX statistics
2014 *counters.
2015 *The IP core clears this bit when all counters are cleared.
2016 *Bits [31:1]: Reserved.
2017 */
2018 tmp = 0x00000000;
2019 (*hw->f_mac_read)(hw,
2020 &tmp,
2021 IPN3KE_10G_TX_STATS_CLR,
2022 port_id,
2023 0);
2024 tmp |= 0x00000001;
2025 (*hw->f_mac_write)(hw,
2026 tmp,
2027 IPN3KE_10G_TX_STATS_CLR,
2028 port_id,
2029 0);
2030 }
2031
2032 static void
ipn3ke_rpst_10g_lineside_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)2033 ipn3ke_rpst_10g_lineside_rx_stats_reset(struct ipn3ke_hw *hw,
2034 uint16_t port_id)
2035 {
2036 uint32_t tmp;
2037
2038 /*Bit [0]: Set this register to 1 to clear all RX statistics
2039 *counters.
2040 *The IP core clears this bit when all counters are cleared.
2041 *Bits [31:1]: Reserved
2042 */
2043 tmp = 0x00000000;
2044 (*hw->f_mac_read)(hw,
2045 &tmp,
2046 IPN3KE_10G_RX_STATS_CLR,
2047 port_id,
2048 0);
2049 tmp |= 0x00000001;
2050 (*hw->f_mac_write)(hw,
2051 tmp,
2052 IPN3KE_10G_RX_STATS_CLR,
2053 port_id,
2054 0);
2055 }
2056
2057 static int
ipn3ke_rpst_stats_reset(struct rte_eth_dev * ethdev)2058 ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
2059 {
2060 uint16_t port_id = 0;
2061 char *ch;
2062 int cnt = 0;
2063 struct rte_afu_device *afu_dev = NULL;
2064 struct ipn3ke_hw *hw = NULL;
2065
2066 if (!ethdev) {
2067 IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
2068 return -EINVAL;
2069 }
2070
2071 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2072 if (!afu_dev) {
2073 IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
2074 return -EINVAL;
2075 }
2076
2077 if (!afu_dev->shared.data) {
2078 IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
2079 return -EINVAL;
2080 }
2081
2082 hw = afu_dev->shared.data;
2083
2084 ch = ethdev->data->name;
2085 if (!ch) {
2086 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2087 return -EINVAL;
2088 }
2089 while (ch) {
2090 if (*ch == '_')
2091 cnt++;
2092 ch++;
2093 if (cnt == 3)
2094 break;
2095 }
2096 if (!ch) {
2097 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2098 return -EINVAL;
2099 }
2100 port_id = atoi(ch);
2101
2102 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2103 ipn3ke_rpst_25g_nic_side_tx_stats_reset(hw, port_id);
2104 ipn3ke_rpst_25g_nic_side_rx_stats_reset(hw, port_id);
2105 ipn3ke_rpst_25g_lineside_tx_stats_reset(hw, port_id);
2106 ipn3ke_rpst_25g_lineside_rx_stats_reset(hw, port_id);
2107 } else if (hw->retimer.mac_type ==
2108 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2109 ipn3ke_rpst_10g_nic_side_tx_stats_reset(hw, port_id);
2110 ipn3ke_rpst_10g_nic_side_rx_stats_reset(hw, port_id);
2111 ipn3ke_rpst_10g_lineside_tx_stats_reset(hw, port_id);
2112 ipn3ke_rpst_10g_lineside_rx_stats_reset(hw, port_id);
2113 }
2114
2115 return 0;
2116 }
2117
2118 static int
ipn3ke_rpst_stats_get(struct rte_eth_dev * ethdev,struct rte_eth_stats * stats)2119 ipn3ke_rpst_stats_get
2120 (struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
2121 {
2122 uint16_t port_id = 0;
2123 char *ch;
2124 int cnt = 0;
2125 int i = 0;
2126 struct rte_afu_device *afu_dev = NULL;
2127 struct ipn3ke_hw *hw = NULL;
2128 struct ipn3ke_rpst_hw_port_stats hw_stats;
2129
2130 if (!ethdev) {
2131 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
2132 return -EINVAL;
2133 }
2134 if (!stats) {
2135 IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!");
2136 return -EINVAL;
2137 }
2138
2139 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2140 if (!afu_dev) {
2141 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
2142 return -EINVAL;
2143 }
2144
2145 if (!afu_dev->shared.data) {
2146 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
2147 return -EINVAL;
2148 }
2149
2150 hw = afu_dev->shared.data;
2151
2152 ch = ethdev->data->name;
2153 if (!ch) {
2154 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2155 return -EINVAL;
2156 }
2157 while (ch) {
2158 if (*ch == '_')
2159 cnt++;
2160 ch++;
2161 if (cnt == 3)
2162 break;
2163 }
2164 if (!ch) {
2165 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2166 return -EINVAL;
2167 }
2168 port_id = atoi(ch);
2169
2170 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2171 ipn3ke_rpst_read_25g_lineside_stats_registers(hw,
2172 port_id,
2173 &hw_stats);
2174
2175 stats->ipackets = hw_stats.rx_size_64
2176 + hw_stats.rx_size_65_127
2177 + hw_stats.rx_size_128_255
2178 + hw_stats.rx_size_256_511
2179 + hw_stats.rx_size_512_1023
2180 + hw_stats.rx_size_1024_1518
2181 + hw_stats.rx_size_big
2182 + hw_stats.rx_undersize
2183 + hw_stats.rx_fragments
2184 + hw_stats.rx_oversize
2185 + hw_stats.rx_jabber;
2186 stats->opackets = hw_stats.tx_size_64
2187 + hw_stats.tx_size_65_127
2188 + hw_stats.tx_size_128_255
2189 + hw_stats.tx_size_256_511
2190 + hw_stats.tx_size_512_1023
2191 + hw_stats.tx_size_1024_1518
2192 + hw_stats.tx_size_1519_to_max;
2193 stats->ibytes = hw_stats.eth.rx_bytes;
2194 stats->obytes = hw_stats.eth.tx_bytes;
2195 stats->imissed = 0;
2196 stats->ierrors = hw_stats.eth.rx_discards
2197 + hw_stats.eth.rx_unknown_protocol;
2198 stats->oerrors = hw_stats.eth.tx_discards
2199 + hw_stats.eth.tx_errors;
2200 stats->rx_nombuf = 0;
2201 for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
2202 stats->q_ipackets[i] = 0;
2203 stats->q_opackets[i] = 0;
2204 stats->q_ibytes[i] = 0;
2205 stats->q_obytes[i] = 0;
2206 stats->q_errors[i] = 0;
2207 }
2208 } else {
2209 ipn3ke_rpst_read_10g_lineside_stats_registers(hw,
2210 port_id,
2211 &hw_stats,
2212 stats);
2213 }
2214
2215 return 0;
2216 }
2217
2218 static int
ipn3ke_rpst_xstats_get(struct rte_eth_dev * ethdev,struct rte_eth_xstat * xstats,unsigned int n)2219 ipn3ke_rpst_xstats_get
2220 (struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
2221 {
2222 uint16_t port_id = 0;
2223 char *ch = NULL;
2224 int cnt = 0;
2225 unsigned int i, count, prio;
2226 struct rte_afu_device *afu_dev = NULL;
2227 struct ipn3ke_hw *hw = NULL;
2228 struct ipn3ke_rpst_hw_port_stats hw_stats;
2229 struct rte_eth_stats stats;
2230
2231 if (!xstats)
2232 return 0;
2233
2234 if (!ethdev) {
2235 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
2236 return -EINVAL;
2237 }
2238
2239 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2240 if (!afu_dev) {
2241 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
2242 return -EINVAL;
2243 }
2244
2245 if (!afu_dev->shared.data) {
2246 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
2247 return -EINVAL;
2248 }
2249
2250 hw = afu_dev->shared.data;
2251
2252 ch = ethdev->data->name;
2253 if (!ch) {
2254 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2255 return -EINVAL;
2256 }
2257 while (ch) {
2258 if (*ch == '_')
2259 cnt++;
2260 ch++;
2261 if (cnt == 3)
2262 break;
2263 }
2264 if (!ch) {
2265 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2266 return -EINVAL;
2267 }
2268 port_id = atoi(ch);
2269
2270 count = ipn3ke_rpst_xstats_calc_num();
2271 if (n < count)
2272 return count;
2273
2274 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2275 ipn3ke_rpst_read_25g_lineside_stats_registers(hw,
2276 port_id,
2277 &hw_stats);
2278 } else {
2279 ipn3ke_rpst_read_10g_lineside_stats_registers(hw,
2280 port_id,
2281 &hw_stats,
2282 &stats);
2283 }
2284
2285 count = 0;
2286
2287 /* Get stats from ipn3ke_rpst_stats */
2288 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
2289 xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
2290 + ipn3ke_rpst_stats_strings[i].offset);
2291 xstats[count].id = count;
2292 count++;
2293 }
2294
2295 /* Get individiual stats from ipn3ke_rpst_hw_port */
2296 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
2297 xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
2298 ipn3ke_rpst_hw_port_strings[i].offset);
2299 xstats[count].id = count;
2300 count++;
2301 }
2302
2303 /* Get individiual stats from ipn3ke_rpst_rxq_pri */
2304 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
2305 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
2306 xstats[count].value =
2307 *(uint64_t *)(((char *)(&hw_stats)) +
2308 ipn3ke_rpst_rxq_prio_strings[i].offset +
2309 (sizeof(uint64_t) * prio));
2310 xstats[count].id = count;
2311 count++;
2312 }
2313 }
2314
2315 /* Get individiual stats from ipn3ke_rpst_txq_prio */
2316 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
2317 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
2318 xstats[count].value =
2319 *(uint64_t *)(((char *)(&hw_stats)) +
2320 ipn3ke_rpst_txq_prio_strings[i].offset +
2321 (sizeof(uint64_t) * prio));
2322 xstats[count].id = count;
2323 count++;
2324 }
2325 }
2326
2327 return count;
2328 }
2329
2330 static int
ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev * dev,struct rte_eth_xstat_name * xstats_names,__rte_unused unsigned int limit)2331 ipn3ke_rpst_xstats_get_names
2332 (__rte_unused struct rte_eth_dev *dev,
2333 struct rte_eth_xstat_name *xstats_names,
2334 __rte_unused unsigned int limit)
2335 {
2336 unsigned int count = 0;
2337 unsigned int i, prio;
2338
2339 if (!xstats_names)
2340 return ipn3ke_rpst_xstats_calc_num();
2341
2342 /* Note: limit checked in rte_eth_xstats_names() */
2343
2344 /* Get stats from ipn3ke_rpst_stats */
2345 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
2346 snprintf(xstats_names[count].name,
2347 sizeof(xstats_names[count].name),
2348 "%s",
2349 ipn3ke_rpst_stats_strings[i].name);
2350 count++;
2351 }
2352
2353 /* Get individiual stats from ipn3ke_rpst_hw_port */
2354 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
2355 snprintf(xstats_names[count].name,
2356 sizeof(xstats_names[count].name),
2357 "%s",
2358 ipn3ke_rpst_hw_port_strings[i].name);
2359 count++;
2360 }
2361
2362 /* Get individiual stats from ipn3ke_rpst_rxq_pri */
2363 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
2364 for (prio = 0; prio < 8; prio++) {
2365 snprintf(xstats_names[count].name,
2366 sizeof(xstats_names[count].name),
2367 "rx_priority%u_%s",
2368 prio,
2369 ipn3ke_rpst_rxq_prio_strings[i].name);
2370 count++;
2371 }
2372 }
2373
2374 /* Get individiual stats from ipn3ke_rpst_txq_prio */
2375 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
2376 for (prio = 0; prio < 8; prio++) {
2377 snprintf(xstats_names[count].name,
2378 sizeof(xstats_names[count].name),
2379 "tx_priority%u_%s",
2380 prio,
2381 ipn3ke_rpst_txq_prio_strings[i].name);
2382 count++;
2383 }
2384 }
2385 return count;
2386 }
2387
2388 static void
ipn3ke_update_link(struct rte_rawdev * rawdev,uint16_t port,struct rte_eth_link * link)2389 ipn3ke_update_link(struct rte_rawdev *rawdev,
2390 uint16_t port, struct rte_eth_link *link)
2391 {
2392 uint64_t line_link_bitmap = 0;
2393 enum ifpga_rawdev_link_speed link_speed;
2394
2395 rawdev->dev_ops->attr_get(rawdev,
2396 "LineSideLinkStatus",
2397 (uint64_t *)&line_link_bitmap);
2398
2399 /* Parse the link status */
2400 if ((1 << port) & line_link_bitmap)
2401 link->link_status = 1;
2402 else
2403 link->link_status = 0;
2404
2405 IPN3KE_AFU_PMD_DEBUG("port is %d\n", port);
2406 IPN3KE_AFU_PMD_DEBUG("link->link_status is %d\n", link->link_status);
2407
2408 rawdev->dev_ops->attr_get(rawdev,
2409 "LineSideLinkSpeed",
2410 (uint64_t *)&link_speed);
2411 switch (link_speed) {
2412 case IFPGA_RAWDEV_LINK_SPEED_10GB:
2413 link->link_speed = ETH_SPEED_NUM_10G;
2414 break;
2415 case IFPGA_RAWDEV_LINK_SPEED_25GB:
2416 link->link_speed = ETH_SPEED_NUM_25G;
2417 break;
2418 default:
2419 IPN3KE_AFU_PMD_ERR("Unknown link speed info %u", link_speed);
2420 break;
2421 }
2422 }
2423
2424 /*
2425 * Set device link up.
2426 */
2427 int
ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev * dev)2428 ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev *dev)
2429 {
2430 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
2431 struct rte_eth_dev *pf;
2432 int ret = 0;
2433
2434 if (rpst->i40e_pf_eth) {
2435 ret = rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2436 pf = rpst->i40e_pf_eth;
2437 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2438 }
2439
2440 return ret;
2441 }
2442
2443 /*
2444 * Set device link down.
2445 */
2446 int
ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev * dev)2447 ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev *dev)
2448 {
2449 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
2450 struct rte_eth_dev *pf;
2451 int ret = 0;
2452
2453 if (rpst->i40e_pf_eth) {
2454 ret = rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2455 pf = rpst->i40e_pf_eth;
2456 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2457 }
2458
2459 return ret;
2460 }
2461
2462 int
ipn3ke_rpst_link_update(struct rte_eth_dev * ethdev,__rte_unused int wait_to_complete)2463 ipn3ke_rpst_link_update(struct rte_eth_dev *ethdev,
2464 __rte_unused int wait_to_complete)
2465 {
2466 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2467 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2468 struct rte_rawdev *rawdev;
2469 struct rte_eth_link link;
2470 struct rte_eth_dev *pf;
2471
2472 memset(&link, 0, sizeof(link));
2473
2474 link.link_duplex = ETH_LINK_FULL_DUPLEX;
2475 link.link_autoneg = !(ethdev->data->dev_conf.link_speeds &
2476 ETH_LINK_SPEED_FIXED);
2477
2478 rawdev = hw->rawdev;
2479 ipn3ke_update_link(rawdev, rpst->port_id, &link);
2480
2481 if (!rpst->ori_linfo.link_status &&
2482 link.link_status) {
2483 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Up\n", rpst->port_id);
2484 rpst->ori_linfo.link_status = link.link_status;
2485 rpst->ori_linfo.link_speed = link.link_speed;
2486
2487 rte_eth_linkstatus_set(ethdev, &link);
2488
2489 if (rpst->i40e_pf_eth) {
2490 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Up\n",
2491 rpst->i40e_pf_eth_port_id);
2492 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2493 pf = rpst->i40e_pf_eth;
2494 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2495 }
2496 } else if (rpst->ori_linfo.link_status &&
2497 !link.link_status) {
2498 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Down\n",
2499 rpst->port_id);
2500 rpst->ori_linfo.link_status = link.link_status;
2501 rpst->ori_linfo.link_speed = link.link_speed;
2502
2503 rte_eth_linkstatus_set(ethdev, &link);
2504
2505 if (rpst->i40e_pf_eth) {
2506 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Down\n",
2507 rpst->i40e_pf_eth_port_id);
2508 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2509 pf = rpst->i40e_pf_eth;
2510 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2511 }
2512 }
2513
2514 return 0;
2515 }
2516
2517 static int
ipn3ke_rpst_link_check(struct ipn3ke_rpst * rpst)2518 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst)
2519 {
2520 struct ipn3ke_hw *hw;
2521 struct rte_rawdev *rawdev;
2522 struct rte_eth_link link;
2523 struct rte_eth_dev *pf;
2524
2525 if (rpst == NULL)
2526 return -1;
2527
2528 hw = rpst->hw;
2529
2530 memset(&link, 0, sizeof(link));
2531
2532 link.link_duplex = ETH_LINK_FULL_DUPLEX;
2533 link.link_autoneg = !(rpst->ethdev->data->dev_conf.link_speeds &
2534 ETH_LINK_SPEED_FIXED);
2535
2536 rawdev = hw->rawdev;
2537 ipn3ke_update_link(rawdev, rpst->port_id, &link);
2538
2539 if (!rpst->ori_linfo.link_status &&
2540 link.link_status) {
2541 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Up\n", rpst->port_id);
2542 rpst->ori_linfo.link_status = link.link_status;
2543 rpst->ori_linfo.link_speed = link.link_speed;
2544
2545 rte_eth_linkstatus_set(rpst->ethdev, &link);
2546
2547 if (rpst->i40e_pf_eth) {
2548 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Up\n",
2549 rpst->i40e_pf_eth_port_id);
2550 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2551 pf = rpst->i40e_pf_eth;
2552 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2553 }
2554 } else if (rpst->ori_linfo.link_status &&
2555 !link.link_status) {
2556 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Down\n", rpst->port_id);
2557 rpst->ori_linfo.link_status = link.link_status;
2558 rpst->ori_linfo.link_speed = link.link_speed;
2559
2560 rte_eth_linkstatus_set(rpst->ethdev, &link);
2561
2562 if (rpst->i40e_pf_eth) {
2563 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Down\n",
2564 rpst->i40e_pf_eth_port_id);
2565 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2566 pf = rpst->i40e_pf_eth;
2567 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2568 }
2569 }
2570
2571 return 0;
2572 }
2573
2574 static void *
ipn3ke_rpst_scan_handle_request(__rte_unused void * param)2575 ipn3ke_rpst_scan_handle_request(__rte_unused void *param)
2576 {
2577 struct ipn3ke_rpst *rpst;
2578 int num = 0;
2579 #define MS 1000
2580 #define SCAN_NUM 32
2581
2582 for (;;) {
2583 num = 0;
2584 TAILQ_FOREACH(rpst, &ipn3ke_rpst_list, next) {
2585 if (rpst->i40e_pf_eth &&
2586 rpst->ethdev->data->dev_started &&
2587 rpst->i40e_pf_eth->data->dev_started)
2588 ipn3ke_rpst_link_check(rpst);
2589
2590 if (++num > SCAN_NUM)
2591 rte_delay_us(1 * MS);
2592 }
2593 rte_delay_us(50 * MS);
2594
2595 if (num == 0xffffff)
2596 return NULL;
2597 }
2598
2599 return NULL;
2600 }
2601
2602 static int
ipn3ke_rpst_scan_check(void)2603 ipn3ke_rpst_scan_check(void)
2604 {
2605 int ret;
2606
2607 if (ipn3ke_rpst_scan_num == 1) {
2608 ret = rte_ctrl_thread_create(&ipn3ke_rpst_scan_thread,
2609 "ipn3ke scanner",
2610 NULL,
2611 ipn3ke_rpst_scan_handle_request, NULL);
2612 if (ret) {
2613 IPN3KE_AFU_PMD_ERR("Fail to create ipn3ke rpst scan thread");
2614 return -1;
2615 }
2616 } else if (ipn3ke_rpst_scan_num == 0) {
2617 ret = pthread_cancel(ipn3ke_rpst_scan_thread);
2618 if (ret)
2619 IPN3KE_AFU_PMD_ERR("Can't cancel the thread");
2620
2621 ret = pthread_join(ipn3ke_rpst_scan_thread, NULL);
2622 if (ret)
2623 IPN3KE_AFU_PMD_ERR("Can't join the thread");
2624
2625 return ret;
2626 }
2627
2628 return 0;
2629 }
2630
2631 int
ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev * ethdev)2632 ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev *ethdev)
2633 {
2634 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2635 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2636 uint32_t rddata, val;
2637
2638 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2639 /* Enable all unicast */
2640 (*hw->f_mac_read)(hw,
2641 &rddata,
2642 IPN3KE_MAC_RX_FRAME_CONTROL,
2643 rpst->port_id,
2644 0);
2645 val = 1;
2646 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;
2647 val |= rddata;
2648 (*hw->f_mac_write)(hw,
2649 val,
2650 IPN3KE_MAC_RX_FRAME_CONTROL,
2651 rpst->port_id,
2652 0);
2653 }
2654
2655 return 0;
2656 }
2657
2658 int
ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev * ethdev)2659 ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev *ethdev)
2660 {
2661 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2662 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2663 uint32_t rddata, val;
2664
2665 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2666 /* Disable all unicast */
2667 (*hw->f_mac_read)(hw,
2668 &rddata,
2669 IPN3KE_MAC_RX_FRAME_CONTROL,
2670 rpst->port_id,
2671 0);
2672 val = 0;
2673 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;
2674 val |= rddata;
2675 (*hw->f_mac_write)(hw,
2676 val,
2677 IPN3KE_MAC_RX_FRAME_CONTROL,
2678 rpst->port_id,
2679 0);
2680 }
2681
2682 return 0;
2683 }
2684
2685 int
ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev * ethdev)2686 ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev *ethdev)
2687 {
2688 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2689 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2690 uint32_t rddata, val;
2691
2692 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2693 /* Enable all unicast */
2694 (*hw->f_mac_read)(hw,
2695 &rddata,
2696 IPN3KE_MAC_RX_FRAME_CONTROL,
2697 rpst->port_id,
2698 0);
2699 val = 1;
2700 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;
2701 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;
2702 val |= rddata;
2703 (*hw->f_mac_write)(hw,
2704 val,
2705 IPN3KE_MAC_RX_FRAME_CONTROL,
2706 rpst->port_id,
2707 0);
2708 }
2709
2710 return 0;
2711 }
2712
2713 int
ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev * ethdev)2714 ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev *ethdev)
2715 {
2716 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2717 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2718 uint32_t rddata, val;
2719
2720 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2721 /* Disable all unicast */
2722 (*hw->f_mac_read)(hw,
2723 &rddata,
2724 IPN3KE_MAC_RX_FRAME_CONTROL,
2725 rpst->port_id,
2726 0);
2727 val = 0;
2728 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;
2729 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;
2730 val |= rddata;
2731 (*hw->f_mac_write)(hw,
2732 val,
2733 IPN3KE_MAC_RX_FRAME_CONTROL,
2734 rpst->port_id,
2735 0);
2736 }
2737
2738 return 0;
2739 }
2740
2741 int
ipn3ke_rpst_mac_addr_set(struct rte_eth_dev * ethdev,struct rte_ether_addr * mac_addr)2742 ipn3ke_rpst_mac_addr_set(struct rte_eth_dev *ethdev,
2743 struct rte_ether_addr *mac_addr)
2744 {
2745 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2746 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2747 uint32_t val;
2748
2749 if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2750 IPN3KE_AFU_PMD_ERR("Tried to set invalid MAC address.");
2751 return -EINVAL;
2752 }
2753
2754 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2755 rte_ether_addr_copy(&mac_addr[0], &rpst->mac_addr);
2756
2757 /* Set mac address */
2758 rte_memcpy(((char *)(&val)), &mac_addr[0], sizeof(uint32_t));
2759 (*hw->f_mac_write)(hw,
2760 val,
2761 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
2762 rpst->port_id,
2763 0);
2764 rte_memcpy(((char *)(&val)), &mac_addr[4], sizeof(uint16_t));
2765 (*hw->f_mac_write)(hw,
2766 val,
2767 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
2768 rpst->port_id,
2769 0);
2770 }
2771
2772 return 0;
2773 }
2774
2775 int
ipn3ke_rpst_mtu_set(struct rte_eth_dev * ethdev,uint16_t mtu)2776 ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu)
2777 {
2778 int ret = 0;
2779 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2780 struct rte_eth_dev_data *dev_data = ethdev->data;
2781 uint32_t frame_size = mtu + IPN3KE_ETH_OVERHEAD;
2782
2783 /* check if mtu is within the allowed range */
2784 if (mtu < RTE_ETHER_MIN_MTU ||
2785 frame_size > IPN3KE_MAC_FRAME_SIZE_MAX)
2786 return -EINVAL;
2787
2788 /* mtu setting is forbidden if port is start */
2789 /* make sure NIC port is stopped */
2790 if (rpst->i40e_pf_eth && rpst->i40e_pf_eth->data->dev_started) {
2791 IPN3KE_AFU_PMD_ERR("NIC port %d must "
2792 "be stopped before configuration",
2793 rpst->i40e_pf_eth->data->port_id);
2794 return -EBUSY;
2795 }
2796 /* mtu setting is forbidden if port is start */
2797 if (dev_data->dev_started) {
2798 IPN3KE_AFU_PMD_ERR("FPGA port %d must "
2799 "be stopped before configuration",
2800 dev_data->port_id);
2801 return -EBUSY;
2802 }
2803
2804 if (frame_size > RTE_ETHER_MAX_LEN)
2805 dev_data->dev_conf.rxmode.offloads |=
2806 (uint64_t)(DEV_RX_OFFLOAD_JUMBO_FRAME);
2807 else
2808 dev_data->dev_conf.rxmode.offloads &=
2809 (uint64_t)(~DEV_RX_OFFLOAD_JUMBO_FRAME);
2810
2811 dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2812
2813 if (rpst->i40e_pf_eth) {
2814 ret = rpst->i40e_pf_eth->dev_ops->mtu_set(rpst->i40e_pf_eth,
2815 mtu);
2816 if (!ret)
2817 rpst->i40e_pf_eth->data->mtu = mtu;
2818 }
2819
2820 return ret;
2821 }
2822
2823 static int
ipn3ke_afu_filter_ctrl(struct rte_eth_dev * ethdev,enum rte_filter_type filter_type,enum rte_filter_op filter_op,void * arg)2824 ipn3ke_afu_filter_ctrl(struct rte_eth_dev *ethdev,
2825 enum rte_filter_type filter_type, enum rte_filter_op filter_op,
2826 void *arg)
2827 {
2828 int ret = 0;
2829 struct ipn3ke_hw *hw;
2830 struct ipn3ke_rpst *rpst;
2831
2832 if (ethdev == NULL)
2833 return -EINVAL;
2834
2835 hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2836 rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2837
2838 if (hw->acc_flow)
2839 switch (filter_type) {
2840 case RTE_ETH_FILTER_GENERIC:
2841 if (filter_op != RTE_ETH_FILTER_GET)
2842 return -EINVAL;
2843 *(const void **)arg = &ipn3ke_flow_ops;
2844 break;
2845 default:
2846 IPN3KE_AFU_PMD_WARN("Filter type (%d) not supported",
2847 filter_type);
2848 ret = -EINVAL;
2849 break;
2850 }
2851 else if (rpst->i40e_pf_eth)
2852 (*rpst->i40e_pf_eth->dev_ops->filter_ctrl)(ethdev,
2853 filter_type,
2854 filter_op,
2855 arg);
2856 else
2857 return -EINVAL;
2858
2859 return ret;
2860 }
2861
2862 static const struct eth_dev_ops ipn3ke_rpst_dev_ops = {
2863 .dev_infos_get = ipn3ke_rpst_dev_infos_get,
2864
2865 .dev_configure = ipn3ke_rpst_dev_configure,
2866 .dev_start = ipn3ke_rpst_dev_start,
2867 .dev_stop = ipn3ke_rpst_dev_stop,
2868 .dev_close = ipn3ke_rpst_dev_close,
2869 .dev_reset = ipn3ke_rpst_dev_reset,
2870
2871 .stats_get = ipn3ke_rpst_stats_get,
2872 .xstats_get = ipn3ke_rpst_xstats_get,
2873 .xstats_get_names = ipn3ke_rpst_xstats_get_names,
2874 .stats_reset = ipn3ke_rpst_stats_reset,
2875 .xstats_reset = ipn3ke_rpst_stats_reset,
2876
2877 .filter_ctrl = ipn3ke_afu_filter_ctrl,
2878
2879 .rx_queue_start = ipn3ke_rpst_rx_queue_start,
2880 .rx_queue_stop = ipn3ke_rpst_rx_queue_stop,
2881 .tx_queue_start = ipn3ke_rpst_tx_queue_start,
2882 .tx_queue_stop = ipn3ke_rpst_tx_queue_stop,
2883 .rx_queue_setup = ipn3ke_rpst_rx_queue_setup,
2884 .rx_queue_release = ipn3ke_rpst_rx_queue_release,
2885 .tx_queue_setup = ipn3ke_rpst_tx_queue_setup,
2886 .tx_queue_release = ipn3ke_rpst_tx_queue_release,
2887
2888 .dev_set_link_up = ipn3ke_rpst_dev_set_link_up,
2889 .dev_set_link_down = ipn3ke_rpst_dev_set_link_down,
2890 .link_update = ipn3ke_rpst_link_update,
2891
2892 .promiscuous_enable = ipn3ke_rpst_promiscuous_enable,
2893 .promiscuous_disable = ipn3ke_rpst_promiscuous_disable,
2894 .allmulticast_enable = ipn3ke_rpst_allmulticast_enable,
2895 .allmulticast_disable = ipn3ke_rpst_allmulticast_disable,
2896 .mac_addr_set = ipn3ke_rpst_mac_addr_set,
2897 .mtu_set = ipn3ke_rpst_mtu_set,
2898
2899 .tm_ops_get = ipn3ke_tm_ops_get,
2900 };
2901
ipn3ke_rpst_recv_pkts(__rte_unused void * rx_q,__rte_unused struct rte_mbuf ** rx_pkts,__rte_unused uint16_t nb_pkts)2902 static uint16_t ipn3ke_rpst_recv_pkts(__rte_unused void *rx_q,
2903 __rte_unused struct rte_mbuf **rx_pkts, __rte_unused uint16_t nb_pkts)
2904 {
2905 return 0;
2906 }
2907
2908 static uint16_t
ipn3ke_rpst_xmit_pkts(__rte_unused void * tx_queue,__rte_unused struct rte_mbuf ** tx_pkts,__rte_unused uint16_t nb_pkts)2909 ipn3ke_rpst_xmit_pkts(__rte_unused void *tx_queue,
2910 __rte_unused struct rte_mbuf **tx_pkts, __rte_unused uint16_t nb_pkts)
2911 {
2912 return 0;
2913 }
2914
2915 int
ipn3ke_rpst_init(struct rte_eth_dev * ethdev,void * init_params)2916 ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params)
2917 {
2918 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2919 struct ipn3ke_rpst *representor_param =
2920 (struct ipn3ke_rpst *)init_params;
2921
2922 if (representor_param->port_id >= representor_param->hw->port_num)
2923 return -ENODEV;
2924
2925 if (ipn3ke_bridge_func.set_i40e_sw_dev == NULL)
2926 return -ENOMEM;
2927
2928 rpst->ethdev = ethdev;
2929 rpst->switch_domain_id = representor_param->switch_domain_id;
2930 rpst->port_id = representor_param->port_id;
2931 rpst->hw = representor_param->hw;
2932 rpst->i40e_pf_eth = representor_param->i40e_pf_eth;
2933 rpst->i40e_pf_eth_port_id = representor_param->i40e_pf_eth_port_id;
2934 if (rpst->i40e_pf_eth)
2935 ipn3ke_bridge_func.set_i40e_sw_dev(rpst->i40e_pf_eth_port_id,
2936 rpst->ethdev);
2937
2938 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke", RTE_ETHER_ADDR_LEN, 0);
2939 if (!ethdev->data->mac_addrs) {
2940 IPN3KE_AFU_PMD_ERR("Failed to "
2941 "allocated memory for storing mac address");
2942 return -ENODEV;
2943 }
2944
2945 if (rpst->hw->tm_hw_enable)
2946 ipn3ke_tm_init(rpst);
2947
2948 /* Set representor device ops */
2949 ethdev->dev_ops = &ipn3ke_rpst_dev_ops;
2950
2951 /* No data-path, but need stub Rx/Tx functions to avoid crash
2952 * when testing with the likes of testpmd.
2953 */
2954 ethdev->rx_pkt_burst = ipn3ke_rpst_recv_pkts;
2955 ethdev->tx_pkt_burst = ipn3ke_rpst_xmit_pkts;
2956
2957 ethdev->data->nb_rx_queues = 1;
2958 ethdev->data->nb_tx_queues = 1;
2959
2960 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke_afu_representor",
2961 RTE_ETHER_ADDR_LEN,
2962 0);
2963 if (!ethdev->data->mac_addrs) {
2964 IPN3KE_AFU_PMD_ERR("Failed to "
2965 "allocated memory for storing mac address");
2966 return -ENODEV;
2967 }
2968
2969 ethdev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR |
2970 RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
2971
2972 rte_spinlock_lock(&ipn3ke_link_notify_list_lk);
2973 TAILQ_INSERT_TAIL(&ipn3ke_rpst_list, rpst, next);
2974 ipn3ke_rpst_scan_num++;
2975 ipn3ke_rpst_scan_check();
2976 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk);
2977
2978 return 0;
2979 }
2980
2981 int
ipn3ke_rpst_uninit(struct rte_eth_dev * ethdev)2982 ipn3ke_rpst_uninit(struct rte_eth_dev *ethdev)
2983 {
2984 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2985
2986 rte_spinlock_lock(&ipn3ke_link_notify_list_lk);
2987 TAILQ_REMOVE(&ipn3ke_rpst_list, rpst, next);
2988 ipn3ke_rpst_scan_num--;
2989 ipn3ke_rpst_scan_check();
2990 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk);
2991
2992 return 0;
2993 }
2994