1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2019 Intel Corporation
3 */
4
5 #include <stdint.h>
6 #include <unistd.h>
7
8 #include <rte_bus_pci.h>
9 #include <rte_ethdev.h>
10 #include <rte_pci.h>
11 #include <rte_malloc.h>
12
13 #include <rte_mbuf.h>
14 #include <rte_sched.h>
15 #include <ethdev_driver.h>
16 #include <rte_spinlock.h>
17
18 #include <rte_io.h>
19 #include <rte_rawdev.h>
20 #include <rte_rawdev_pmd.h>
21 #include <rte_bus_ifpga.h>
22 #include <ifpga_logs.h>
23
24 #include "ipn3ke_rawdev_api.h"
25 #include "ipn3ke_flow.h"
26 #include "ipn3ke_logs.h"
27 #include "ipn3ke_ethdev.h"
28
29 static int ipn3ke_rpst_scan_num;
30 static pthread_t ipn3ke_rpst_scan_thread;
31
32 /** Double linked list of representor port. */
33 TAILQ_HEAD(ipn3ke_rpst_list, ipn3ke_rpst);
34
35 static struct ipn3ke_rpst_list ipn3ke_rpst_list =
36 TAILQ_HEAD_INITIALIZER(ipn3ke_rpst_list);
37
38 static rte_spinlock_t ipn3ke_link_notify_list_lk = RTE_SPINLOCK_INITIALIZER;
39
40 static int
41 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst);
42
43 static int
ipn3ke_rpst_dev_infos_get(struct rte_eth_dev * ethdev,struct rte_eth_dev_info * dev_info)44 ipn3ke_rpst_dev_infos_get(struct rte_eth_dev *ethdev,
45 struct rte_eth_dev_info *dev_info)
46 {
47 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
48 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
49
50 dev_info->speed_capa =
51 (hw->retimer.mac_type ==
52 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) ?
53 RTE_ETH_LINK_SPEED_10G :
54 ((hw->retimer.mac_type ==
55 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) ?
56 RTE_ETH_LINK_SPEED_25G :
57 RTE_ETH_LINK_SPEED_AUTONEG);
58
59 dev_info->max_rx_queues = 1;
60 dev_info->max_tx_queues = 1;
61 dev_info->min_rx_bufsize = IPN3KE_AFU_BUF_SIZE_MIN;
62 dev_info->max_rx_pktlen = IPN3KE_AFU_FRAME_SIZE_MAX;
63 dev_info->max_mac_addrs = hw->port_num;
64 dev_info->max_vfs = 0;
65 dev_info->default_txconf = (struct rte_eth_txconf) {
66 .offloads = 0,
67 };
68 dev_info->rx_queue_offload_capa = 0;
69 dev_info->rx_offload_capa =
70 RTE_ETH_RX_OFFLOAD_VLAN_STRIP |
71 RTE_ETH_RX_OFFLOAD_QINQ_STRIP |
72 RTE_ETH_RX_OFFLOAD_IPV4_CKSUM |
73 RTE_ETH_RX_OFFLOAD_UDP_CKSUM |
74 RTE_ETH_RX_OFFLOAD_TCP_CKSUM |
75 RTE_ETH_RX_OFFLOAD_OUTER_IPV4_CKSUM |
76 RTE_ETH_RX_OFFLOAD_VLAN_EXTEND |
77 RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
78
79 dev_info->tx_queue_offload_capa = RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE;
80 dev_info->tx_offload_capa =
81 RTE_ETH_TX_OFFLOAD_VLAN_INSERT |
82 RTE_ETH_TX_OFFLOAD_QINQ_INSERT |
83 RTE_ETH_TX_OFFLOAD_IPV4_CKSUM |
84 RTE_ETH_TX_OFFLOAD_UDP_CKSUM |
85 RTE_ETH_TX_OFFLOAD_TCP_CKSUM |
86 RTE_ETH_TX_OFFLOAD_SCTP_CKSUM |
87 RTE_ETH_TX_OFFLOAD_OUTER_IPV4_CKSUM |
88 RTE_ETH_TX_OFFLOAD_TCP_TSO |
89 RTE_ETH_TX_OFFLOAD_VXLAN_TNL_TSO |
90 RTE_ETH_TX_OFFLOAD_GRE_TNL_TSO |
91 RTE_ETH_TX_OFFLOAD_IPIP_TNL_TSO |
92 RTE_ETH_TX_OFFLOAD_GENEVE_TNL_TSO |
93 RTE_ETH_TX_OFFLOAD_MULTI_SEGS |
94 dev_info->tx_queue_offload_capa;
95
96 dev_info->dev_capa =
97 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP |
98 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP;
99 dev_info->dev_capa &= ~RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP;
100
101 dev_info->switch_info.name = ethdev->device->name;
102 dev_info->switch_info.domain_id = rpst->switch_domain_id;
103 dev_info->switch_info.port_id = rpst->port_id;
104
105 return 0;
106 }
107
108 static int
ipn3ke_rpst_dev_configure(__rte_unused struct rte_eth_dev * dev)109 ipn3ke_rpst_dev_configure(__rte_unused struct rte_eth_dev *dev)
110 {
111 return 0;
112 }
113
114 static int
ipn3ke_rpst_dev_start(struct rte_eth_dev * dev)115 ipn3ke_rpst_dev_start(struct rte_eth_dev *dev)
116 {
117 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
118 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
119 struct rte_rawdev *rawdev;
120 uint64_t base_mac;
121 uint32_t val;
122 char attr_name[IPN3KE_RAWDEV_ATTR_LEN_MAX];
123
124 rawdev = hw->rawdev;
125
126 memset(attr_name, 0, sizeof(attr_name));
127 snprintf(attr_name, IPN3KE_RAWDEV_ATTR_LEN_MAX, "%s",
128 "LineSideBaseMAC");
129 rawdev->dev_ops->attr_get(rawdev, attr_name, &base_mac);
130 rte_ether_addr_copy((struct rte_ether_addr *)&base_mac,
131 &rpst->mac_addr);
132
133 rte_ether_addr_copy(&rpst->mac_addr, &dev->data->mac_addrs[0]);
134 dev->data->mac_addrs->addr_bytes[RTE_ETHER_ADDR_LEN - 1] =
135 (uint8_t)rpst->port_id + 1;
136
137 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
138 /* Set mac address */
139 rte_memcpy(((char *)(&val)),
140 (char *)&dev->data->mac_addrs->addr_bytes[0],
141 sizeof(uint32_t));
142 (*hw->f_mac_write)(hw,
143 val,
144 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
145 rpst->port_id,
146 0);
147 rte_memcpy(((char *)(&val)),
148 (char *)&dev->data->mac_addrs->addr_bytes[4],
149 sizeof(uint16_t));
150 (*hw->f_mac_write)(hw,
151 val,
152 IPN3KE_MAC_PRIMARY_MAC_ADDR1,
153 rpst->port_id,
154 0);
155
156 /* Enable the TX path */
157 ipn3ke_xmac_tx_enable(hw, rpst->port_id, 0);
158
159 /* Disables source address override */
160 ipn3ke_xmac_smac_ovd_dis(hw, rpst->port_id, 0);
161
162 /* Enable the RX path */
163 ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
164
165 /* Clear line side TX statistics counters */
166 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
167
168 /* Clear line side RX statistics counters */
169 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
170
171 /* Clear NIC side TX statistics counters */
172 ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
173
174 /* Clear NIC side RX statistics counters */
175 ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
176 } else if (hw->retimer.mac_type ==
177 IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
178 /* Clear line side TX statistics counters */
179 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
180
181 /* Clear line side RX statistics counters */
182 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
183
184 /* Clear NIC side TX statistics counters */
185 ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
186
187 /* Clear NIC side RX statistics counters */
188 ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
189 }
190
191 ipn3ke_rpst_link_update(dev, 0);
192
193 return 0;
194 }
195
196 static int
ipn3ke_rpst_dev_stop(struct rte_eth_dev * dev)197 ipn3ke_rpst_dev_stop(struct rte_eth_dev *dev)
198 {
199 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
200 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
201
202 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
203 /* Disable the TX path */
204 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
205
206 /* Disable the RX path */
207 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
208 }
209
210 return 0;
211 }
212
213 static int
ipn3ke_rpst_dev_close(struct rte_eth_dev * dev)214 ipn3ke_rpst_dev_close(struct rte_eth_dev *dev)
215 {
216 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
217 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
218
219 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
220 return 0;
221
222 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
223 /* Disable the TX path */
224 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
225
226 /* Disable the RX path */
227 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
228 }
229
230 return 0;
231 }
232
233 /*
234 * Reset PF device only to re-initialize resources in PMD layer
235 */
236 static int
ipn3ke_rpst_dev_reset(struct rte_eth_dev * dev)237 ipn3ke_rpst_dev_reset(struct rte_eth_dev *dev)
238 {
239 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(dev);
240 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
241
242 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
243 /* Disable the TX path */
244 ipn3ke_xmac_tx_disable(hw, rpst->port_id, 0);
245
246 /* Disable the RX path */
247 ipn3ke_xmac_rx_disable(hw, rpst->port_id, 0);
248 }
249
250 return 0;
251 }
252
253 static int
ipn3ke_rpst_rx_queue_start(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t rx_queue_id)254 ipn3ke_rpst_rx_queue_start(__rte_unused struct rte_eth_dev *dev,
255 __rte_unused uint16_t rx_queue_id)
256 {
257 return 0;
258 }
259
260 static int
ipn3ke_rpst_rx_queue_stop(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t rx_queue_id)261 ipn3ke_rpst_rx_queue_stop(__rte_unused struct rte_eth_dev *dev,
262 __rte_unused uint16_t rx_queue_id)
263 {
264 return 0;
265 }
266
267 static int
ipn3ke_rpst_tx_queue_start(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t tx_queue_id)268 ipn3ke_rpst_tx_queue_start(__rte_unused struct rte_eth_dev *dev,
269 __rte_unused uint16_t tx_queue_id)
270 {
271 return 0;
272 }
273
274 static int
ipn3ke_rpst_tx_queue_stop(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t tx_queue_id)275 ipn3ke_rpst_tx_queue_stop(__rte_unused struct rte_eth_dev *dev,
276 __rte_unused uint16_t tx_queue_id)
277 {
278 return 0;
279 }
280
281 static int
ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t queue_idx,__rte_unused uint16_t nb_desc,__rte_unused unsigned int socket_id,__rte_unused const struct rte_eth_rxconf * rx_conf,__rte_unused struct rte_mempool * mp)282 ipn3ke_rpst_rx_queue_setup(__rte_unused struct rte_eth_dev *dev,
283 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,
284 __rte_unused unsigned int socket_id,
285 __rte_unused const struct rte_eth_rxconf *rx_conf,
286 __rte_unused struct rte_mempool *mp)
287 {
288 return 0;
289 }
290
291 static int
ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev * dev,__rte_unused uint16_t queue_idx,__rte_unused uint16_t nb_desc,__rte_unused unsigned int socket_id,__rte_unused const struct rte_eth_txconf * tx_conf)292 ipn3ke_rpst_tx_queue_setup(__rte_unused struct rte_eth_dev *dev,
293 __rte_unused uint16_t queue_idx, __rte_unused uint16_t nb_desc,
294 __rte_unused unsigned int socket_id,
295 __rte_unused const struct rte_eth_txconf *tx_conf)
296 {
297 return 0;
298 }
299
300 /* Statistics collected by each port, VSI, VEB, and S-channel */
301 struct ipn3ke_rpst_eth_stats {
302 uint64_t tx_bytes; /* gotc */
303 uint64_t tx_multicast; /* mptc */
304 uint64_t tx_broadcast; /* bptc */
305 uint64_t tx_unicast; /* uptc */
306 uint64_t tx_discards; /* tdpc */
307 uint64_t tx_errors; /* tepc */
308 uint64_t rx_bytes; /* gorc */
309 uint64_t rx_multicast; /* mprc */
310 uint64_t rx_broadcast; /* bprc */
311 uint64_t rx_unicast; /* uprc */
312 uint64_t rx_discards; /* rdpc */
313 uint64_t rx_unknown_protocol; /* rupp */
314 };
315
316 /* store statistics names and its offset in stats structure */
317 struct ipn3ke_rpst_xstats_name_offset {
318 char name[RTE_ETH_XSTATS_NAME_SIZE];
319 unsigned int offset;
320 };
321
322 static const struct ipn3ke_rpst_xstats_name_offset
323 ipn3ke_rpst_stats_strings[] = {
324 {"tx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
325 tx_multicast)},
326 {"tx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
327 tx_broadcast)},
328 {"tx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
329 tx_unicast)},
330 {"tx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats,
331 tx_discards)},
332 {"rx_multicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
333 rx_multicast)},
334 {"rx_broadcast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
335 rx_broadcast)},
336 {"rx_unicast_packets", offsetof(struct ipn3ke_rpst_eth_stats,
337 rx_unicast)},
338 {"rx_dropped_packets", offsetof(struct ipn3ke_rpst_eth_stats,
339 rx_discards)},
340 {"rx_unknown_protocol_packets", offsetof(struct ipn3ke_rpst_eth_stats,
341 rx_unknown_protocol)},
342 };
343
344 #define IPN3KE_RPST_ETH_XSTATS_CNT (sizeof(ipn3ke_rpst_stats_strings) / \
345 sizeof(ipn3ke_rpst_stats_strings[0]))
346
347 #define IPN3KE_RPST_PRIO_XSTATS_CNT 8
348
349 /* Statistics collected by the MAC */
350 struct ipn3ke_rpst_hw_port_stats {
351 /* eth stats collected by the port */
352 struct ipn3ke_rpst_eth_stats eth;
353
354 /* additional port specific stats */
355 uint64_t tx_dropped_link_down;
356 uint64_t crc_errors;
357 uint64_t illegal_bytes;
358 uint64_t error_bytes;
359 uint64_t mac_local_faults;
360 uint64_t mac_remote_faults;
361 uint64_t rx_length_errors;
362 uint64_t link_xon_rx;
363 uint64_t link_xoff_rx;
364 uint64_t priority_xon_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
365 uint64_t priority_xoff_rx[IPN3KE_RPST_PRIO_XSTATS_CNT];
366 uint64_t link_xon_tx;
367 uint64_t link_xoff_tx;
368 uint64_t priority_xon_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
369 uint64_t priority_xoff_tx[IPN3KE_RPST_PRIO_XSTATS_CNT];
370 uint64_t priority_xon_2_xoff[IPN3KE_RPST_PRIO_XSTATS_CNT];
371 uint64_t rx_size_64;
372 uint64_t rx_size_65_127;
373 uint64_t rx_size_128_255;
374 uint64_t rx_size_256_511;
375 uint64_t rx_size_512_1023;
376 uint64_t rx_size_1024_1518;
377 uint64_t rx_size_big;
378 uint64_t rx_undersize;
379 uint64_t rx_fragments;
380 uint64_t rx_oversize;
381 uint64_t rx_jabber;
382 uint64_t tx_size_64;
383 uint64_t tx_size_65_127;
384 uint64_t tx_size_128_255;
385 uint64_t tx_size_256_511;
386 uint64_t tx_size_512_1023;
387 uint64_t tx_size_1024_1518;
388 uint64_t tx_size_1519_to_max;
389 uint64_t mac_short_packet_dropped;
390 uint64_t checksum_error;
391 /* flow director stats */
392 uint64_t fd_atr_match;
393 uint64_t fd_sb_match;
394 uint64_t fd_atr_tunnel_match;
395 uint32_t fd_atr_status;
396 uint32_t fd_sb_status;
397 /* EEE LPI */
398 uint32_t tx_lpi_status;
399 uint32_t rx_lpi_status;
400 uint64_t tx_lpi_count;
401 uint64_t rx_lpi_count;
402 };
403
404 static const struct ipn3ke_rpst_xstats_name_offset
405 ipn3ke_rpst_hw_port_strings[] = {
406 {"tx_link_down_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats,
407 tx_dropped_link_down)},
408 {"rx_crc_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
409 crc_errors)},
410 {"rx_illegal_byte_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
411 illegal_bytes)},
412 {"rx_error_bytes", offsetof(struct ipn3ke_rpst_hw_port_stats,
413 error_bytes)},
414 {"mac_local_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
415 mac_local_faults)},
416 {"mac_remote_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
417 mac_remote_faults)},
418 {"rx_length_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
419 rx_length_errors)},
420 {"tx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
421 link_xon_tx)},
422 {"rx_xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
423 link_xon_rx)},
424 {"tx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
425 link_xoff_tx)},
426 {"rx_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
427 link_xoff_rx)},
428 {"rx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
429 rx_size_64)},
430 {"rx_size_65_to_127_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
431 rx_size_65_127)},
432 {"rx_size_128_to_255_packets",
433 offsetof(struct ipn3ke_rpst_hw_port_stats,
434 rx_size_128_255)},
435 {"rx_size_256_to_511_packets",
436 offsetof(struct ipn3ke_rpst_hw_port_stats,
437 rx_size_256_511)},
438 {"rx_size_512_to_1023_packets",
439 offsetof(struct ipn3ke_rpst_hw_port_stats,
440 rx_size_512_1023)},
441 {"rx_size_1024_to_1518_packets",
442 offsetof(struct ipn3ke_rpst_hw_port_stats,
443 rx_size_1024_1518)},
444 {"rx_size_1519_to_max_packets",
445 offsetof(struct ipn3ke_rpst_hw_port_stats,
446 rx_size_big)},
447 {"rx_undersized_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
448 rx_undersize)},
449 {"rx_oversize_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
450 rx_oversize)},
451 {"rx_mac_short_dropped", offsetof(struct ipn3ke_rpst_hw_port_stats,
452 mac_short_packet_dropped)},
453 {"rx_fragmented_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
454 rx_fragments)},
455 {"rx_jabber_errors", offsetof(struct ipn3ke_rpst_hw_port_stats,
456 rx_jabber)},
457 {"tx_size_64_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
458 tx_size_64)},
459 {"tx_size_65_to_127_packets",
460 offsetof(struct ipn3ke_rpst_hw_port_stats,
461 tx_size_65_127)},
462 {"tx_size_128_to_255_packets",
463 offsetof(struct ipn3ke_rpst_hw_port_stats,
464 tx_size_128_255)},
465 {"tx_size_256_to_511_packets",
466 offsetof(struct ipn3ke_rpst_hw_port_stats,
467 tx_size_256_511)},
468 {"tx_size_512_to_1023_packets",
469 offsetof(struct ipn3ke_rpst_hw_port_stats,
470 tx_size_512_1023)},
471 {"tx_size_1024_to_1518_packets",
472 offsetof(struct ipn3ke_rpst_hw_port_stats,
473 tx_size_1024_1518)},
474 {"tx_size_1519_to_max_packets",
475 offsetof(struct ipn3ke_rpst_hw_port_stats,
476 tx_size_1519_to_max)},
477 {"rx_flow_director_atr_match_packets",
478 offsetof(struct ipn3ke_rpst_hw_port_stats,
479 fd_atr_match)},
480 {"rx_flow_director_sb_match_packets",
481 offsetof(struct ipn3ke_rpst_hw_port_stats,
482 fd_sb_match)},
483 {"tx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats,
484 tx_lpi_status)},
485 {"rx_low_power_idle_status", offsetof(struct ipn3ke_rpst_hw_port_stats,
486 rx_lpi_status)},
487 {"tx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats,
488 tx_lpi_count)},
489 {"rx_low_power_idle_count", offsetof(struct ipn3ke_rpst_hw_port_stats,
490 rx_lpi_count)},
491 };
492
493 #define IPN3KE_RPST_HW_PORT_XSTATS_CNT (sizeof(ipn3ke_rpst_hw_port_strings) \
494 / sizeof(ipn3ke_rpst_hw_port_strings[0]))
495
496 static const struct ipn3ke_rpst_xstats_name_offset
497 ipn3ke_rpst_rxq_prio_strings[] = {
498 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
499 priority_xon_rx)},
500 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
501 priority_xoff_rx)},
502 };
503
504 #define IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_rxq_prio_strings) \
505 / sizeof(ipn3ke_rpst_rxq_prio_strings[0]))
506
507 static const struct ipn3ke_rpst_xstats_name_offset
508 ipn3ke_rpst_txq_prio_strings[] = {
509 {"xon_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
510 priority_xon_tx)},
511 {"xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
512 priority_xoff_tx)},
513 {"xon_to_xoff_packets", offsetof(struct ipn3ke_rpst_hw_port_stats,
514 priority_xon_2_xoff)},
515 };
516
517 #define IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT (sizeof(ipn3ke_rpst_txq_prio_strings) \
518 / sizeof(ipn3ke_rpst_txq_prio_strings[0]))
519
520 static uint32_t
ipn3ke_rpst_xstats_calc_num(void)521 ipn3ke_rpst_xstats_calc_num(void)
522 {
523 return IPN3KE_RPST_ETH_XSTATS_CNT
524 + IPN3KE_RPST_HW_PORT_XSTATS_CNT
525 + (IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT
526 * IPN3KE_RPST_PRIO_XSTATS_CNT)
527 + (IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT
528 * IPN3KE_RPST_PRIO_XSTATS_CNT);
529 }
530
531 static void
ipn3ke_rpst_25g_nic_side_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)532 ipn3ke_rpst_25g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw,
533 uint16_t port_id)
534 {
535 uint32_t tmp = 0x00000001;
536 /* Bit[0]: Software can set this bit to the value of 1
537 * to reset all of the TX statistics registers at the same time.
538 * This bit is selfclearing.
539 */
540 (*hw->f_mac_write)(hw,
541 tmp,
542 IPN3KE_25G_TX_STATISTICS_CONFIG,
543 port_id,
544 1);
545
546 while (tmp & 0x00000001) {
547 tmp = 0x00000000;
548 (*hw->f_mac_read)(hw,
549 &tmp,
550 IPN3KE_25G_TX_STATISTICS_CONFIG,
551 port_id,
552 1);
553 if (tmp & 0x00000001)
554 usleep(5);
555 else
556 return;
557 }
558 }
559
560 static void
ipn3ke_rpst_25g_nic_side_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)561 ipn3ke_rpst_25g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw,
562 uint16_t port_id)
563 {
564 uint32_t tmp = 0x00000001;
565 /* Bit[0]: Software can set this bit to the value of 1
566 * to reset all of the RX statistics registers at the same time.
567 * This bit is selfclearing.
568 */
569 (*hw->f_mac_write)(hw,
570 tmp,
571 IPN3KE_25G_RX_STATISTICS_CONFIG,
572 port_id,
573 1);
574
575 while (tmp & 0x00000001) {
576 tmp = 0x00000000;
577 (*hw->f_mac_read)(hw,
578 &tmp,
579 IPN3KE_25G_RX_STATISTICS_CONFIG,
580 port_id,
581 1);
582 if (tmp & 0x00000001)
583 usleep(5);
584 else
585 return;
586 }
587 }
588
589 static void
ipn3ke_rpst_10g_nic_side_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)590 ipn3ke_rpst_10g_nic_side_tx_stats_reset(struct ipn3ke_hw *hw,
591 uint16_t port_id)
592 {
593 uint32_t tmp;
594
595 /*Bit [0]: Set this register to 1 to clear all TX statistics
596 *counters.
597 *The IP core clears this bit when all counters are cleared.
598 *Bits [31:1]: Reserved.
599 */
600 tmp = 0x00000000;
601 (*hw->f_mac_read)(hw,
602 &tmp,
603 IPN3KE_10G_TX_STATS_CLR,
604 port_id,
605 1);
606 tmp |= 0x00000001;
607 (*hw->f_mac_write)(hw,
608 tmp,
609 IPN3KE_10G_TX_STATS_CLR,
610 port_id,
611 1);
612 }
613
614 static void
ipn3ke_rpst_10g_nic_side_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)615 ipn3ke_rpst_10g_nic_side_rx_stats_reset(struct ipn3ke_hw *hw,
616 uint16_t port_id)
617 {
618 uint32_t tmp;
619
620 /*Bit [0]: Set this register to 1 to clear all RX statistics
621 *counters.
622 *The IP core clears this bit when all counters are cleared.
623 *Bits [31:1]: Reserved
624 */
625 tmp = 0x00000000;
626 (*hw->f_mac_read)(hw,
627 &tmp,
628 IPN3KE_10G_RX_STATS_CLR,
629 port_id,
630 1);
631 tmp |= 0x00000001;
632 (*hw->f_mac_write)(hw,
633 tmp,
634 IPN3KE_10G_RX_STATS_CLR,
635 port_id,
636 1);
637 }
638
639 static uint64_t
ipn3ke_rpst_read_64bits_statistics_register(uint32_t addr_lo,uint32_t addr_hi,struct ipn3ke_hw * hw,uint16_t port_id)640 ipn3ke_rpst_read_64bits_statistics_register(uint32_t addr_lo,
641 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id)
642 {
643 uint32_t statistics_lo = 0x00000000;
644 uint32_t statistics_hi = 0x00000000;
645 uint64_t statistics = 0x0000000000000000;
646
647 (*hw->f_mac_read)(hw,
648 &statistics_lo,
649 addr_lo,
650 port_id,
651 0);
652
653 (*hw->f_mac_read)(hw,
654 &statistics_hi,
655 addr_hi,
656 port_id,
657 0);
658
659 statistics += statistics_hi;
660 statistics = statistics << IPN3KE_REGISTER_WIDTH;
661 statistics += statistics_lo;
662 return statistics;
663
664 }
665
666 static int
ipn3ke_rpst_read_25g_lineside_stats_registers(struct ipn3ke_hw * hw,uint16_t port_id,struct ipn3ke_rpst_hw_port_stats * hw_stats)667 ipn3ke_rpst_read_25g_lineside_stats_registers
668 (struct ipn3ke_hw *hw,
669 uint16_t port_id,
670 struct ipn3ke_rpst_hw_port_stats *hw_stats)
671 {
672 uint32_t tmp;
673 uint64_t statistics;
674
675 memset(hw_stats, 0, sizeof(*hw_stats));
676
677 /*check Tx statistics is real time.
678 *if statistics has been paused, make it real time.
679 */
680 tmp = 0x00000000;
681 (*hw->f_mac_read)(hw,
682 &tmp,
683 IPN3KE_25G_TX_STATISTICS_CONFIG,
684 port_id,
685 0);
686
687 if (tmp & IPN3KE_25G_TX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
688 tmp &= 0xfffffffb;
689 (*hw->f_mac_write)(hw,
690 tmp,
691 IPN3KE_25G_TX_STATISTICS_CONFIG,
692 port_id,
693 0);
694 }
695
696 tmp = 0x00000000;
697 (*hw->f_mac_read)(hw,
698 &tmp,
699 IPN3KE_25G_TX_STATISTICS_STATUS,
700 port_id,
701 0);
702 if (tmp & IPN3KE_25G_TX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
703 tmp = 0x00000000;
704 (*hw->f_mac_read)(hw,
705 &tmp,
706 IPN3KE_25G_TX_STATISTICS_CONFIG,
707 port_id,
708 0);
709 tmp &= 0xfffffffb;
710 (*hw->f_mac_write)(hw,
711 tmp,
712 IPN3KE_25G_TX_STATISTICS_CONFIG,
713 port_id,
714 0);
715 }
716
717 /*check Rx statistics is real time.
718 *if statistics has been paused, make it real time.
719 */
720 tmp = 0x00000000;
721 (*hw->f_mac_read)(hw,
722 &tmp,
723 IPN3KE_25G_RX_STATISTICS_CONFIG,
724 port_id,
725 0);
726 if (tmp & IPN3KE_25G_RX_STATISTICS_CONFIG_SHADOW_REQUEST_MASK) {
727 tmp &= 0xfffffffb;
728 (*hw->f_mac_write)(hw,
729 tmp,
730 IPN3KE_25G_RX_STATISTICS_CONFIG,
731 port_id,
732 0);
733 }
734
735 tmp = 0x00000000;
736 (*hw->f_mac_read)(hw,
737 &tmp,
738 IPN3KE_25G_RX_STATISTICS_STATUS,
739 port_id,
740 0);
741
742 if (tmp & IPN3KE_25G_RX_STATISTICS_STATUS_SHADOW_REQUEST_MASK) {
743 tmp = 0x00000000;
744 (*hw->f_mac_read)(hw,
745 &tmp,
746 IPN3KE_25G_RX_STATISTICS_CONFIG,
747 port_id,
748 0);
749 tmp &= 0xfffffffb;
750 (*hw->f_mac_write)(hw,
751 tmp,
752 IPN3KE_25G_RX_STATISTICS_CONFIG,
753 port_id,
754 0);
755 }
756
757 /* pause Tx counter to read the statistics */
758 tmp = 0x00000000;
759 (*hw->f_mac_read)(hw,
760 &tmp,
761 IPN3KE_25G_TX_STATISTICS_CONFIG,
762 port_id,
763 0);
764 tmp |= 0x00000004;
765 (*hw->f_mac_write)(hw,
766 tmp,
767 IPN3KE_25G_TX_STATISTICS_CONFIG,
768 port_id,
769 0);
770
771 /* pause Rx counter to read the statistics */
772 tmp = 0x00000000;
773 (*hw->f_mac_read)(hw,
774 &tmp,
775 IPN3KE_25G_RX_STATISTICS_CONFIG,
776 port_id,
777 0);
778 tmp |= 0x00000004;
779 (*hw->f_mac_write)(hw,
780 tmp,
781 IPN3KE_25G_RX_STATISTICS_CONFIG,
782 port_id,
783 0);
784
785 /*Number of transmitted frames less than 64 bytes
786 *and reporting a CRC error
787 */
788 statistics = ipn3ke_rpst_read_64bits_statistics_register(
789 IPN3KE_25G_CNTR_TX_FRAGMENTS_LO,
790 IPN3KE_25G_CNTR_TX_FRAGMENTS_HI,
791 hw, port_id);
792 hw_stats->eth.tx_errors += statistics;
793 hw_stats->crc_errors += statistics;
794
795 /*Number of transmitted oversized frames reporting a CRC error*/
796 statistics = ipn3ke_rpst_read_64bits_statistics_register(
797 IPN3KE_25G_CNTR_TX_JABBERS_LO,
798 IPN3KE_25G_CNTR_TX_JABBERS_HI,
799 hw, port_id);
800 hw_stats->eth.tx_errors += statistics;
801 hw_stats->crc_errors += statistics;
802
803 /* Number of transmitted packets with FCS errors */
804 statistics = ipn3ke_rpst_read_64bits_statistics_register(
805 IPN3KE_25G_CNTR_TX_FCS_LO,
806 IPN3KE_25G_CNTR_TX_FCS_HI,
807 hw, port_id);
808 hw_stats->eth.tx_errors += statistics;
809 hw_stats->checksum_error += statistics;
810
811 /*Number of transmitted frames with a frame of length at
812 *least 64 reporting a CRC error
813 */
814 statistics = ipn3ke_rpst_read_64bits_statistics_register(
815 IPN3KE_25G_CNTR_TX_CRCERR_LO,
816 IPN3KE_25G_CNTR_TX_CRCERR_HI,
817 hw, port_id);
818 hw_stats->eth.tx_errors += statistics;
819 hw_stats->crc_errors += statistics;
820
821 /*Number of errored multicast frames transmitted,
822 *excluding control frames
823 */
824 statistics = ipn3ke_rpst_read_64bits_statistics_register(
825 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_LO,
826 IPN3KE_25G_CNTR_TX_MCAST_DATA_ERR_HI,
827 hw, port_id);
828 hw_stats->eth.tx_errors += statistics;
829
830 /*Number of errored broadcast frames transmitted,
831 *excluding control frames
832 */
833 statistics = ipn3ke_rpst_read_64bits_statistics_register(
834 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_LO,
835 IPN3KE_25G_CNTR_TX_BCAST_DATA_ERR_HI,
836 hw, port_id);
837 hw_stats->eth.tx_errors += statistics;
838
839 /*Number of errored unicast frames transmitted,
840 *excluding control frames
841 */
842 statistics = ipn3ke_rpst_read_64bits_statistics_register(
843 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_LO,
844 IPN3KE_25G_CNTR_TX_UCAST_DATA_ERR_HI,
845 hw, port_id);
846 hw_stats->eth.tx_errors += statistics;
847
848 /* Number of errored multicast control frames transmitted */
849 statistics = ipn3ke_rpst_read_64bits_statistics_register(
850 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_LO,
851 IPN3KE_25G_CNTR_TX_MCAST_CTRL_ERR_HI,
852 hw, port_id);
853 hw_stats->eth.tx_errors += statistics;
854
855 /* Number of errored broadcast control frames transmitted */
856 statistics = ipn3ke_rpst_read_64bits_statistics_register(
857 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_LO,
858 IPN3KE_25G_CNTR_TX_BCAST_CTRL_ERR_HI,
859 hw, port_id);
860 hw_stats->eth.tx_errors += statistics;
861
862 /* Number of errored unicast control frames transmitted */
863 statistics = ipn3ke_rpst_read_64bits_statistics_register(
864 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_LO,
865 IPN3KE_25G_CNTR_TX_UCAST_CTRL_ERR_HI,
866 hw, port_id);
867 hw_stats->eth.tx_errors += statistics;
868
869 /* Number of errored pause frames transmitted */
870 statistics = ipn3ke_rpst_read_64bits_statistics_register(
871 IPN3KE_25G_CNTR_TX_PAUSE_ERR_LO,
872 IPN3KE_25G_CNTR_TX_PAUSE_ERR_HI,
873 hw, port_id);
874 hw_stats->eth.tx_errors += statistics;
875
876 /*Number of 64-byte transmitted frames,
877 *including the CRC field but excluding the preamble
878 *and SFD bytes
879 */
880 statistics = ipn3ke_rpst_read_64bits_statistics_register(
881 IPN3KE_25G_CNTR_TX_64B_LO,
882 IPN3KE_25G_CNTR_TX_64B_HI,
883 hw, port_id);
884 hw_stats->tx_size_64 += statistics;
885
886 /* Number of transmitted frames between 65 and 127 bytes */
887 statistics = ipn3ke_rpst_read_64bits_statistics_register(
888 IPN3KE_25G_CNTR_TX_65_127B_LO,
889 IPN3KE_25G_CNTR_TX_65_127B_HI,
890 hw, port_id);
891 hw_stats->tx_size_65_127 += statistics;
892
893 /* Number of transmitted frames between 128 and 255 bytes */
894 statistics = ipn3ke_rpst_read_64bits_statistics_register(
895 IPN3KE_25G_CNTR_TX_128_255B_LO,
896 IPN3KE_25G_CNTR_TX_128_255B_HI,
897 hw, port_id);
898 hw_stats->tx_size_128_255 += statistics;
899
900 /* Number of transmitted frames between 256 and 511 bytes */
901 statistics = ipn3ke_rpst_read_64bits_statistics_register(
902 IPN3KE_25G_CNTR_TX_256_511B_LO,
903 IPN3KE_25G_CNTR_TX_256_511B_HI,
904 hw, port_id);
905 hw_stats->tx_size_256_511 += statistics;
906
907 /* Number of transmitted frames between 512 and 1023 bytes */
908 statistics = ipn3ke_rpst_read_64bits_statistics_register(
909 IPN3KE_25G_CNTR_TX_512_1023B_LO,
910 IPN3KE_25G_CNTR_TX_512_1023B_HI,
911 hw, port_id);
912 hw_stats->tx_size_512_1023 += statistics;
913
914 /* Number of transmitted frames between 1024 and 1518 bytes */
915 statistics = ipn3ke_rpst_read_64bits_statistics_register(
916 IPN3KE_25G_CNTR_TX_1024_1518B_LO,
917 IPN3KE_25G_CNTR_TX_1024_1518B_HI,
918 hw, port_id);
919 hw_stats->tx_size_1024_1518 += statistics;
920
921 /*Number of transmitted frames of size between 1519 bytes
922 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
923 *register
924 */
925 statistics = ipn3ke_rpst_read_64bits_statistics_register(
926 IPN3KE_25G_CNTR_TX_1519_MAXB_LO,
927 IPN3KE_25G_CNTR_TX_1519_MAXB_HI,
928 hw, port_id);
929 hw_stats->tx_size_1519_to_max += statistics;
930
931 /*Number of oversized frames (frames with more bytes than the
932 *number specified in the MAX_TX_SIZE_CONFIG register)
933 *transmitted
934 */
935 statistics = ipn3ke_rpst_read_64bits_statistics_register(
936 IPN3KE_25G_CNTR_TX_OVERSIZE_LO,
937 IPN3KE_25G_CNTR_TX_OVERSIZE_HI,
938 hw, port_id);
939
940 /*Number of valid multicast frames transmitted,
941 *excluding control frames
942 */
943 statistics = ipn3ke_rpst_read_64bits_statistics_register(
944 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_LO,
945 IPN3KE_25G_CNTR_TX_MCAST_DATA_OK_HI,
946 hw, port_id);
947 hw_stats->eth.tx_multicast += statistics;
948
949 /*Number of valid broadcast frames transmitted,
950 *excluding control frames
951 */
952 statistics = ipn3ke_rpst_read_64bits_statistics_register(
953 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_LO,
954 IPN3KE_25G_CNTR_TX_BCAST_DATA_OK_HI,
955 hw, port_id);
956 hw_stats->eth.tx_broadcast += statistics;
957
958 /*Number of valid unicast frames transmitted,
959 *excluding control frames
960 */
961 statistics = ipn3ke_rpst_read_64bits_statistics_register(
962 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_LO,
963 IPN3KE_25G_CNTR_TX_UCAST_DATA_OK_HI,
964 hw, port_id);
965 hw_stats->eth.tx_unicast += statistics;
966
967 /*Number of valid multicast frames transmitted,
968 *excluding data frames
969 */
970 statistics = ipn3ke_rpst_read_64bits_statistics_register(
971 IPN3KE_25G_CNTR_TX_MCAST_CTRL_LO,
972 IPN3KE_25G_CNTR_TX_MCAST_CTRL_HI,
973 hw, port_id);
974 hw_stats->eth.tx_multicast += statistics;
975
976 /*Number of valid broadcast frames transmitted,
977 *excluding data frames
978 */
979 statistics = ipn3ke_rpst_read_64bits_statistics_register(
980 IPN3KE_25G_CNTR_TX_BCAST_CTRL_LO,
981 IPN3KE_25G_CNTR_TX_BCAST_CTRL_HI,
982 hw, port_id);
983 hw_stats->eth.tx_broadcast += statistics;
984
985 /*Number of valid unicast frames transmitted,
986 *excluding data frames
987 */
988 statistics = ipn3ke_rpst_read_64bits_statistics_register(
989 IPN3KE_25G_CNTR_TX_UCAST_CTRL_LO,
990 IPN3KE_25G_CNTR_TX_UCAST_CTRL_HI,
991 hw, port_id);
992 hw_stats->eth.tx_unicast += statistics;
993
994 /* Number of valid pause frames transmitted */
995 statistics = ipn3ke_rpst_read_64bits_statistics_register(
996 IPN3KE_25G_CNTR_TX_PAUSE_LO,
997 IPN3KE_25G_CNTR_TX_PAUSE_HI,
998 hw, port_id);
999
1000 /*Number of transmitted runt packets. The IP core does not
1001 *transmit frames of length less than nine bytes.
1002 *The IP core pads frames of length nine bytes to 64 bytes to
1003 *extend them to 64 bytes. Therefore, this counter does not
1004 *increment in normal operating conditions.
1005 */
1006 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1007 IPN3KE_25G_CNTR_TX_RUNT_LO,
1008 IPN3KE_25G_CNTR_TX_RUNT_HI,
1009 hw, port_id);
1010
1011 /*Number of transmitted payload bytes in frames with no FCS,
1012 *undersized, oversized, or payload length errors.
1013 *If VLAN detection is turned off for the TX MAC (bit[1]
1014 *of the TX_MAC_CONTROL register at offset 0x40A has
1015 *the value of 1), the IP core counts the VLAN header bytes
1016 *(4 bytes for VLAN and 8 bytes for stacked VLAN)
1017 *as payload bytes. This register is compliant with
1018 *the requirements for aOctetsTransmittedOK in section
1019 *5.2.2.1.8 of the IEEE Standard 802.3-2008.
1020 */
1021 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1022 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_LO,
1023 IPN3KE_25G_TX_PAYLOAD_OCTETS_OK_HI,
1024 hw, port_id);
1025 hw_stats->eth.tx_bytes += statistics;
1026
1027 /*Number of transmitted bytes in frames with no FCS, undersized,
1028 *oversized, or payload length errors. This register is
1029 *compliant with the requirements for ifOutOctets in RFC3635
1030 *(Managed Objects for Ethernet-like Interface Types)
1031 *and TX etherStatsOctets in RFC2819(Remote Network Monitoring
1032 *Management Information Base (RMON)).
1033 */
1034 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1035 IPN3KE_25G_TX_FRAME_OCTETS_OK_LO,
1036 IPN3KE_25G_TX_FRAME_OCTETS_OK_HI,
1037 hw, port_id);
1038
1039 /*Number of received frames less than 64 bytes
1040 *and reporting a CRC error
1041 */
1042 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1043 IPN3KE_25G_CNTR_RX_FRAGMENTS_LO,
1044 IPN3KE_25G_CNTR_RX_FRAGMENTS_HI,
1045 hw, port_id);
1046 hw_stats->eth.rx_discards += statistics;
1047 hw_stats->crc_errors += statistics;
1048 hw_stats->rx_length_errors += statistics;
1049
1050 /* Number of received oversized frames reporting a CRC error */
1051 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1052 IPN3KE_25G_CNTR_RX_JABBERS_LO,
1053 IPN3KE_25G_CNTR_RX_JABBERS_HI,
1054 hw, port_id);
1055 hw_stats->eth.rx_discards += statistics;
1056 hw_stats->crc_errors += statistics;
1057 hw_stats->rx_length_errors += statistics;
1058
1059 /*Number of received packets with FCS errors.
1060 *This register maintains a count of the number of pulses
1061 *on the "l<n>_rx_fcs_error" or "rx_fcs_error" output signal
1062 */
1063 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1064 IPN3KE_25G_CNTR_RX_FCS_LO,
1065 IPN3KE_25G_CNTR_RX_FCS_HI,
1066 hw, port_id);
1067 hw_stats->eth.rx_discards += statistics;
1068 hw_stats->checksum_error += statistics;
1069
1070 /*Number of received frames with a frame of length at least 64
1071 *with CRC error
1072 */
1073 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1074 IPN3KE_25G_CNTR_RX_CRCERR_LO,
1075 IPN3KE_25G_CNTR_RX_CRCERR_HI,
1076 hw, port_id);
1077 hw_stats->eth.rx_discards += statistics;
1078 hw_stats->crc_errors += statistics;
1079
1080 /*Number of errored multicast frames received,
1081 *excluding control frames
1082 */
1083 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1084 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_LO,
1085 IPN3KE_25G_CNTR_RX_MCAST_DATA_ERR_HI,
1086 hw, port_id);
1087 hw_stats->eth.rx_discards += statistics;
1088
1089 /*Number of errored broadcast frames received,
1090 *excluding control frames
1091 */
1092 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1093 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_LO,
1094 IPN3KE_25G_CNTR_RX_BCAST_DATA_ERR_HI,
1095 hw, port_id);
1096 hw_stats->eth.rx_discards += statistics;
1097
1098 /*Number of errored unicast frames received,
1099 *excluding control frames
1100 */
1101 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1102 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_LO,
1103 IPN3KE_25G_CNTR_RX_UCAST_DATA_ERR_HI,
1104 hw, port_id);
1105 hw_stats->eth.rx_discards += statistics;
1106
1107 /* Number of errored multicast control frames received */
1108 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1109 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_LO,
1110 IPN3KE_25G_CNTR_RX_MCAST_CTRL_ERR_HI,
1111 hw, port_id);
1112 hw_stats->eth.rx_discards += statistics;
1113
1114 /* Number of errored broadcast control frames received */
1115 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1116 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_LO,
1117 IPN3KE_25G_CNTR_RX_BCAST_CTRL_ERR_HI,
1118 hw, port_id);
1119 hw_stats->eth.rx_discards += statistics;
1120
1121 /* Number of errored unicast control frames received */
1122 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1123 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_LO,
1124 IPN3KE_25G_CNTR_RX_UCAST_CTRL_ERR_HI,
1125 hw, port_id);
1126 hw_stats->eth.rx_discards += statistics;
1127
1128 /* Number of errored pause frames received */
1129 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1130 IPN3KE_25G_CNTR_RX_PAUSE_ERR_LO,
1131 IPN3KE_25G_CNTR_RX_PAUSE_ERR_HI,
1132 hw, port_id);
1133 hw_stats->eth.rx_discards += statistics;
1134
1135 /*Number of 64-byte received frames,
1136 *including the CRC field but excluding the preamble
1137 *and SFD bytes
1138 */
1139 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1140 IPN3KE_25G_CNTR_RX_64B_LO,
1141 IPN3KE_25G_CNTR_RX_64B_HI,
1142 hw, port_id);
1143 hw_stats->rx_size_64 += statistics;
1144
1145 /*Number of received frames between 65 and 127 bytes */
1146 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1147 IPN3KE_25G_CNTR_RX_65_127B_LO,
1148 IPN3KE_25G_CNTR_RX_65_127B_HI,
1149 hw, port_id);
1150 hw_stats->rx_size_65_127 += statistics;
1151
1152 /*Number of received frames between 128 and 255 bytes
1153 */
1154 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1155 IPN3KE_25G_CNTR_RX_128_255B_LO,
1156 IPN3KE_25G_CNTR_RX_128_255B_HI,
1157 hw, port_id);
1158 hw_stats->rx_size_128_255 += statistics;
1159
1160 /*Number of received frames between 256 and 511 bytes
1161 */
1162 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1163 IPN3KE_25G_CNTR_RX_256_511B_LO,
1164 IPN3KE_25G_CNTR_RX_256_511B_HI,
1165 hw, port_id);
1166 hw_stats->rx_size_256_511 += statistics;
1167
1168 /*Number of received frames between 512 and 1023 bytes
1169 */
1170 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1171 IPN3KE_25G_CNTR_RX_512_1023B_LO,
1172 IPN3KE_25G_CNTR_RX_512_1023B_HI,
1173 hw, port_id);
1174 hw_stats->rx_size_512_1023 += statistics;
1175
1176 /*Number of received frames between 1024 and 1518 bytes
1177 */
1178 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1179 IPN3KE_25G_CNTR_RX_1024_1518B_LO,
1180 IPN3KE_25G_CNTR_RX_1024_1518B_HI,
1181 hw, port_id);
1182 hw_stats->rx_size_1024_1518 += statistics;
1183
1184 /*Number of received frames of size between 1519 bytes
1185 *and the number of bytes specified in the MAX_TX_SIZE_CONFIG
1186 *register
1187 */
1188 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1189 IPN3KE_25G_CNTR_RX_1519_MAXB_LO,
1190 IPN3KE_25G_CNTR_RX_1519_MAXB_HI,
1191 hw, port_id);
1192 hw_stats->rx_size_big += statistics;
1193
1194 /*Number of oversized frames (frames with more bytes
1195 *than the number specified in the MAX_TX_SIZE_CONFIG register)
1196 *received
1197 */
1198 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1199 IPN3KE_25G_CNTR_RX_OVERSIZE_LO,
1200 IPN3KE_25G_CNTR_RX_OVERSIZE_HI,
1201 hw, port_id);
1202 hw_stats->rx_jabber += statistics;
1203
1204 /*Number of valid multicast frames received,
1205 *excluding control frames
1206 */
1207 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1208 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_LO,
1209 IPN3KE_25G_CNTR_RX_MCAST_DATA_OK_HI,
1210 hw, port_id);
1211 hw_stats->eth.rx_multicast += statistics;
1212
1213 /*Number of valid broadcast frames received,
1214 *excluding control frames
1215 */
1216 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1217 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_LO,
1218 IPN3KE_25G_CNTR_RX_BCAST_DATA_OK_HI,
1219 hw, port_id);
1220 hw_stats->eth.rx_broadcast += statistics;
1221
1222 /*Number of valid unicast frames received,
1223 *excluding control frames
1224 */
1225 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1226 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_LO,
1227 IPN3KE_25G_CNTR_RX_UCAST_DATA_OK_HI,
1228 hw, port_id);
1229 hw_stats->eth.rx_unicast += statistics;
1230
1231 /*Number of valid multicast frames received,
1232 *excluding data frames
1233 */
1234 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1235 IPN3KE_25G_CNTR_RX_MCAST_CTRL_LO,
1236 IPN3KE_25G_CNTR_RX_MCAST_CTRL_HI,
1237 hw, port_id);
1238 hw_stats->eth.rx_multicast += statistics;
1239
1240 /*Number of valid broadcast frames received,
1241 *excluding data frames
1242 */
1243 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1244 IPN3KE_25G_CNTR_RX_BCAST_CTRL_LO,
1245 IPN3KE_25G_CNTR_RX_BCAST_CTRL_HI,
1246 hw, port_id);
1247 hw_stats->eth.rx_broadcast += statistics;
1248
1249 /*Number of valid unicast frames received,
1250 *excluding data frames
1251 */
1252 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1253 IPN3KE_25G_CNTR_RX_UCAST_CTRL_LO,
1254 IPN3KE_25G_CNTR_RX_UCAST_CTRL_HI,
1255 hw, port_id);
1256 hw_stats->eth.rx_unicast += statistics;
1257
1258 /*Number of received pause frames, with or without error
1259 */
1260 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1261 IPN3KE_25G_CNTR_RX_PAUSE_LO,
1262 IPN3KE_25G_CNTR_RX_PAUSE_HI,
1263 hw, port_id);
1264
1265 /*Number of received runt packets. A runt is a packet of size
1266 *less than 64 bytes but greater than eight bytes.
1267 *If a packet is eight bytes or smaller, it is considered
1268 *a decoding error and not a runt frame, and the IP core
1269 *does not flag it nor count it as a runt.
1270 */
1271 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1272 IPN3KE_25G_CNTR_RX_RUNT_LO,
1273 IPN3KE_25G_CNTR_RX_RUNT_HI,
1274 hw, port_id);
1275
1276 /*Number of received payload bytes in frames with no FCS,
1277 *undersized, oversized, or payload length errors.
1278 *If VLAN detection is turned off for the RX MAC (bit [1] of the
1279 *"RXMAC_CONTROL" register at offset 0x50A has the value of 1),
1280 *the IP core counts the VLAN header bytes (4 bytes for VLAN and
1281 *8 bytes for stacked VLAN) as payload bytes.
1282 *This register is compliant with the requirements for
1283 *aOctetsReceivedOK in section 5.2.2.1.14 of the IEEE Standard
1284 *802.3-2008
1285 */
1286 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1287 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_LO,
1288 IPN3KE_25G_RX_PAYLOAD_OCTETS_OK_HI,
1289 hw, port_id);
1290 hw_stats->eth.rx_bytes += statistics;
1291
1292 /*Number of received bytes in frames with no FCS, undersized,
1293 *oversized, or payload length errors.
1294 *This register is compliant with the requirements for
1295 *ifInOctets in RFC3635 (Managed Objects for Ethernet-like
1296 *Interface Types) and RX etherStatsOctets in RFC2819
1297 *(Remote Network Monitoring Management Information Base
1298 *(RMON)).
1299 */
1300 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1301 IPN3KE_25G_RX_FRAME_OCTETS_OK_LO,
1302 IPN3KE_25G_RX_FRAME_OCTETS_OK_HI,
1303 hw, port_id);
1304
1305 /*resume Tx counter to real time
1306 */
1307 tmp = 0x00000000;
1308 (*hw->f_mac_read)(hw,
1309 &tmp,
1310 IPN3KE_25G_TX_STATISTICS_CONFIG,
1311 port_id,
1312 0);
1313 tmp &= 0xfffffffb;
1314 (*hw->f_mac_write)(hw,
1315 tmp,
1316 IPN3KE_25G_TX_STATISTICS_CONFIG,
1317 port_id,
1318 0);
1319
1320 /*resume Rx counter to real time
1321 */
1322 tmp = 0x00000000;
1323 (*hw->f_mac_read)(hw,
1324 &tmp,
1325 IPN3KE_25G_RX_STATISTICS_CONFIG,
1326 port_id,
1327 0);
1328 tmp &= 0xfffffffb;
1329 (*hw->f_mac_write)(hw,
1330 tmp,
1331 IPN3KE_25G_RX_STATISTICS_CONFIG,
1332 port_id,
1333 0);
1334
1335 return 0;
1336 }
1337
1338 static void
ipn3ke_rpst_25g_lineside_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)1339 ipn3ke_rpst_25g_lineside_tx_stats_reset(struct ipn3ke_hw *hw,
1340 uint16_t port_id)
1341 {
1342 uint32_t tmp = 0x00000001;
1343 /* Bit[0]: Software can set this bit to the value of 1
1344 * to reset all of the TX statistics registers at the same time.
1345 * This bit is selfclearing.
1346 */
1347 (*hw->f_mac_write)(hw,
1348 tmp,
1349 IPN3KE_25G_TX_STATISTICS_CONFIG,
1350 port_id,
1351 0);
1352
1353 while (tmp & 0x00000001) {
1354 tmp = 0x00000000;
1355 (*hw->f_mac_read)(hw,
1356 &tmp,
1357 IPN3KE_25G_TX_STATISTICS_CONFIG,
1358 port_id,
1359 0);
1360 if (tmp & 0x00000001)
1361 usleep(5);
1362 else
1363 return;
1364 }
1365 }
1366
1367 static void
ipn3ke_rpst_25g_lineside_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)1368 ipn3ke_rpst_25g_lineside_rx_stats_reset(struct ipn3ke_hw *hw,
1369 uint16_t port_id)
1370 {
1371 uint32_t tmp = 0x00000001;
1372 /* Bit[0]: Software can set this bit to the value of 1
1373 * to reset all of the RX statistics registers at the same time.
1374 * This bit is selfclearing.
1375 */
1376 (*hw->f_mac_write)(hw,
1377 tmp,
1378 IPN3KE_25G_RX_STATISTICS_CONFIG,
1379 port_id,
1380 0);
1381
1382 while (tmp & 0x00000001) {
1383 tmp = 0x00000000;
1384 (*hw->f_mac_read)(hw,
1385 &tmp,
1386 IPN3KE_25G_RX_STATISTICS_CONFIG,
1387 port_id,
1388 0);
1389 if (tmp & 0x00000001)
1390 usleep(5);
1391 else
1392 return;
1393 }
1394 }
1395
1396 static uint64_t
ipn3ke_rpst_read_36bits_statistics_register(uint32_t addr_lo,uint32_t addr_hi,struct ipn3ke_hw * hw,uint16_t port_id)1397 ipn3ke_rpst_read_36bits_statistics_register(uint32_t addr_lo,
1398 uint32_t addr_hi, struct ipn3ke_hw *hw, uint16_t port_id)
1399 {
1400 uint32_t statistics_lo = 0x00000000;
1401 uint32_t statistics_hi = 0x00000000;
1402 uint64_t statistics = 0x0000000000000000;
1403
1404 (*hw->f_mac_read)(hw,
1405 &statistics_lo,
1406 addr_lo,
1407 port_id,
1408 0);
1409 (*hw->f_mac_read)(hw,
1410 &statistics_hi,
1411 addr_hi,
1412 port_id,
1413 0);
1414 statistics_hi &= IPN3KE_10G_STATS_HI_VALID_MASK;
1415 statistics += statistics_hi;
1416 statistics = statistics << IPN3KE_REGISTER_WIDTH;
1417 statistics += statistics_lo;
1418 return statistics;
1419 }
1420
1421 static int
ipn3ke_rpst_read_10g_lineside_stats_registers(struct ipn3ke_hw * hw,uint16_t port_id,struct ipn3ke_rpst_hw_port_stats * hw_stats,struct rte_eth_stats * stats)1422 ipn3ke_rpst_read_10g_lineside_stats_registers
1423 (struct ipn3ke_hw *hw,
1424 uint16_t port_id,
1425 struct ipn3ke_rpst_hw_port_stats *hw_stats,
1426 struct rte_eth_stats *stats)
1427 {
1428 uint64_t statistics = 0;
1429
1430 memset(hw_stats, 0, sizeof(*hw_stats));
1431 memset(stats, 0, sizeof(*stats));
1432
1433 /*36-bit statistics counter that collects the number of frames
1434 *that are successfully transmitted, including control frames.
1435 */
1436 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1437 IPN3KE_10G_TX_STATS_FRAME_OK_LO,
1438 IPN3KE_10G_TX_STATS_FRAME_OK_HI,
1439 hw, port_id);
1440 stats->opackets = statistics;
1441
1442 /*36-bit statistics counter that collects the number of frames
1443 *that are successfully received, including control frames.
1444 */
1445 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1446 IPN3KE_10G_RX_STATS_FRAME_OK_LO,
1447 IPN3KE_10G_RX_STATS_FRAME_OK_HI,
1448 hw, port_id);
1449 stats->ipackets = statistics;
1450
1451 /*36-bit statistics counter that collects the number of frames
1452 *transmitted with error, including control frames.
1453 */
1454 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1455 IPN3KE_10G_TX_STATS_FRAME_ERR_LO,
1456 IPN3KE_10G_TX_STATS_FRAME_ERR_HI,
1457 hw, port_id);
1458 stats->oerrors = statistics;
1459 hw_stats->eth.tx_errors = statistics;
1460
1461 /*36-bit statistics counter that collects the number of frames
1462 *received with error, including control frames.
1463 */
1464 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1465 IPN3KE_10G_RX_STATS_FRAME_ERR_LO,
1466 IPN3KE_10G_RX_STATS_FRAME_ERR_HI,
1467 hw, port_id);
1468 stats->ierrors = statistics;
1469 hw_stats->eth.rx_discards = statistics;
1470
1471 /*36-bit statistics counter that collects the number
1472 *of RX frames with CRC error.
1473 */
1474 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1475 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_LO,
1476 IPN3KE_10G_RX_STATS_FRAME_CRC_ERR_HI,
1477 hw, port_id);
1478 hw_stats->crc_errors = statistics;
1479
1480 /*64-bit statistics counter that collects the payload length,
1481 *including the bytes in control frames.
1482 *The payload length is the number of data and padding bytes
1483 *transmitted.
1484 *If the tx_vlan_detection[0] register bit is set to 1,
1485 *the VLAN and stacked VLAN tags are counted as part of
1486 *the TX payload.
1487 */
1488 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1489 IPN3KE_10G_TX_STATS_OCTETS_OK_LO,
1490 IPN3KE_10G_TX_STATS_OCTETS_OK_HI,
1491 hw, port_id);
1492 stats->obytes = statistics;
1493 hw_stats->eth.tx_bytes = statistics;
1494
1495 /*64-bit statistics counter that collects the payload length,
1496 *including the bytes in control frames.
1497 *The payload length is the number of data and padding bytes
1498 *received.
1499 *If the rx_vlan_detection[0] register bit is set to 1,
1500 *the VLAN and stacked VLAN tags are counted as part of
1501 *the RX payload.
1502 */
1503 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1504 IPN3KE_10G_RX_STATS_OCTETS_OK_LO,
1505 IPN3KE_10G_RX_STATS_OCTETS_OK_HI,
1506 hw, port_id);
1507 stats->ibytes = statistics;
1508 hw_stats->eth.rx_bytes = statistics;
1509
1510 /*36-bit statistics counter that collects the number of
1511 *valid pause frames transmitted.
1512 */
1513 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1514 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
1515 IPN3KE_10G_TX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
1516 hw, port_id);
1517
1518 /*36-bit statistics counter that collects the number of
1519 *valid pause frames received.
1520 */
1521 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1522 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_LO,
1523 IPN3KE_10G_RX_STATS_PAUSE_MAC_CTRL_FRAMES_HI,
1524 hw, port_id);
1525
1526 /*36-bit statistics counter that collects the number of frames
1527 *transmitted that are invalid and with error.
1528 */
1529 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1530 IPN3KE_10G_TX_STATS_IF_ERRORS_LO,
1531 IPN3KE_10G_TX_STATS_IF_ERRORS_HI,
1532 hw, port_id);
1533
1534 /*36-bit statistics counter that collects the number of frames
1535 *received that are invalid and with error.
1536 */
1537 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1538 IPN3KE_10G_RX_STATS_IF_ERRORS_LO,
1539 IPN3KE_10G_RX_STATS_IF_ERRORS_HI,
1540 hw, port_id);
1541
1542 /*36-bit statistics counter that collects the number of
1543 *good unicast frames transmitted,
1544 *excluding control frames.
1545 */
1546 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1547 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_LO,
1548 IPN3KE_10G_TX_STATS_UNICAST_FRAME_OK_HI,
1549 hw, port_id);
1550 hw_stats->eth.tx_unicast = statistics;
1551
1552 /*36-bit statistics counter that collects the number of
1553 *good unicast frames received,
1554 *excluding control frames.
1555 */
1556 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1557 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_LO,
1558 IPN3KE_10G_RX_STATS_UNICAST_FRAME_OK_HI,
1559 hw, port_id);
1560 hw_stats->eth.rx_unicast = statistics;
1561
1562 /*36-bit statistics counter that collects the number of
1563 *unicast frames transmitted with error,
1564 *excluding control frames.
1565 */
1566 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1567 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_LO,
1568 IPN3KE_10G_TX_STATS_UNICAST_FRAME_ERR_HI,
1569 hw, port_id);
1570
1571 /*36-bit statistics counter that collects the number of
1572 *unicast frames received with error,
1573 *excluding control frames.
1574 */
1575 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1576 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_LO,
1577 IPN3KE_10G_RX_STATS_UNICAST_FRAME_ERR_HI,
1578 hw, port_id);
1579
1580 /*36-bit statistics counter that collects the number of
1581 *good multicast frames transmitted,
1582 *excluding control frames.
1583 */
1584 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1585 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_LO,
1586 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_OK_HI,
1587 hw, port_id);
1588 hw_stats->eth.tx_multicast = statistics;
1589
1590 /*36-bit statistics counter that collects the number of
1591 *good multicast frames received,
1592 *excluding control frames.
1593 */
1594 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1595 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_LO,
1596 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_OK_HI,
1597 hw, port_id);
1598 hw_stats->eth.rx_multicast = statistics;
1599
1600 /*36-bit statistics counter that collects the number of
1601 *multicast frames transmitted with error,
1602 *excluding control frames.
1603 */
1604 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1605 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_LO,
1606 IPN3KE_10G_TX_STATS_MULTICAST_FRAME_ERR_HI,
1607 hw, port_id);
1608
1609 /*36-bit statistics counter that collects the number
1610 *of multicast frames received with error,
1611 *excluding control frames.
1612 */
1613 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1614 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_LO,
1615 IPN3KE_10G_RX_STATS_MULTICAST_FRAME_ERR_HI,
1616 hw, port_id);
1617
1618 /*36-bit statistics counter that collects the number of
1619 *good broadcast frames transmitted,
1620 *excluding control frames.
1621 */
1622 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1623 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_LO,
1624 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_OK_HI,
1625 hw, port_id);
1626 hw_stats->eth.tx_broadcast = statistics;
1627
1628 /*36-bit statistics counter that collects the number of
1629 *good broadcast frames received,
1630 *excluding control frames.
1631 */
1632 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1633 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_LO,
1634 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_OK_HI,
1635 hw, port_id);
1636 hw_stats->eth.rx_broadcast = statistics;
1637
1638 /*36-bit statistics counter that collects the number
1639 *of broadcast frames transmitted with error,
1640 *excluding control frames.
1641 */
1642 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1643 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_LO,
1644 IPN3KE_10G_TX_STATS_BROADCAST_FRAME_ERR_HI,
1645 hw, port_id);
1646
1647 /*36-bit statistics counter that collects the number of
1648 *broadcast frames received with error,
1649 *excluding control frames.
1650 */
1651 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1652 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_LO,
1653 IPN3KE_10G_RX_STATS_BROADCAST_FRAME_ERR_HI,
1654 hw, port_id);
1655
1656 /*64-bit statistics counter that collects the total number of
1657 *octets transmitted.
1658 *This count includes good, errored, and invalid frames.
1659 */
1660 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1661 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_LO,
1662 IPN3KE_10G_TX_STATS_ETHER_STATS_OCTETS_HI,
1663 hw, port_id);
1664
1665 /*64-bit statistics counter that collects the total number of
1666 *octets received.
1667 *This count includes good, errored, and invalid frames.
1668 */
1669 statistics = ipn3ke_rpst_read_64bits_statistics_register(
1670 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_LO,
1671 IPN3KE_10G_RX_STATS_ETHER_STATS_OCTETS_HI,
1672 hw, port_id);
1673
1674 /*36-bit statistics counter that collects the total number of
1675 *good, errored, and invalid frames transmitted.
1676 */
1677 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1678 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_LO,
1679 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_HI,
1680 hw, port_id);
1681
1682 /*36-bit statistics counter that collects the total number of
1683 *good, errored, and invalid frames received.
1684 */
1685 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1686 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_LO,
1687 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_HI,
1688 hw, port_id);
1689
1690 /*36-bit statistics counter that collects the number of
1691 *undersized TX frames.
1692 */
1693 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1694 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
1695 IPN3KE_10G_TX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
1696 hw, port_id);
1697
1698 /*36-bit statistics counter that collects the number of
1699 *undersized RX frames.
1700 */
1701 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1702 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_LO,
1703 IPN3KE_10G_RX_STATS_ETHER_STATS_UNDER_SIZE_PKTS_HI,
1704 hw, port_id);
1705 hw_stats->rx_undersize = statistics;
1706
1707 /*36-bit statistics counter that collects the number of
1708 *TX frames whose length exceeds the maximum frame length
1709 *specified.
1710 */
1711 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1712 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
1713 IPN3KE_10G_TX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
1714 hw, port_id);
1715
1716 /*36-bit statistics counter that collects the number of
1717 *RX frames whose length exceeds the maximum frame length
1718 *specified.
1719 */
1720 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1721 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_LO,
1722 IPN3KE_10G_RX_STATS_ETHER_STATS_OVER_SIZE_PKTS_HI,
1723 hw, port_id);
1724 hw_stats->rx_oversize = statistics;
1725
1726 /*36-bit statistics counter that collects the number of
1727 *64-byte TX frames,
1728 *including the CRC field
1729 *but excluding the preamble and SFD bytes.
1730 *This count includes good, errored, and invalid frames.
1731 */
1732 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1733 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
1734 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
1735 hw, port_id);
1736 hw_stats->tx_size_64 = statistics;
1737
1738 /*36-bit statistics counter that collects the number of
1739 *64-byte RX frames,
1740 *including the CRC field
1741 *but excluding the preamble and SFD bytes.
1742 *This count includes good, errored, and invalid frames.
1743 */
1744 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1745 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_LO,
1746 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_64_OCTETS_HI,
1747 hw, port_id);
1748 hw_stats->rx_size_64 = statistics;
1749
1750 /*36-bit statistics counter that collects the number of
1751 *TX frames between the length of 65 and 127 bytes,
1752 *including the CRC field
1753 *but excluding the preamble and SFD bytes.
1754 *This count includes good, errored, and invalid frames.
1755 */
1756 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1757 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
1758 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
1759 hw, port_id);
1760 hw_stats->tx_size_65_127 = statistics;
1761
1762 /*36-bit statistics counter that collects the number of
1763 *RX frames between the length of 65 and 127 bytes,
1764 *including the CRC field
1765 *but excluding the preamble and SFD bytes.
1766 *This count includes good, errored, and invalid frames.
1767 */
1768 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1769 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_LO,
1770 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_65_127_OCTETS_HI,
1771 hw, port_id);
1772 hw_stats->rx_size_65_127 = statistics;
1773
1774 /*36-bit statistics counter that collects the number of
1775 *TX frames between the length of 128 and 255 bytes,
1776 *including the CRC field
1777 *but excluding the preamble and SFD bytes.
1778 *This count includes good, errored, and invalid frames.
1779 */
1780 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1781 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
1782 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
1783 hw, port_id);
1784 hw_stats->tx_size_128_255 = statistics;
1785
1786 /*36-bit statistics counter that collects the number of
1787 *RX frames between the length of 128 and 255 bytes,
1788 *including the CRC field
1789 *but excluding the preamble and SFD bytes.
1790 *This count includes good, errored, and invalid frames.
1791 */
1792 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1793 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_LO,
1794 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_128_255_OCTETS_HI,
1795 hw, port_id);
1796 hw_stats->rx_size_128_255 = statistics;
1797
1798 /*36-bit statistics counter that collects the number of
1799 *TX frames between the length of 256 and 511 bytes,
1800 *including the CRC field
1801 *but excluding the preamble and SFD bytes.
1802 *This count includes good, errored, and invalid frames.
1803 */
1804 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1805 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
1806 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
1807 hw, port_id);
1808 hw_stats->tx_size_256_511 = statistics;
1809
1810 /*36-bit statistics counter that collects the number of
1811 *RX frames between the length of 256 and 511 bytes,
1812 *including the CRC field
1813 *but excluding the preamble and SFD bytes.
1814 *This count includes good, errored, and invalid frames.
1815 */
1816 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1817 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_LO,
1818 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_256_511_OCTETS_HI,
1819 hw, port_id);
1820 hw_stats->rx_size_256_511 = statistics;
1821
1822 /*36-bit statistics counter that collects the number of
1823 *TX frames between the length of 512 and 1023 bytes,
1824 *including the CRC field
1825 *but excluding the preamble and SFD bytes.
1826 *This count includes good, errored, and invalid frames.
1827 */
1828 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1829 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
1830 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
1831 hw, port_id);
1832 hw_stats->tx_size_512_1023 = statistics;
1833
1834 /*36-bit statistics counter that collects the number of
1835 *RX frames between the length of 512 and 1023 bytes,
1836 *including the CRC field
1837 *but excluding the preamble and SFD bytes.
1838 *This count includes good, errored, and invalid frames.
1839 */
1840 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1841 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_LO,
1842 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_512_1023_OCTETS_HI,
1843 hw, port_id);
1844 hw_stats->rx_size_512_1023 = statistics;
1845
1846 /*36-bit statistics counter that collects the number of
1847 *TX frames between the length of 1024 and 1518 bytes,
1848 *including the CRC field but
1849 *excluding the preamble and SFD bytes.
1850 *This count includes good, errored, and invalid frames.
1851 */
1852 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1853 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
1854 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
1855 hw, port_id);
1856 hw_stats->tx_size_1024_1518 = statistics;
1857
1858 /*36-bit statistics counter that collects the number of
1859 *RX frames between the length of 1024 and 1518 bytes,
1860 *including the CRC field
1861 *but excluding the preamble and SFD bytes.
1862 *This count includes good, errored, and invalid frames.
1863 */
1864 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1865 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_LO,
1866 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1024_1518_OCTETS_HI,
1867 hw, port_id);
1868 hw_stats->rx_size_1024_1518 = statistics;
1869
1870 /*36-bit statistics counter that collects the number of
1871 *TX frames equal or more than the length of 1,519 bytes,
1872 *including the CRC field
1873 *but excluding the preamble and SFD bytes.
1874 *This count includes good, errored, and invalid frames.
1875 */
1876 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1877 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
1878 IPN3KE_10G_TX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
1879 hw, port_id);
1880 hw_stats->tx_size_1519_to_max = statistics;
1881
1882 /*36-bit statistics counter that collects the number of
1883 *RX frames equal or more than the length of 1,519 bytes,
1884 *including the CRC field
1885 *but excluding the preamble and SFD bytes.
1886 *This count includes good,
1887 *errored, and invalid frames.
1888 */
1889 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1890 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_LO,
1891 IPN3KE_10G_RX_STATS_ETHER_STATS_PKTS_1519_X_OCTETS_HI,
1892 hw, port_id);
1893 hw_stats->rx_size_big = statistics;
1894
1895 /*36-bit statistics counter that collects the total number of
1896 *RX frames with length less than 64 bytes and CRC error.
1897 *The MAC does not drop these frames.
1898 */
1899 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1900 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_LO,
1901 IPN3KE_10G_RX_STATS_ETHER_STATS_FRAGMENTS_HI,
1902 hw, port_id);
1903
1904 /*36-bit statistics counter that collects the number of
1905 *oversized RX frames with CRC error.
1906 *The MAC does not drop these frames.
1907 */
1908 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1909 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_LO,
1910 IPN3KE_10G_RX_STATS_ETHER_STATS_JABBERS_HI,
1911 hw, port_id);
1912
1913 /*36-bit statistics counter that collects the number of
1914 *RX frames with CRC error,
1915 *whose length is between 64 and the maximum frame length
1916 *specified in the register.
1917 *The MAC does not drop these frames.
1918 */
1919 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1920 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_LO,
1921 IPN3KE_10G_RX_STATS_ETHER_STATS_CRC_ERR_HI,
1922 hw, port_id);
1923
1924 /*36-bit statistics counter that collects the number of
1925 *valid TX unicast control frames.
1926 */
1927 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1928 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
1929 IPN3KE_10G_TX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
1930 hw, port_id);
1931 hw_stats->eth.tx_unicast += statistics;
1932
1933 /*36-bit statistics counter that collects the number of
1934 *valid RX unicast control frames.
1935 */
1936 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1937 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_LO,
1938 IPN3KE_10G_RX_STATS_UNICAST_MAC_CTRL_FRAMES_HI,
1939 hw, port_id);
1940 hw_stats->eth.rx_unicast += statistics;
1941
1942 /*36-bit statistics counter that collects the number of
1943 *valid TX multicast control frames.
1944 */
1945 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1946 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
1947 IPN3KE_10G_TX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
1948 hw, port_id);
1949 hw_stats->eth.tx_multicast += statistics;
1950
1951 /*36-bit statistics counter that collects the number of
1952 *valid RX multicast control frames.
1953 */
1954 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1955 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_LO,
1956 IPN3KE_10G_RX_STATS_MULTICAST_MAC_CTRL_FRAMES_HI,
1957 hw, port_id);
1958 hw_stats->eth.rx_multicast += statistics;
1959
1960 /*36-bit statistics counter that collects the number of
1961 *valid TX broadcast control frames.
1962 */
1963 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1964 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
1965 IPN3KE_10G_TX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
1966 hw, port_id);
1967 hw_stats->eth.tx_broadcast += statistics;
1968
1969 /*36-bit statistics counter that collects the number of
1970 *valid RX broadcast control frames.
1971 */
1972 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1973 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_LO,
1974 IPN3KE_10G_RX_STATS_BROADCAST_MAC_CTRL_FRAMES_HI,
1975 hw, port_id);
1976 hw_stats->eth.rx_broadcast += statistics;
1977
1978 /*36-bit statistics counter that collects the number of
1979 *valid TX PFC frames.
1980 */
1981 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1982 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_LO,
1983 IPN3KE_10G_TX_STATS_PFC_MAC_CTRL_FRAMES_HI,
1984 hw, port_id);
1985
1986 /*36-bit statistics counter that collects the number of
1987 *valid RX PFC frames.
1988 */
1989 statistics = ipn3ke_rpst_read_36bits_statistics_register(
1990 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_LO,
1991 IPN3KE_10G_RX_STATS_PFC_MAC_CTRL_FRAMES_HI,
1992 hw, port_id);
1993
1994 return 0;
1995 }
1996
1997 static void
ipn3ke_rpst_10g_lineside_tx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)1998 ipn3ke_rpst_10g_lineside_tx_stats_reset(struct ipn3ke_hw *hw,
1999 uint16_t port_id)
2000 {
2001 uint32_t tmp;
2002
2003 /*Bit [0]: Set this register to 1 to clear all TX statistics
2004 *counters.
2005 *The IP core clears this bit when all counters are cleared.
2006 *Bits [31:1]: Reserved.
2007 */
2008 tmp = 0x00000000;
2009 (*hw->f_mac_read)(hw,
2010 &tmp,
2011 IPN3KE_10G_TX_STATS_CLR,
2012 port_id,
2013 0);
2014 tmp |= 0x00000001;
2015 (*hw->f_mac_write)(hw,
2016 tmp,
2017 IPN3KE_10G_TX_STATS_CLR,
2018 port_id,
2019 0);
2020 }
2021
2022 static void
ipn3ke_rpst_10g_lineside_rx_stats_reset(struct ipn3ke_hw * hw,uint16_t port_id)2023 ipn3ke_rpst_10g_lineside_rx_stats_reset(struct ipn3ke_hw *hw,
2024 uint16_t port_id)
2025 {
2026 uint32_t tmp;
2027
2028 /*Bit [0]: Set this register to 1 to clear all RX statistics
2029 *counters.
2030 *The IP core clears this bit when all counters are cleared.
2031 *Bits [31:1]: Reserved
2032 */
2033 tmp = 0x00000000;
2034 (*hw->f_mac_read)(hw,
2035 &tmp,
2036 IPN3KE_10G_RX_STATS_CLR,
2037 port_id,
2038 0);
2039 tmp |= 0x00000001;
2040 (*hw->f_mac_write)(hw,
2041 tmp,
2042 IPN3KE_10G_RX_STATS_CLR,
2043 port_id,
2044 0);
2045 }
2046
2047 static int
ipn3ke_rpst_stats_reset(struct rte_eth_dev * ethdev)2048 ipn3ke_rpst_stats_reset(struct rte_eth_dev *ethdev)
2049 {
2050 uint16_t port_id = 0;
2051 char *ch;
2052 int cnt = 0;
2053 struct rte_afu_device *afu_dev = NULL;
2054 struct ipn3ke_hw *hw = NULL;
2055
2056 if (!ethdev) {
2057 IPN3KE_AFU_PMD_ERR("ethernet device to reset is NULL!");
2058 return -EINVAL;
2059 }
2060
2061 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2062 if (!afu_dev) {
2063 IPN3KE_AFU_PMD_ERR("afu device to reset is NULL!");
2064 return -EINVAL;
2065 }
2066
2067 if (!afu_dev->shared.data) {
2068 IPN3KE_AFU_PMD_ERR("hardware data to reset is NULL!");
2069 return -EINVAL;
2070 }
2071
2072 hw = afu_dev->shared.data;
2073
2074 ch = ethdev->data->name;
2075 if (!ch) {
2076 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2077 return -EINVAL;
2078 }
2079 while (ch) {
2080 if (*ch == '_')
2081 cnt++;
2082 ch++;
2083 if (cnt == 3)
2084 break;
2085 }
2086 if (!ch) {
2087 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2088 return -EINVAL;
2089 }
2090 port_id = atoi(ch);
2091
2092 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2093 ipn3ke_rpst_25g_nic_side_tx_stats_reset(hw, port_id);
2094 ipn3ke_rpst_25g_nic_side_rx_stats_reset(hw, port_id);
2095 ipn3ke_rpst_25g_lineside_tx_stats_reset(hw, port_id);
2096 ipn3ke_rpst_25g_lineside_rx_stats_reset(hw, port_id);
2097 } else if (hw->retimer.mac_type ==
2098 IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2099 ipn3ke_rpst_10g_nic_side_tx_stats_reset(hw, port_id);
2100 ipn3ke_rpst_10g_nic_side_rx_stats_reset(hw, port_id);
2101 ipn3ke_rpst_10g_lineside_tx_stats_reset(hw, port_id);
2102 ipn3ke_rpst_10g_lineside_rx_stats_reset(hw, port_id);
2103 }
2104
2105 return 0;
2106 }
2107
2108 static int
ipn3ke_rpst_stats_get(struct rte_eth_dev * ethdev,struct rte_eth_stats * stats)2109 ipn3ke_rpst_stats_get
2110 (struct rte_eth_dev *ethdev, struct rte_eth_stats *stats)
2111 {
2112 uint16_t port_id = 0;
2113 char *ch;
2114 int cnt = 0;
2115 int i = 0;
2116 struct rte_afu_device *afu_dev = NULL;
2117 struct ipn3ke_hw *hw = NULL;
2118 struct ipn3ke_rpst_hw_port_stats hw_stats;
2119
2120 if (!ethdev) {
2121 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
2122 return -EINVAL;
2123 }
2124 if (!stats) {
2125 IPN3KE_AFU_PMD_ERR("Address to return statistics is NULL!");
2126 return -EINVAL;
2127 }
2128
2129 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2130 if (!afu_dev) {
2131 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
2132 return -EINVAL;
2133 }
2134
2135 if (!afu_dev->shared.data) {
2136 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
2137 return -EINVAL;
2138 }
2139
2140 hw = afu_dev->shared.data;
2141
2142 ch = ethdev->data->name;
2143 if (!ch) {
2144 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2145 return -EINVAL;
2146 }
2147 while (ch) {
2148 if (*ch == '_')
2149 cnt++;
2150 ch++;
2151 if (cnt == 3)
2152 break;
2153 }
2154 if (!ch) {
2155 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2156 return -EINVAL;
2157 }
2158 port_id = atoi(ch);
2159
2160 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2161 ipn3ke_rpst_read_25g_lineside_stats_registers(hw,
2162 port_id,
2163 &hw_stats);
2164
2165 stats->ipackets = hw_stats.rx_size_64
2166 + hw_stats.rx_size_65_127
2167 + hw_stats.rx_size_128_255
2168 + hw_stats.rx_size_256_511
2169 + hw_stats.rx_size_512_1023
2170 + hw_stats.rx_size_1024_1518
2171 + hw_stats.rx_size_big
2172 + hw_stats.rx_undersize
2173 + hw_stats.rx_fragments
2174 + hw_stats.rx_oversize
2175 + hw_stats.rx_jabber;
2176 stats->opackets = hw_stats.tx_size_64
2177 + hw_stats.tx_size_65_127
2178 + hw_stats.tx_size_128_255
2179 + hw_stats.tx_size_256_511
2180 + hw_stats.tx_size_512_1023
2181 + hw_stats.tx_size_1024_1518
2182 + hw_stats.tx_size_1519_to_max;
2183 stats->ibytes = hw_stats.eth.rx_bytes;
2184 stats->obytes = hw_stats.eth.tx_bytes;
2185 stats->imissed = 0;
2186 stats->ierrors = hw_stats.eth.rx_discards
2187 + hw_stats.eth.rx_unknown_protocol;
2188 stats->oerrors = hw_stats.eth.tx_discards
2189 + hw_stats.eth.tx_errors;
2190 stats->rx_nombuf = 0;
2191 for (i = 0; i < RTE_ETHDEV_QUEUE_STAT_CNTRS; i++) {
2192 stats->q_ipackets[i] = 0;
2193 stats->q_opackets[i] = 0;
2194 stats->q_ibytes[i] = 0;
2195 stats->q_obytes[i] = 0;
2196 stats->q_errors[i] = 0;
2197 }
2198 } else {
2199 ipn3ke_rpst_read_10g_lineside_stats_registers(hw,
2200 port_id,
2201 &hw_stats,
2202 stats);
2203 }
2204
2205 return 0;
2206 }
2207
2208 static int
ipn3ke_rpst_xstats_get(struct rte_eth_dev * ethdev,struct rte_eth_xstat * xstats,unsigned int n)2209 ipn3ke_rpst_xstats_get
2210 (struct rte_eth_dev *ethdev, struct rte_eth_xstat *xstats, unsigned int n)
2211 {
2212 uint16_t port_id = 0;
2213 char *ch = NULL;
2214 int cnt = 0;
2215 unsigned int i, count, prio;
2216 struct rte_afu_device *afu_dev = NULL;
2217 struct ipn3ke_hw *hw = NULL;
2218 struct ipn3ke_rpst_hw_port_stats hw_stats;
2219 struct rte_eth_stats stats;
2220
2221 if (!xstats)
2222 return 0;
2223
2224 if (!ethdev) {
2225 IPN3KE_AFU_PMD_ERR("ethernet device to get statistics is NULL");
2226 return -EINVAL;
2227 }
2228
2229 afu_dev = RTE_ETH_DEV_TO_AFU(ethdev);
2230 if (!afu_dev) {
2231 IPN3KE_AFU_PMD_ERR("afu device to get statistics is NULL!");
2232 return -EINVAL;
2233 }
2234
2235 if (!afu_dev->shared.data) {
2236 IPN3KE_AFU_PMD_ERR("hardware data to get statistics is NULL!");
2237 return -EINVAL;
2238 }
2239
2240 hw = afu_dev->shared.data;
2241
2242 ch = ethdev->data->name;
2243 if (!ch) {
2244 IPN3KE_AFU_PMD_ERR("ethdev name is NULL!");
2245 return -EINVAL;
2246 }
2247 while (ch) {
2248 if (*ch == '_')
2249 cnt++;
2250 ch++;
2251 if (cnt == 3)
2252 break;
2253 }
2254 if (!ch) {
2255 IPN3KE_AFU_PMD_ERR("Can not get port_id from ethdev name!");
2256 return -EINVAL;
2257 }
2258 port_id = atoi(ch);
2259
2260 count = ipn3ke_rpst_xstats_calc_num();
2261 if (n < count)
2262 return count;
2263
2264 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
2265 ipn3ke_rpst_read_25g_lineside_stats_registers(hw,
2266 port_id,
2267 &hw_stats);
2268 } else {
2269 ipn3ke_rpst_read_10g_lineside_stats_registers(hw,
2270 port_id,
2271 &hw_stats,
2272 &stats);
2273 }
2274
2275 count = 0;
2276
2277 /* Get stats from ipn3ke_rpst_stats */
2278 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
2279 xstats[count].value = *(uint64_t *)(((char *)&hw_stats.eth)
2280 + ipn3ke_rpst_stats_strings[i].offset);
2281 xstats[count].id = count;
2282 count++;
2283 }
2284
2285 /* Get individual stats from ipn3ke_rpst_hw_port */
2286 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
2287 xstats[count].value = *(uint64_t *)(((char *)(&hw_stats)) +
2288 ipn3ke_rpst_hw_port_strings[i].offset);
2289 xstats[count].id = count;
2290 count++;
2291 }
2292
2293 /* Get individual stats from ipn3ke_rpst_rxq_pri */
2294 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
2295 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
2296 xstats[count].value =
2297 *(uint64_t *)(((char *)(&hw_stats)) +
2298 ipn3ke_rpst_rxq_prio_strings[i].offset +
2299 (sizeof(uint64_t) * prio));
2300 xstats[count].id = count;
2301 count++;
2302 }
2303 }
2304
2305 /* Get individual stats from ipn3ke_rpst_txq_prio */
2306 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
2307 for (prio = 0; prio < IPN3KE_RPST_PRIO_XSTATS_CNT; prio++) {
2308 xstats[count].value =
2309 *(uint64_t *)(((char *)(&hw_stats)) +
2310 ipn3ke_rpst_txq_prio_strings[i].offset +
2311 (sizeof(uint64_t) * prio));
2312 xstats[count].id = count;
2313 count++;
2314 }
2315 }
2316
2317 return count;
2318 }
2319
2320 static int
ipn3ke_rpst_xstats_get_names(__rte_unused struct rte_eth_dev * dev,struct rte_eth_xstat_name * xstats_names,__rte_unused unsigned int limit)2321 ipn3ke_rpst_xstats_get_names
2322 (__rte_unused struct rte_eth_dev *dev,
2323 struct rte_eth_xstat_name *xstats_names,
2324 __rte_unused unsigned int limit)
2325 {
2326 unsigned int count = 0;
2327 unsigned int i, prio;
2328
2329 if (!xstats_names)
2330 return ipn3ke_rpst_xstats_calc_num();
2331
2332 /* Note: limit checked in rte_eth_xstats_names() */
2333
2334 /* Get stats from ipn3ke_rpst_stats */
2335 for (i = 0; i < IPN3KE_RPST_ETH_XSTATS_CNT; i++) {
2336 snprintf(xstats_names[count].name,
2337 sizeof(xstats_names[count].name),
2338 "%s",
2339 ipn3ke_rpst_stats_strings[i].name);
2340 count++;
2341 }
2342
2343 /* Get individual stats from ipn3ke_rpst_hw_port */
2344 for (i = 0; i < IPN3KE_RPST_HW_PORT_XSTATS_CNT; i++) {
2345 snprintf(xstats_names[count].name,
2346 sizeof(xstats_names[count].name),
2347 "%s",
2348 ipn3ke_rpst_hw_port_strings[i].name);
2349 count++;
2350 }
2351
2352 /* Get individual stats from ipn3ke_rpst_rxq_pri */
2353 for (i = 0; i < IPN3KE_RPST_RXQ_PRIO_XSTATS_CNT; i++) {
2354 for (prio = 0; prio < 8; prio++) {
2355 snprintf(xstats_names[count].name,
2356 sizeof(xstats_names[count].name),
2357 "rx_priority%u_%s",
2358 prio,
2359 ipn3ke_rpst_rxq_prio_strings[i].name);
2360 count++;
2361 }
2362 }
2363
2364 /* Get individual stats from ipn3ke_rpst_txq_prio */
2365 for (i = 0; i < IPN3KE_RPST_TXQ_PRIO_XSTATS_CNT; i++) {
2366 for (prio = 0; prio < 8; prio++) {
2367 snprintf(xstats_names[count].name,
2368 sizeof(xstats_names[count].name),
2369 "tx_priority%u_%s",
2370 prio,
2371 ipn3ke_rpst_txq_prio_strings[i].name);
2372 count++;
2373 }
2374 }
2375 return count;
2376 }
2377
2378 static void
ipn3ke_update_link(struct rte_rawdev * rawdev,uint16_t port,struct rte_eth_link * link)2379 ipn3ke_update_link(struct rte_rawdev *rawdev,
2380 uint16_t port, struct rte_eth_link *link)
2381 {
2382 uint64_t line_link_bitmap = 0;
2383 enum ifpga_rawdev_link_speed link_speed;
2384
2385 rawdev->dev_ops->attr_get(rawdev,
2386 "LineSideLinkStatus",
2387 (uint64_t *)&line_link_bitmap);
2388
2389 /* Parse the link status */
2390 if ((1 << port) & line_link_bitmap)
2391 link->link_status = 1;
2392 else
2393 link->link_status = 0;
2394
2395 IPN3KE_AFU_PMD_DEBUG("port is %d\n", port);
2396 IPN3KE_AFU_PMD_DEBUG("link->link_status is %d\n", link->link_status);
2397
2398 rawdev->dev_ops->attr_get(rawdev,
2399 "LineSideLinkSpeed",
2400 (uint64_t *)&link_speed);
2401 switch (link_speed) {
2402 case IFPGA_RAWDEV_LINK_SPEED_10GB:
2403 link->link_speed = RTE_ETH_SPEED_NUM_10G;
2404 break;
2405 case IFPGA_RAWDEV_LINK_SPEED_25GB:
2406 link->link_speed = RTE_ETH_SPEED_NUM_25G;
2407 break;
2408 default:
2409 IPN3KE_AFU_PMD_ERR("Unknown link speed info %u", link_speed);
2410 break;
2411 }
2412 }
2413
2414 /*
2415 * Set device link up.
2416 */
2417 int
ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev * dev)2418 ipn3ke_rpst_dev_set_link_up(struct rte_eth_dev *dev)
2419 {
2420 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
2421 struct rte_eth_dev *pf;
2422 int ret = 0;
2423
2424 if (rpst->i40e_pf_eth) {
2425 ret = rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2426 pf = rpst->i40e_pf_eth;
2427 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2428 }
2429
2430 return ret;
2431 }
2432
2433 /*
2434 * Set device link down.
2435 */
2436 int
ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev * dev)2437 ipn3ke_rpst_dev_set_link_down(struct rte_eth_dev *dev)
2438 {
2439 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(dev);
2440 struct rte_eth_dev *pf;
2441 int ret = 0;
2442
2443 if (rpst->i40e_pf_eth) {
2444 ret = rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2445 pf = rpst->i40e_pf_eth;
2446 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2447 }
2448
2449 return ret;
2450 }
2451
2452 int
ipn3ke_rpst_link_update(struct rte_eth_dev * ethdev,__rte_unused int wait_to_complete)2453 ipn3ke_rpst_link_update(struct rte_eth_dev *ethdev,
2454 __rte_unused int wait_to_complete)
2455 {
2456 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2457 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2458 struct rte_rawdev *rawdev;
2459 struct rte_eth_link link;
2460 struct rte_eth_dev *pf;
2461
2462 memset(&link, 0, sizeof(link));
2463
2464 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
2465 link.link_autoneg = !(ethdev->data->dev_conf.link_speeds &
2466 RTE_ETH_LINK_SPEED_FIXED);
2467
2468 rawdev = hw->rawdev;
2469 ipn3ke_update_link(rawdev, rpst->port_id, &link);
2470
2471 if (!rpst->ori_linfo.link_status &&
2472 link.link_status) {
2473 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Up\n", rpst->port_id);
2474 rpst->ori_linfo.link_status = link.link_status;
2475 rpst->ori_linfo.link_speed = link.link_speed;
2476
2477 rte_eth_linkstatus_set(ethdev, &link);
2478
2479 if (rpst->i40e_pf_eth) {
2480 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Up\n",
2481 rpst->i40e_pf_eth_port_id);
2482 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2483 pf = rpst->i40e_pf_eth;
2484 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2485 }
2486 } else if (rpst->ori_linfo.link_status &&
2487 !link.link_status) {
2488 IPN3KE_AFU_PMD_DEBUG("Update Rpst %d Down\n",
2489 rpst->port_id);
2490 rpst->ori_linfo.link_status = link.link_status;
2491 rpst->ori_linfo.link_speed = link.link_speed;
2492
2493 rte_eth_linkstatus_set(ethdev, &link);
2494
2495 if (rpst->i40e_pf_eth) {
2496 IPN3KE_AFU_PMD_DEBUG("Update FVL PF %d Down\n",
2497 rpst->i40e_pf_eth_port_id);
2498 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2499 pf = rpst->i40e_pf_eth;
2500 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2501 }
2502 }
2503
2504 return 0;
2505 }
2506
2507 static int
ipn3ke_rpst_link_check(struct ipn3ke_rpst * rpst)2508 ipn3ke_rpst_link_check(struct ipn3ke_rpst *rpst)
2509 {
2510 struct ipn3ke_hw *hw;
2511 struct rte_rawdev *rawdev;
2512 struct rte_eth_link link;
2513 struct rte_eth_dev *pf;
2514
2515 if (rpst == NULL)
2516 return -1;
2517
2518 hw = rpst->hw;
2519
2520 memset(&link, 0, sizeof(link));
2521
2522 link.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;
2523 link.link_autoneg = !(rpst->ethdev->data->dev_conf.link_speeds &
2524 RTE_ETH_LINK_SPEED_FIXED);
2525
2526 rawdev = hw->rawdev;
2527 ipn3ke_update_link(rawdev, rpst->port_id, &link);
2528
2529 if (!rpst->ori_linfo.link_status &&
2530 link.link_status) {
2531 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Up\n", rpst->port_id);
2532 rpst->ori_linfo.link_status = link.link_status;
2533 rpst->ori_linfo.link_speed = link.link_speed;
2534
2535 rte_eth_linkstatus_set(rpst->ethdev, &link);
2536
2537 if (rpst->i40e_pf_eth) {
2538 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Up\n",
2539 rpst->i40e_pf_eth_port_id);
2540 rte_eth_dev_set_link_up(rpst->i40e_pf_eth_port_id);
2541 pf = rpst->i40e_pf_eth;
2542 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2543 }
2544 } else if (rpst->ori_linfo.link_status &&
2545 !link.link_status) {
2546 IPN3KE_AFU_PMD_DEBUG("Check Rpst %d Down\n", rpst->port_id);
2547 rpst->ori_linfo.link_status = link.link_status;
2548 rpst->ori_linfo.link_speed = link.link_speed;
2549
2550 rte_eth_linkstatus_set(rpst->ethdev, &link);
2551
2552 if (rpst->i40e_pf_eth) {
2553 IPN3KE_AFU_PMD_DEBUG("Check FVL PF %d Down\n",
2554 rpst->i40e_pf_eth_port_id);
2555 rte_eth_dev_set_link_down(rpst->i40e_pf_eth_port_id);
2556 pf = rpst->i40e_pf_eth;
2557 (*rpst->i40e_pf_eth->dev_ops->link_update)(pf, 1);
2558 }
2559 }
2560
2561 return 0;
2562 }
2563
2564 static void *
ipn3ke_rpst_scan_handle_request(__rte_unused void * param)2565 ipn3ke_rpst_scan_handle_request(__rte_unused void *param)
2566 {
2567 struct ipn3ke_rpst *rpst;
2568 int num = 0;
2569 #define MS 1000
2570 #define SCAN_NUM 32
2571
2572 for (;;) {
2573 num = 0;
2574 TAILQ_FOREACH(rpst, &ipn3ke_rpst_list, next) {
2575 if (rpst->i40e_pf_eth &&
2576 rpst->ethdev->data->dev_started &&
2577 rpst->i40e_pf_eth->data->dev_started)
2578 ipn3ke_rpst_link_check(rpst);
2579
2580 if (++num > SCAN_NUM)
2581 rte_delay_us(1 * MS);
2582 }
2583 rte_delay_us(50 * MS);
2584
2585 if (num == 0xffffff)
2586 return NULL;
2587 }
2588
2589 return NULL;
2590 }
2591
2592 static int
ipn3ke_rpst_scan_check(void)2593 ipn3ke_rpst_scan_check(void)
2594 {
2595 int ret;
2596
2597 if (ipn3ke_rpst_scan_num == 1) {
2598 ret = rte_ctrl_thread_create(&ipn3ke_rpst_scan_thread,
2599 "ipn3ke scanner",
2600 NULL,
2601 ipn3ke_rpst_scan_handle_request, NULL);
2602 if (ret) {
2603 IPN3KE_AFU_PMD_ERR("Fail to create ipn3ke rpst scan thread");
2604 return -1;
2605 }
2606 } else if (ipn3ke_rpst_scan_num == 0) {
2607 ret = pthread_cancel(ipn3ke_rpst_scan_thread);
2608 if (ret)
2609 IPN3KE_AFU_PMD_ERR("Can't cancel the thread");
2610
2611 ret = pthread_join(ipn3ke_rpst_scan_thread, NULL);
2612 if (ret)
2613 IPN3KE_AFU_PMD_ERR("Can't join the thread");
2614
2615 return ret;
2616 }
2617
2618 return 0;
2619 }
2620
2621 int
ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev * ethdev)2622 ipn3ke_rpst_promiscuous_enable(struct rte_eth_dev *ethdev)
2623 {
2624 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2625 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2626 uint32_t rddata, val;
2627
2628 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2629 /* Enable all unicast */
2630 (*hw->f_mac_read)(hw,
2631 &rddata,
2632 IPN3KE_MAC_RX_FRAME_CONTROL,
2633 rpst->port_id,
2634 0);
2635 val = 1;
2636 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;
2637 val |= rddata;
2638 (*hw->f_mac_write)(hw,
2639 val,
2640 IPN3KE_MAC_RX_FRAME_CONTROL,
2641 rpst->port_id,
2642 0);
2643 }
2644
2645 return 0;
2646 }
2647
2648 int
ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev * ethdev)2649 ipn3ke_rpst_promiscuous_disable(struct rte_eth_dev *ethdev)
2650 {
2651 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2652 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2653 uint32_t rddata, val;
2654
2655 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2656 /* Disable all unicast */
2657 (*hw->f_mac_read)(hw,
2658 &rddata,
2659 IPN3KE_MAC_RX_FRAME_CONTROL,
2660 rpst->port_id,
2661 0);
2662 val = 0;
2663 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLUCAST_MASK;
2664 val |= rddata;
2665 (*hw->f_mac_write)(hw,
2666 val,
2667 IPN3KE_MAC_RX_FRAME_CONTROL,
2668 rpst->port_id,
2669 0);
2670 }
2671
2672 return 0;
2673 }
2674
2675 int
ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev * ethdev)2676 ipn3ke_rpst_allmulticast_enable(struct rte_eth_dev *ethdev)
2677 {
2678 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2679 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2680 uint32_t rddata, val;
2681
2682 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2683 /* Enable all unicast */
2684 (*hw->f_mac_read)(hw,
2685 &rddata,
2686 IPN3KE_MAC_RX_FRAME_CONTROL,
2687 rpst->port_id,
2688 0);
2689 val = 1;
2690 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;
2691 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;
2692 val |= rddata;
2693 (*hw->f_mac_write)(hw,
2694 val,
2695 IPN3KE_MAC_RX_FRAME_CONTROL,
2696 rpst->port_id,
2697 0);
2698 }
2699
2700 return 0;
2701 }
2702
2703 int
ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev * ethdev)2704 ipn3ke_rpst_allmulticast_disable(struct rte_eth_dev *ethdev)
2705 {
2706 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2707 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2708 uint32_t rddata, val;
2709
2710 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2711 /* Disable all unicast */
2712 (*hw->f_mac_read)(hw,
2713 &rddata,
2714 IPN3KE_MAC_RX_FRAME_CONTROL,
2715 rpst->port_id,
2716 0);
2717 val = 0;
2718 val <<= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_SHIFT;
2719 val &= IPN3KE_MAC_RX_FRAME_CONTROL_EN_ALLMCAST_MASK;
2720 val |= rddata;
2721 (*hw->f_mac_write)(hw,
2722 val,
2723 IPN3KE_MAC_RX_FRAME_CONTROL,
2724 rpst->port_id,
2725 0);
2726 }
2727
2728 return 0;
2729 }
2730
2731 int
ipn3ke_rpst_mac_addr_set(struct rte_eth_dev * ethdev,struct rte_ether_addr * mac_addr)2732 ipn3ke_rpst_mac_addr_set(struct rte_eth_dev *ethdev,
2733 struct rte_ether_addr *mac_addr)
2734 {
2735 struct ipn3ke_hw *hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2736 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2737 uint32_t val;
2738
2739 if (!rte_is_valid_assigned_ether_addr(mac_addr)) {
2740 IPN3KE_AFU_PMD_ERR("Tried to set invalid MAC address.");
2741 return -EINVAL;
2742 }
2743
2744 if (hw->retimer.mac_type == IFPGA_RAWDEV_RETIMER_MAC_TYPE_10GE_XFI) {
2745 rte_ether_addr_copy(&mac_addr[0], &rpst->mac_addr);
2746
2747 /* Set mac address */
2748 rte_memcpy(((char *)(&val)), &mac_addr[0], sizeof(uint32_t));
2749 (*hw->f_mac_write)(hw,
2750 val,
2751 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
2752 rpst->port_id,
2753 0);
2754 rte_memcpy(((char *)(&val)), &mac_addr[4], sizeof(uint16_t));
2755 (*hw->f_mac_write)(hw,
2756 val,
2757 IPN3KE_MAC_PRIMARY_MAC_ADDR0,
2758 rpst->port_id,
2759 0);
2760 }
2761
2762 return 0;
2763 }
2764
2765 int
ipn3ke_rpst_mtu_set(struct rte_eth_dev * ethdev,uint16_t mtu)2766 ipn3ke_rpst_mtu_set(struct rte_eth_dev *ethdev, uint16_t mtu)
2767 {
2768 int ret = 0;
2769 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2770 struct rte_eth_dev_data *dev_data = ethdev->data;
2771
2772 /* mtu setting is forbidden if port is start */
2773 /* make sure NIC port is stopped */
2774 if (rpst->i40e_pf_eth && rpst->i40e_pf_eth->data->dev_started) {
2775 IPN3KE_AFU_PMD_ERR("NIC port %d must "
2776 "be stopped before configuration",
2777 rpst->i40e_pf_eth->data->port_id);
2778 return -EBUSY;
2779 }
2780 /* mtu setting is forbidden if port is start */
2781 if (dev_data->dev_started) {
2782 IPN3KE_AFU_PMD_ERR("FPGA port %d must "
2783 "be stopped before configuration",
2784 dev_data->port_id);
2785 return -EBUSY;
2786 }
2787
2788 if (rpst->i40e_pf_eth) {
2789 ret = rpst->i40e_pf_eth->dev_ops->mtu_set(rpst->i40e_pf_eth,
2790 mtu);
2791 if (!ret)
2792 rpst->i40e_pf_eth->data->mtu = mtu;
2793 }
2794
2795 return ret;
2796 }
2797
2798 static int
ipn3ke_afu_flow_ops_get(struct rte_eth_dev * ethdev,const struct rte_flow_ops ** ops)2799 ipn3ke_afu_flow_ops_get(struct rte_eth_dev *ethdev,
2800 const struct rte_flow_ops **ops)
2801 {
2802 struct ipn3ke_hw *hw;
2803 struct ipn3ke_rpst *rpst;
2804
2805 if (ethdev == NULL)
2806 return -EINVAL;
2807
2808 hw = IPN3KE_DEV_PRIVATE_TO_HW(ethdev);
2809 rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2810
2811 if (hw->acc_flow)
2812 *ops = &ipn3ke_flow_ops;
2813 else if (rpst->i40e_pf_eth)
2814 (*rpst->i40e_pf_eth->dev_ops->flow_ops_get)(ethdev, ops);
2815 else
2816 return -EINVAL;
2817
2818 return 0;
2819 }
2820
2821 static const struct eth_dev_ops ipn3ke_rpst_dev_ops = {
2822 .dev_infos_get = ipn3ke_rpst_dev_infos_get,
2823
2824 .dev_configure = ipn3ke_rpst_dev_configure,
2825 .dev_start = ipn3ke_rpst_dev_start,
2826 .dev_stop = ipn3ke_rpst_dev_stop,
2827 .dev_close = ipn3ke_rpst_dev_close,
2828 .dev_reset = ipn3ke_rpst_dev_reset,
2829
2830 .stats_get = ipn3ke_rpst_stats_get,
2831 .xstats_get = ipn3ke_rpst_xstats_get,
2832 .xstats_get_names = ipn3ke_rpst_xstats_get_names,
2833 .stats_reset = ipn3ke_rpst_stats_reset,
2834 .xstats_reset = ipn3ke_rpst_stats_reset,
2835
2836 .flow_ops_get = ipn3ke_afu_flow_ops_get,
2837
2838 .rx_queue_start = ipn3ke_rpst_rx_queue_start,
2839 .rx_queue_stop = ipn3ke_rpst_rx_queue_stop,
2840 .tx_queue_start = ipn3ke_rpst_tx_queue_start,
2841 .tx_queue_stop = ipn3ke_rpst_tx_queue_stop,
2842 .rx_queue_setup = ipn3ke_rpst_rx_queue_setup,
2843 .tx_queue_setup = ipn3ke_rpst_tx_queue_setup,
2844
2845 .dev_set_link_up = ipn3ke_rpst_dev_set_link_up,
2846 .dev_set_link_down = ipn3ke_rpst_dev_set_link_down,
2847 .link_update = ipn3ke_rpst_link_update,
2848
2849 .promiscuous_enable = ipn3ke_rpst_promiscuous_enable,
2850 .promiscuous_disable = ipn3ke_rpst_promiscuous_disable,
2851 .allmulticast_enable = ipn3ke_rpst_allmulticast_enable,
2852 .allmulticast_disable = ipn3ke_rpst_allmulticast_disable,
2853 .mac_addr_set = ipn3ke_rpst_mac_addr_set,
2854 .mtu_set = ipn3ke_rpst_mtu_set,
2855
2856 .tm_ops_get = ipn3ke_tm_ops_get,
2857 };
2858
ipn3ke_rpst_recv_pkts(__rte_unused void * rx_q,__rte_unused struct rte_mbuf ** rx_pkts,__rte_unused uint16_t nb_pkts)2859 static uint16_t ipn3ke_rpst_recv_pkts(__rte_unused void *rx_q,
2860 __rte_unused struct rte_mbuf **rx_pkts, __rte_unused uint16_t nb_pkts)
2861 {
2862 return 0;
2863 }
2864
2865 static uint16_t
ipn3ke_rpst_xmit_pkts(__rte_unused void * tx_queue,__rte_unused struct rte_mbuf ** tx_pkts,__rte_unused uint16_t nb_pkts)2866 ipn3ke_rpst_xmit_pkts(__rte_unused void *tx_queue,
2867 __rte_unused struct rte_mbuf **tx_pkts, __rte_unused uint16_t nb_pkts)
2868 {
2869 return 0;
2870 }
2871
2872 int
ipn3ke_rpst_init(struct rte_eth_dev * ethdev,void * init_params)2873 ipn3ke_rpst_init(struct rte_eth_dev *ethdev, void *init_params)
2874 {
2875 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2876 struct ipn3ke_rpst *representor_param =
2877 (struct ipn3ke_rpst *)init_params;
2878
2879 if (representor_param->port_id >= representor_param->hw->port_num)
2880 return -ENODEV;
2881
2882 if (ipn3ke_bridge_func.set_i40e_sw_dev == NULL)
2883 return -ENOMEM;
2884
2885 rpst->ethdev = ethdev;
2886 rpst->switch_domain_id = representor_param->switch_domain_id;
2887 rpst->port_id = representor_param->port_id;
2888 rpst->hw = representor_param->hw;
2889 rpst->i40e_pf_eth = representor_param->i40e_pf_eth;
2890 rpst->i40e_pf_eth_port_id = representor_param->i40e_pf_eth_port_id;
2891 if (rpst->i40e_pf_eth)
2892 ipn3ke_bridge_func.set_i40e_sw_dev(rpst->i40e_pf_eth_port_id,
2893 rpst->ethdev);
2894
2895 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke", RTE_ETHER_ADDR_LEN, 0);
2896 if (!ethdev->data->mac_addrs) {
2897 IPN3KE_AFU_PMD_ERR("Failed to "
2898 "allocated memory for storing mac address");
2899 return -ENODEV;
2900 }
2901
2902 if (rpst->hw->tm_hw_enable)
2903 ipn3ke_tm_init(rpst);
2904
2905 /* Set representor device ops */
2906 ethdev->dev_ops = &ipn3ke_rpst_dev_ops;
2907
2908 /* No data-path, but need stub Rx/Tx functions to avoid crash
2909 * when testing with the likes of testpmd.
2910 */
2911 ethdev->rx_pkt_burst = ipn3ke_rpst_recv_pkts;
2912 ethdev->tx_pkt_burst = ipn3ke_rpst_xmit_pkts;
2913
2914 ethdev->data->nb_rx_queues = 1;
2915 ethdev->data->nb_tx_queues = 1;
2916
2917 ethdev->data->mac_addrs = rte_zmalloc("ipn3ke_afu_representor",
2918 RTE_ETHER_ADDR_LEN,
2919 0);
2920 if (!ethdev->data->mac_addrs) {
2921 IPN3KE_AFU_PMD_ERR("Failed to "
2922 "allocated memory for storing mac address");
2923 return -ENODEV;
2924 }
2925
2926 ethdev->data->dev_flags |= RTE_ETH_DEV_REPRESENTOR |
2927 RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS;
2928
2929 rte_spinlock_lock(&ipn3ke_link_notify_list_lk);
2930 TAILQ_INSERT_TAIL(&ipn3ke_rpst_list, rpst, next);
2931 ipn3ke_rpst_scan_num++;
2932 ipn3ke_rpst_scan_check();
2933 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk);
2934
2935 return 0;
2936 }
2937
2938 int
ipn3ke_rpst_uninit(struct rte_eth_dev * ethdev)2939 ipn3ke_rpst_uninit(struct rte_eth_dev *ethdev)
2940 {
2941 struct ipn3ke_rpst *rpst = IPN3KE_DEV_PRIVATE_TO_RPST(ethdev);
2942
2943 rte_spinlock_lock(&ipn3ke_link_notify_list_lk);
2944 TAILQ_REMOVE(&ipn3ke_rpst_list, rpst, next);
2945 ipn3ke_rpst_scan_num--;
2946 ipn3ke_rpst_scan_check();
2947 rte_spinlock_unlock(&ipn3ke_link_notify_list_lk);
2948
2949 return 0;
2950 }
2951