1test compile precise-output 2set unwind_info=false 3target riscv64 4 5function %f1(f32, f32) -> f32 { 6block0(v0: f32, v1: f32): 7 v2 = fadd v0, v1 8 return v2 9} 10 11; VCode: 12; block0: 13; fadd.s fa0,fa0,fa1,rne 14; ret 15; 16; Disassembled: 17; block0: ; offset 0x0 18; fadd.s fa0, fa0, fa1, rne 19; ret 20 21function %f2(f64, f64) -> f64 { 22block0(v0: f64, v1: f64): 23 v2 = fadd v0, v1 24 return v2 25} 26 27; VCode: 28; block0: 29; fadd.d fa0,fa0,fa1,rne 30; ret 31; 32; Disassembled: 33; block0: ; offset 0x0 34; fadd.d fa0, fa0, fa1, rne 35; ret 36 37function %f3(f32, f32) -> f32 { 38block0(v0: f32, v1: f32): 39 v2 = fsub v0, v1 40 return v2 41} 42 43; VCode: 44; block0: 45; fsub.s fa0,fa0,fa1,rne 46; ret 47; 48; Disassembled: 49; block0: ; offset 0x0 50; fsub.s fa0, fa0, fa1, rne 51; ret 52 53function %f4(f64, f64) -> f64 { 54block0(v0: f64, v1: f64): 55 v2 = fsub v0, v1 56 return v2 57} 58 59; VCode: 60; block0: 61; fsub.d fa0,fa0,fa1,rne 62; ret 63; 64; Disassembled: 65; block0: ; offset 0x0 66; fsub.d fa0, fa0, fa1, rne 67; ret 68 69function %f5(f32, f32) -> f32 { 70block0(v0: f32, v1: f32): 71 v2 = fmul v0, v1 72 return v2 73} 74 75; VCode: 76; block0: 77; fmul.s fa0,fa0,fa1,rne 78; ret 79; 80; Disassembled: 81; block0: ; offset 0x0 82; fmul.s fa0, fa0, fa1, rne 83; ret 84 85function %f6(f64, f64) -> f64 { 86block0(v0: f64, v1: f64): 87 v2 = fmul v0, v1 88 return v2 89} 90 91; VCode: 92; block0: 93; fmul.d fa0,fa0,fa1,rne 94; ret 95; 96; Disassembled: 97; block0: ; offset 0x0 98; fmul.d fa0, fa0, fa1, rne 99; ret 100 101function %f7(f32, f32) -> f32 { 102block0(v0: f32, v1: f32): 103 v2 = fdiv v0, v1 104 return v2 105} 106 107; VCode: 108; block0: 109; fdiv.s fa0,fa0,fa1,rne 110; ret 111; 112; Disassembled: 113; block0: ; offset 0x0 114; fdiv.s fa0, fa0, fa1, rne 115; ret 116 117function %f8(f64, f64) -> f64 { 118block0(v0: f64, v1: f64): 119 v2 = fdiv v0, v1 120 return v2 121} 122 123; VCode: 124; block0: 125; fdiv.d fa0,fa0,fa1,rne 126; ret 127; 128; Disassembled: 129; block0: ; offset 0x0 130; fdiv.d fa0, fa0, fa1, rne 131; ret 132 133function %f13(f32) -> f32 { 134block0(v0: f32): 135 v1 = sqrt v0 136 return v1 137} 138 139; VCode: 140; block0: 141; fsqrt.s fa0,fa0,rne 142; ret 143; 144; Disassembled: 145; block0: ; offset 0x0 146; fsqrt.s fa0, fa0, rne 147; ret 148 149function %f15(f64) -> f64 { 150block0(v0: f64): 151 v1 = sqrt v0 152 return v1 153} 154 155; VCode: 156; block0: 157; fsqrt.d fa0,fa0,rne 158; ret 159; 160; Disassembled: 161; block0: ; offset 0x0 162; fsqrt.d fa0, fa0, rne 163; ret 164 165function %f16(f32) -> f32 { 166block0(v0: f32): 167 v1 = fabs v0 168 return v1 169} 170 171; VCode: 172; block0: 173; fabs.s fa0,fa0 174; ret 175; 176; Disassembled: 177; block0: ; offset 0x0 178; fabs.s fa0, fa0 179; ret 180 181function %f17(f64) -> f64 { 182block0(v0: f64): 183 v1 = fabs v0 184 return v1 185} 186 187; VCode: 188; block0: 189; fabs.d fa0,fa0 190; ret 191; 192; Disassembled: 193; block0: ; offset 0x0 194; fabs.d fa0, fa0 195; ret 196 197function %f18(f32) -> f32 { 198block0(v0: f32): 199 v1 = fneg v0 200 return v1 201} 202 203; VCode: 204; block0: 205; fneg.s fa0,fa0 206; ret 207; 208; Disassembled: 209; block0: ; offset 0x0 210; fneg.s fa0, fa0 211; ret 212 213function %f19(f64) -> f64 { 214block0(v0: f64): 215 v1 = fneg v0 216 return v1 217} 218 219; VCode: 220; block0: 221; fneg.d fa0,fa0 222; ret 223; 224; Disassembled: 225; block0: ; offset 0x0 226; fneg.d fa0, fa0 227; ret 228 229function %f20(f32) -> f64 { 230block0(v0: f32): 231 v1 = fpromote.f64 v0 232 return v1 233} 234 235; VCode: 236; block0: 237; fcvt.d.s fa0,fa0,rne 238; ret 239; 240; Disassembled: 241; block0: ; offset 0x0 242; fcvt.d.s fa0, fa0 243; ret 244 245function %f21(f64) -> f32 { 246block0(v0: f64): 247 v1 = fdemote.f32 v0 248 return v1 249} 250 251; VCode: 252; block0: 253; fcvt.s.d fa0,fa0,rne 254; ret 255; 256; Disassembled: 257; block0: ; offset 0x0 258; fcvt.s.d fa0, fa0, rne 259; ret 260 261 262function %f31(f32, f32) -> f32 { 263block0(v0: f32, v1: f32): 264 v2 = fcopysign v0, v1 265 return v2 266} 267 268; VCode: 269; block0: 270; fsgnj.s fa0,fa0,fa1 271; ret 272; 273; Disassembled: 274; block0: ; offset 0x0 275; fsgnj.s fa0, fa0, fa1 276; ret 277 278function %f32(f64, f64) -> f64 { 279block0(v0: f64, v1: f64): 280 v2 = fcopysign v0, v1 281 return v2 282} 283 284; VCode: 285; block0: 286; fsgnj.d fa0,fa0,fa1 287; ret 288; 289; Disassembled: 290; block0: ; offset 0x0 291; fsgnj.d fa0, fa0, fa1 292; ret 293 294function %f33(f32) -> i32 { 295block0(v0: f32): 296 v1 = fcvt_to_uint.i32 v0 297 return v1 298} 299 300; VCode: 301; block0: 302; feq.s a0,fa0,fa0 303; trap_if bad_toint##(a0 eq zero) 304; lui a0,-264192 305; fmv.w.x fa1,a0 306; fle.s a0,fa0,fa1 307; trap_if int_ovf##(a0 ne zero) 308; lui a2,325632 309; fmv.w.x fa4,a2 310; fle.s a0,fa4,fa0 311; trap_if int_ovf##(a0 ne zero) 312; fcvt.wu.s a0,fa0,rtz 313; ret 314; 315; Disassembled: 316; block0: ; offset 0x0 317; feq.s a0, fa0, fa0 318; bnez a0, 8 319; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 320; lui a0, 0xbf800 321; fmv.w.x fa1, a0 322; fle.s a0, fa0, fa1 323; beqz a0, 8 324; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 325; lui a2, 0x4f800 326; fmv.w.x fa4, a2 327; fle.s a0, fa4, fa0 328; beqz a0, 8 329; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 330; fcvt.wu.s a0, fa0, rtz ; trap: bad_toint 331; ret 332 333function %f34(f32) -> i32 { 334block0(v0: f32): 335 v1 = fcvt_to_sint.i32 v0 336 return v1 337} 338 339; VCode: 340; block0: 341; feq.s a0,fa0,fa0 342; trap_if bad_toint##(a0 eq zero) 343; lui a0,-200704 344; addi a0,a0,1 345; fmv.w.x fa1,a0 346; fle.s a1,fa0,fa1 347; trap_if int_ovf##(a1 ne zero) 348; lui a4,323584 349; fmv.w.x fa1,a4 350; fle.s a0,fa1,fa0 351; trap_if int_ovf##(a0 ne zero) 352; fcvt.w.s a0,fa0,rtz 353; ret 354; 355; Disassembled: 356; block0: ; offset 0x0 357; feq.s a0, fa0, fa0 358; bnez a0, 8 359; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 360; lui a0, 0xcf000 361; addi a0, a0, 1 362; fmv.w.x fa1, a0 363; fle.s a1, fa0, fa1 364; beqz a1, 8 365; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 366; lui a4, 0x4f000 367; fmv.w.x fa1, a4 368; fle.s a0, fa1, fa0 369; beqz a0, 8 370; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 371; fcvt.w.s a0, fa0, rtz ; trap: bad_toint 372; ret 373 374function %f35(f32) -> i64 { 375block0(v0: f32): 376 v1 = fcvt_to_uint.i64 v0 377 return v1 378} 379 380; VCode: 381; block0: 382; feq.s a0,fa0,fa0 383; trap_if bad_toint##(a0 eq zero) 384; lui a0,-264192 385; fmv.w.x fa1,a0 386; fle.s a0,fa0,fa1 387; trap_if int_ovf##(a0 ne zero) 388; lui a2,391168 389; fmv.w.x fa4,a2 390; fle.s a0,fa4,fa0 391; trap_if int_ovf##(a0 ne zero) 392; fcvt.lu.s a0,fa0,rtz 393; ret 394; 395; Disassembled: 396; block0: ; offset 0x0 397; feq.s a0, fa0, fa0 398; bnez a0, 8 399; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 400; lui a0, 0xbf800 401; fmv.w.x fa1, a0 402; fle.s a0, fa0, fa1 403; beqz a0, 8 404; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 405; lui a2, 0x5f800 406; fmv.w.x fa4, a2 407; fle.s a0, fa4, fa0 408; beqz a0, 8 409; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 410; fcvt.lu.s a0, fa0, rtz ; trap: bad_toint 411; ret 412 413function %f36(f32) -> i64 { 414block0(v0: f32): 415 v1 = fcvt_to_sint.i64 v0 416 return v1 417} 418 419; VCode: 420; block0: 421; feq.s a0,fa0,fa0 422; trap_if bad_toint##(a0 eq zero) 423; lui a0,-135168 424; addi a0,a0,1 425; fmv.w.x fa1,a0 426; fle.s a1,fa0,fa1 427; trap_if int_ovf##(a1 ne zero) 428; lui a4,389120 429; fmv.w.x fa1,a4 430; fle.s a0,fa1,fa0 431; trap_if int_ovf##(a0 ne zero) 432; fcvt.l.s a0,fa0,rtz 433; ret 434; 435; Disassembled: 436; block0: ; offset 0x0 437; feq.s a0, fa0, fa0 438; bnez a0, 8 439; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 440; lui a0, 0xdf000 441; addi a0, a0, 1 442; fmv.w.x fa1, a0 443; fle.s a1, fa0, fa1 444; beqz a1, 8 445; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 446; lui a4, 0x5f000 447; fmv.w.x fa1, a4 448; fle.s a0, fa1, fa0 449; beqz a0, 8 450; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 451; fcvt.l.s a0, fa0, rtz ; trap: bad_toint 452; ret 453 454function %f37(f64) -> i32 { 455block0(v0: f64): 456 v1 = fcvt_to_uint.i32 v0 457 return v1 458} 459 460; VCode: 461; block0: 462; feq.d a0,fa0,fa0 463; trap_if bad_toint##(a0 eq zero) 464; lui a0,3071 465; slli a0,a0,40 466; fmv.d.x fa1,a0 467; fle.d a1,fa0,fa1 468; trap_if int_ovf##(a1 ne zero) 469; lui a4,1055 470; slli a0,a4,40 471; fmv.d.x fa1,a0 472; fle.d a0,fa1,fa0 473; trap_if int_ovf##(a0 ne zero) 474; fcvt.wu.d a0,fa0,rtz 475; ret 476; 477; Disassembled: 478; block0: ; offset 0x0 479; feq.d a0, fa0, fa0 480; bnez a0, 8 481; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 482; lui a0, 0xbff 483; slli a0, a0, 0x28 484; fmv.d.x fa1, a0 485; fle.d a1, fa0, fa1 486; beqz a1, 8 487; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 488; lui a4, 0x41f 489; slli a0, a4, 0x28 490; fmv.d.x fa1, a0 491; fle.d a0, fa1, fa0 492; beqz a0, 8 493; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 494; fcvt.wu.d a0, fa0, rtz ; trap: bad_toint 495; ret 496 497function %f38(f64) -> i32 { 498block0(v0: f64): 499 v1 = fcvt_to_sint.i32 v0 500 return v1 501} 502 503; VCode: 504; block0: 505; feq.d a0,fa0,fa0 506; trap_if bad_toint##(a0 eq zero) 507; ld a0,[const(0)] 508; fmv.d.x fa1,a0 509; fle.d a0,fa0,fa1 510; trap_if int_ovf##(a0 ne zero) 511; lui a2,527 512; slli a4,a2,41 513; fmv.d.x fa1,a4 514; fle.d a0,fa1,fa0 515; trap_if int_ovf##(a0 ne zero) 516; fcvt.w.d a0,fa0,rtz 517; ret 518; 519; Disassembled: 520; block0: ; offset 0x0 521; feq.d a0, fa0, fa0 522; bnez a0, 8 523; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 524; auipc a0, 0 525; ld a0, 0x3c(a0) 526; fmv.d.x fa1, a0 527; fle.d a0, fa0, fa1 528; beqz a0, 8 529; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 530; lui a2, 0x20f 531; slli a4, a2, 0x29 532; fmv.d.x fa1, a4 533; fle.d a0, fa1, fa0 534; beqz a0, 8 535; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 536; fcvt.w.d a0, fa0, rtz ; trap: bad_toint 537; ret 538; .byte 0x00, 0x00, 0x00, 0x00 539; .byte 0x00, 0x00, 0x20, 0x00 540; .byte 0x00, 0x00, 0xe0, 0xc1 541 542function %f39(f64) -> i64 { 543block0(v0: f64): 544 v1 = fcvt_to_uint.i64 v0 545 return v1 546} 547 548; VCode: 549; block0: 550; feq.d a0,fa0,fa0 551; trap_if bad_toint##(a0 eq zero) 552; lui a0,3071 553; slli a0,a0,40 554; fmv.d.x fa1,a0 555; fle.d a1,fa0,fa1 556; trap_if int_ovf##(a1 ne zero) 557; lui a4,1087 558; slli a0,a4,40 559; fmv.d.x fa1,a0 560; fle.d a0,fa1,fa0 561; trap_if int_ovf##(a0 ne zero) 562; fcvt.lu.d a0,fa0,rtz 563; ret 564; 565; Disassembled: 566; block0: ; offset 0x0 567; feq.d a0, fa0, fa0 568; bnez a0, 8 569; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 570; lui a0, 0xbff 571; slli a0, a0, 0x28 572; fmv.d.x fa1, a0 573; fle.d a1, fa0, fa1 574; beqz a1, 8 575; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 576; lui a4, 0x43f 577; slli a0, a4, 0x28 578; fmv.d.x fa1, a0 579; fle.d a0, fa1, fa0 580; beqz a0, 8 581; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 582; fcvt.lu.d a0, fa0, rtz ; trap: bad_toint 583; ret 584 585function %f40(f64) -> i64 { 586block0(v0: f64): 587 v1 = fcvt_to_sint.i64 v0 588 return v1 589} 590 591; VCode: 592; block0: 593; feq.d a0,fa0,fa0 594; trap_if bad_toint##(a0 eq zero) 595; ld a0,[const(0)] 596; fmv.d.x fa1,a0 597; fle.d a0,fa0,fa1 598; trap_if int_ovf##(a0 ne zero) 599; lui a2,543 600; slli a4,a2,41 601; fmv.d.x fa1,a4 602; fle.d a0,fa1,fa0 603; trap_if int_ovf##(a0 ne zero) 604; fcvt.l.d a0,fa0,rtz 605; ret 606; 607; Disassembled: 608; block0: ; offset 0x0 609; feq.d a0, fa0, fa0 610; bnez a0, 8 611; .byte 0x00, 0x00, 0x00, 0x00 ; trap: bad_toint 612; auipc a0, 0 613; ld a0, 0x3c(a0) 614; fmv.d.x fa1, a0 615; fle.d a0, fa0, fa1 616; beqz a0, 8 617; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 618; lui a2, 0x21f 619; slli a4, a2, 0x29 620; fmv.d.x fa1, a4 621; fle.d a0, fa1, fa0 622; beqz a0, 8 623; .byte 0x00, 0x00, 0x00, 0x00 ; trap: int_ovf 624; fcvt.l.d a0, fa0, rtz ; trap: bad_toint 625; ret 626; .byte 0x00, 0x00, 0x00, 0x00 627; .byte 0x01, 0x00, 0x00, 0x00 628; .byte 0x00, 0x00, 0xe0, 0xc3 629 630function %f41(i32) -> f32 { 631block0(v0: i32): 632 v1 = fcvt_from_uint.f32 v0 633 return v1 634} 635 636; VCode: 637; block0: 638; fcvt.s.wu fa0,a0,rne 639; ret 640; 641; Disassembled: 642; block0: ; offset 0x0 643; fcvt.s.wu fa0, a0, rne 644; ret 645 646function %f42(i32) -> f32 { 647block0(v0: i32): 648 v1 = fcvt_from_sint.f32 v0 649 return v1 650} 651 652; VCode: 653; block0: 654; fcvt.s.w fa0,a0,rne 655; ret 656; 657; Disassembled: 658; block0: ; offset 0x0 659; fcvt.s.w fa0, a0, rne 660; ret 661 662function %f43(i64) -> f32 { 663block0(v0: i64): 664 v1 = fcvt_from_uint.f32 v0 665 return v1 666} 667 668; VCode: 669; block0: 670; fcvt.s.lu fa0,a0,rne 671; ret 672; 673; Disassembled: 674; block0: ; offset 0x0 675; fcvt.s.lu fa0, a0, rne 676; ret 677 678function %f44(i64) -> f32 { 679block0(v0: i64): 680 v1 = fcvt_from_sint.f32 v0 681 return v1 682} 683 684; VCode: 685; block0: 686; fcvt.s.l fa0,a0,rne 687; ret 688; 689; Disassembled: 690; block0: ; offset 0x0 691; fcvt.s.l fa0, a0, rne 692; ret 693 694function %f45(i32) -> f64 { 695block0(v0: i32): 696 v1 = fcvt_from_uint.f64 v0 697 return v1 698} 699 700; VCode: 701; block0: 702; fcvt.d.wu fa0,a0,rne 703; ret 704; 705; Disassembled: 706; block0: ; offset 0x0 707; fcvt.d.wu fa0, a0 708; ret 709 710function %f46(i32) -> f64 { 711block0(v0: i32): 712 v1 = fcvt_from_sint.f64 v0 713 return v1 714} 715 716; VCode: 717; block0: 718; fcvt.d.w fa0,a0,rne 719; ret 720; 721; Disassembled: 722; block0: ; offset 0x0 723; fcvt.d.w fa0, a0 724; ret 725 726function %f47(i64) -> f64 { 727block0(v0: i64): 728 v1 = fcvt_from_uint.f64 v0 729 return v1 730} 731 732; VCode: 733; block0: 734; fcvt.d.lu fa0,a0,rne 735; ret 736; 737; Disassembled: 738; block0: ; offset 0x0 739; fcvt.d.lu fa0, a0, rne 740; ret 741 742function %f48(i64) -> f64 { 743block0(v0: i64): 744 v1 = fcvt_from_sint.f64 v0 745 return v1 746} 747 748; VCode: 749; block0: 750; fcvt.d.l fa0,a0,rne 751; ret 752; 753; Disassembled: 754; block0: ; offset 0x0 755; fcvt.d.l fa0, a0, rne 756; ret 757 758function %f49(f32) -> i32 { 759block0(v0: f32): 760 v1 = fcvt_to_uint_sat.i32 v0 761 return v1 762} 763 764; VCode: 765; block0: 766; fcvt.wu.s a0,fa0,rtz 767; feq.s a1,fa0,fa0 768; sub a1,zero,a1 769; and a0,a0,a1 770; ret 771; 772; Disassembled: 773; block0: ; offset 0x0 774; fcvt.wu.s a0, fa0, rtz ; trap: bad_toint 775; feq.s a1, fa0, fa0 776; neg a1, a1 777; and a0, a0, a1 778; ret 779 780function %f50(f32) -> i32 { 781block0(v0: f32): 782 v1 = fcvt_to_sint_sat.i32 v0 783 return v1 784} 785 786; VCode: 787; block0: 788; fcvt.w.s a0,fa0,rtz 789; feq.s a1,fa0,fa0 790; sub a1,zero,a1 791; and a0,a0,a1 792; ret 793; 794; Disassembled: 795; block0: ; offset 0x0 796; fcvt.w.s a0, fa0, rtz ; trap: bad_toint 797; feq.s a1, fa0, fa0 798; neg a1, a1 799; and a0, a0, a1 800; ret 801 802function %f51(f32) -> i64 { 803block0(v0: f32): 804 v1 = fcvt_to_uint_sat.i64 v0 805 return v1 806} 807 808; VCode: 809; block0: 810; fcvt.lu.s a0,fa0,rtz 811; feq.s a1,fa0,fa0 812; sub a1,zero,a1 813; and a0,a0,a1 814; ret 815; 816; Disassembled: 817; block0: ; offset 0x0 818; fcvt.lu.s a0, fa0, rtz ; trap: bad_toint 819; feq.s a1, fa0, fa0 820; neg a1, a1 821; and a0, a0, a1 822; ret 823 824function %f52(f32) -> i64 { 825block0(v0: f32): 826 v1 = fcvt_to_sint_sat.i64 v0 827 return v1 828} 829 830; VCode: 831; block0: 832; fcvt.l.s a0,fa0,rtz 833; feq.s a1,fa0,fa0 834; sub a1,zero,a1 835; and a0,a0,a1 836; ret 837; 838; Disassembled: 839; block0: ; offset 0x0 840; fcvt.l.s a0, fa0, rtz ; trap: bad_toint 841; feq.s a1, fa0, fa0 842; neg a1, a1 843; and a0, a0, a1 844; ret 845 846function %f53(f64) -> i32 { 847block0(v0: f64): 848 v1 = fcvt_to_uint_sat.i32 v0 849 return v1 850} 851 852; VCode: 853; block0: 854; fcvt.wu.d a0,fa0,rtz 855; feq.d a1,fa0,fa0 856; sub a1,zero,a1 857; and a0,a0,a1 858; ret 859; 860; Disassembled: 861; block0: ; offset 0x0 862; fcvt.wu.d a0, fa0, rtz ; trap: bad_toint 863; feq.d a1, fa0, fa0 864; neg a1, a1 865; and a0, a0, a1 866; ret 867 868function %f54(f64) -> i32 { 869block0(v0: f64): 870 v1 = fcvt_to_sint_sat.i32 v0 871 return v1 872} 873 874; VCode: 875; block0: 876; fcvt.w.d a0,fa0,rtz 877; feq.d a1,fa0,fa0 878; sub a1,zero,a1 879; and a0,a0,a1 880; ret 881; 882; Disassembled: 883; block0: ; offset 0x0 884; fcvt.w.d a0, fa0, rtz ; trap: bad_toint 885; feq.d a1, fa0, fa0 886; neg a1, a1 887; and a0, a0, a1 888; ret 889 890function %f55(f64) -> i64 { 891block0(v0: f64): 892 v1 = fcvt_to_uint_sat.i64 v0 893 return v1 894} 895 896; VCode: 897; block0: 898; fcvt.lu.d a0,fa0,rtz 899; feq.d a1,fa0,fa0 900; sub a1,zero,a1 901; and a0,a0,a1 902; ret 903; 904; Disassembled: 905; block0: ; offset 0x0 906; fcvt.lu.d a0, fa0, rtz ; trap: bad_toint 907; feq.d a1, fa0, fa0 908; neg a1, a1 909; and a0, a0, a1 910; ret 911 912function %f56(f64) -> i64 { 913block0(v0: f64): 914 v1 = fcvt_to_sint_sat.i64 v0 915 return v1 916} 917 918; VCode: 919; block0: 920; fcvt.l.d a0,fa0,rtz 921; feq.d a1,fa0,fa0 922; sub a1,zero,a1 923; and a0,a0,a1 924; ret 925; 926; Disassembled: 927; block0: ; offset 0x0 928; fcvt.l.d a0, fa0, rtz ; trap: bad_toint 929; feq.d a1, fa0, fa0 930; neg a1, a1 931; and a0, a0, a1 932; ret 933 934