xref: /freebsd-14.2/sys/dev/cxgbe/t4_iov.c (revision 40641536)
1 /*-
2  * Copyright (c) 2015-2016 Chelsio Communications, Inc.
3  * All rights reserved.
4  * Written by: John Baldwin <[email protected]>
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 #include <sys/param.h>
30 #include <sys/bus.h>
31 #include <sys/kernel.h>
32 #include <sys/module.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/iov.h>
36 #include <dev/pci/pcivar.h>
37 #include <net/if.h>
38 #include <net/if_vlan_var.h>
39 
40 #ifdef PCI_IOV
41 #include <sys/nv.h>
42 #include <sys/iov_schema.h>
43 #include <dev/pci/pci_iov.h>
44 #endif
45 
46 #include "common/common.h"
47 #include "common/t4_regs.h"
48 #include "t4_if.h"
49 
50 struct t4iov_softc {
51 	device_t sc_dev;
52 	device_t sc_main;
53 	bool sc_attached;
54 
55 	int pf;
56 	int regs_rid;
57 	struct resource *regs_res;
58 	bus_space_handle_t bh;
59 	bus_space_tag_t bt;
60 };
61 
62 struct {
63 	uint16_t device;
64 	char *desc;
65 } t4iov_pciids[] = {
66 	{0x4000, "Chelsio T440-dbg"},
67 	{0x4001, "Chelsio T420-CR"},
68 	{0x4002, "Chelsio T422-CR"},
69 	{0x4003, "Chelsio T440-CR"},
70 	{0x4004, "Chelsio T420-BCH"},
71 	{0x4005, "Chelsio T440-BCH"},
72 	{0x4006, "Chelsio T440-CH"},
73 	{0x4007, "Chelsio T420-SO"},
74 	{0x4008, "Chelsio T420-CX"},
75 	{0x4009, "Chelsio T420-BT"},
76 	{0x400a, "Chelsio T404-BT"},
77 	{0x400e, "Chelsio T440-LP-CR"},
78 }, t5iov_pciids[] = {
79 	{0x5000, "Chelsio T580-dbg"},
80 	{0x5001,  "Chelsio T520-CR"},		/* 2 x 10G */
81 	{0x5002,  "Chelsio T522-CR"},		/* 2 x 10G, 2 X 1G */
82 	{0x5003,  "Chelsio T540-CR"},		/* 4 x 10G */
83 	{0x5007,  "Chelsio T520-SO"},		/* 2 x 10G, nomem */
84 	{0x5009,  "Chelsio T520-BT"},		/* 2 x 10GBaseT */
85 	{0x500a,  "Chelsio T504-BT"},		/* 4 x 1G */
86 	{0x500d,  "Chelsio T580-CR"},		/* 2 x 40G */
87 	{0x500e,  "Chelsio T540-LP-CR"},	/* 4 x 10G */
88 	{0x5010,  "Chelsio T580-LP-CR"},	/* 2 x 40G */
89 	{0x5011,  "Chelsio T520-LL-CR"},	/* 2 x 10G */
90 	{0x5012,  "Chelsio T560-CR"},		/* 1 x 40G, 2 x 10G */
91 	{0x5014,  "Chelsio T580-LP-SO-CR"},	/* 2 x 40G, nomem */
92 	{0x5015,  "Chelsio T502-BT"},		/* 2 x 1G */
93 	{0x5018,  "Chelsio T540-BT"},		/* 4 x 10GBaseT */
94 	{0x5019,  "Chelsio T540-LP-BT"},	/* 4 x 10GBaseT */
95 	{0x501a,  "Chelsio T540-SO-BT"},	/* 4 x 10GBaseT, nomem */
96 	{0x501b,  "Chelsio T540-SO-CR"},	/* 4 x 10G, nomem */
97 }, t6iov_pciids[] = {
98 	{0x6000, "Chelsio T6-DBG-25"},		/* 2 x 10/25G, debug */
99 	{0x6001, "Chelsio T6225-CR"},		/* 2 x 10/25G */
100 	{0x6002, "Chelsio T6225-SO-CR"},	/* 2 x 10/25G, nomem */
101 	{0x6003, "Chelsio T6425-CR"},		/* 4 x 10/25G */
102 	{0x6004, "Chelsio T6425-SO-CR"},	/* 4 x 10/25G, nomem */
103 	{0x6005, "Chelsio T6225-OCP-SO"},	/* 2 x 10/25G, nomem */
104 	{0x6006, "Chelsio T62100-OCP-SO"},	/* 2 x 40/50/100G, nomem */
105 	{0x6007, "Chelsio T62100-LP-CR"},	/* 2 x 40/50/100G */
106 	{0x6008, "Chelsio T62100-SO-CR"},	/* 2 x 40/50/100G, nomem */
107 	{0x6009, "Chelsio T6210-BT"},		/* 2 x 10GBASE-T */
108 	{0x600d, "Chelsio T62100-CR"},		/* 2 x 40/50/100G */
109 	{0x6010, "Chelsio T6-DBG-100"},		/* 2 x 40/50/100G, debug */
110 	{0x6011, "Chelsio T6225-LL-CR"},	/* 2 x 10/25G */
111 	{0x6014, "Chelsio T61100-OCP-SO"},	/* 1 x 40/50/100G, nomem */
112 	{0x6015, "Chelsio T6201-BT"},		/* 2 x 1000BASE-T */
113 
114 	/* Custom */
115 	{0x6080, "Chelsio T6225 80"},
116 	{0x6081, "Chelsio T62100 81"},
117 	{0x6082, "Chelsio T6225-CR 82"},
118 	{0x6083, "Chelsio T62100-CR 83"},
119 	{0x6084, "Chelsio T64100-CR 84"},
120 	{0x6085, "Chelsio T6240-SO 85"},
121 	{0x6086, "Chelsio T6225-SO-CR 86"},
122 	{0x6087, "Chelsio T6225-CR 87"},
123 };
124 
125 static inline uint32_t
t4iov_read_reg(struct t4iov_softc * sc,uint32_t reg)126 t4iov_read_reg(struct t4iov_softc *sc, uint32_t reg)
127 {
128 
129 	return bus_space_read_4(sc->bt, sc->bh, reg);
130 }
131 
132 static int	t4iov_attach_child(device_t dev);
133 
134 static int
t4iov_probe(device_t dev)135 t4iov_probe(device_t dev)
136 {
137 	uint16_t d;
138 	size_t i;
139 
140 	if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
141 		return (ENXIO);
142 
143 	d = pci_get_device(dev);
144 	for (i = 0; i < nitems(t4iov_pciids); i++) {
145 		if (d == t4iov_pciids[i].device) {
146 			device_set_desc(dev, t4iov_pciids[i].desc);
147 			device_quiet(dev);
148 			return (BUS_PROBE_DEFAULT);
149 		}
150 	}
151 	return (ENXIO);
152 }
153 
154 static int
t5iov_probe(device_t dev)155 t5iov_probe(device_t dev)
156 {
157 	uint16_t d;
158 	size_t i;
159 
160 	if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
161 		return (ENXIO);
162 
163 	d = pci_get_device(dev);
164 	for (i = 0; i < nitems(t5iov_pciids); i++) {
165 		if (d == t5iov_pciids[i].device) {
166 			device_set_desc(dev, t5iov_pciids[i].desc);
167 			device_quiet(dev);
168 			return (BUS_PROBE_DEFAULT);
169 		}
170 	}
171 	return (ENXIO);
172 }
173 
174 static int
t6iov_probe(device_t dev)175 t6iov_probe(device_t dev)
176 {
177 	uint16_t d;
178 	size_t i;
179 
180 	if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO)
181 		return (ENXIO);
182 
183 	d = pci_get_device(dev);
184 	for (i = 0; i < nitems(t6iov_pciids); i++) {
185 		if (d == t6iov_pciids[i].device) {
186 			device_set_desc(dev, t6iov_pciids[i].desc);
187 			device_quiet(dev);
188 			return (BUS_PROBE_DEFAULT);
189 		}
190 	}
191 	return (ENXIO);
192 }
193 
194 static int
t4iov_attach(device_t dev)195 t4iov_attach(device_t dev)
196 {
197 	struct t4iov_softc *sc;
198 	uint32_t pl_rev, whoami;
199 	int error;
200 
201 	sc = device_get_softc(dev);
202 	sc->sc_dev = dev;
203 
204 	sc->regs_rid = PCIR_BAR(0);
205 	sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
206 	    &sc->regs_rid, RF_ACTIVE);
207 	if (sc->regs_res == NULL) {
208 		device_printf(dev, "cannot map registers.\n");
209 		return (ENXIO);
210 	}
211 	sc->bt = rman_get_bustag(sc->regs_res);
212 	sc->bh = rman_get_bushandle(sc->regs_res);
213 
214 	pl_rev = t4iov_read_reg(sc, A_PL_REV);
215 	whoami = t4iov_read_reg(sc, A_PL_WHOAMI);
216 	if (G_CHIPID(pl_rev) <= CHELSIO_T5)
217 		sc->pf = G_SOURCEPF(whoami);
218 	else
219 		sc->pf = G_T6_SOURCEPF(whoami);
220 
221 	sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
222 	    pci_get_slot(dev), 4);
223 	if (sc->sc_main == NULL) {
224 		bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
225 		    sc->regs_res);
226 		return (ENXIO);
227 	}
228 	if (T4_IS_MAIN_READY(sc->sc_main) == 0) {
229 		error = t4iov_attach_child(dev);
230 		if (error != 0)
231 			bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
232 			    sc->regs_res);
233 		return (error);
234 	}
235 	return (0);
236 }
237 
238 static int
t4iov_attach_child(device_t dev)239 t4iov_attach_child(device_t dev)
240 {
241 	struct t4iov_softc *sc;
242 #ifdef PCI_IOV
243 	nvlist_t *pf_schema, *vf_schema;
244 #endif
245 	device_t pdev;
246 	int error;
247 
248 	sc = device_get_softc(dev);
249 	MPASS(!sc->sc_attached);
250 
251 	/*
252 	 * PF0-3 are associated with a specific port on the NIC (PF0
253 	 * with port 0, etc.).  Ask the PF4 driver for the device for
254 	 * this function's associated port to determine if the port is
255 	 * present.
256 	 */
257 	error = T4_READ_PORT_DEVICE(sc->sc_main, pci_get_function(dev), &pdev);
258 	if (error)
259 		return (0);
260 
261 #ifdef PCI_IOV
262 	pf_schema = pci_iov_schema_alloc_node();
263 	vf_schema = pci_iov_schema_alloc_node();
264 	pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL);
265 	pci_iov_schema_add_vlan(vf_schema, "vlan", 0, 0);
266 	error = pci_iov_attach_name(dev, pf_schema, vf_schema, "%s",
267 	    device_get_nameunit(pdev));
268 	if (error) {
269 		device_printf(dev, "Failed to initialize SR-IOV: %d\n", error);
270 		return (0);
271 	}
272 #endif
273 
274 	sc->sc_attached = true;
275 	return (0);
276 }
277 
278 static int
t4iov_detach_child(device_t dev)279 t4iov_detach_child(device_t dev)
280 {
281 	struct t4iov_softc *sc;
282 #ifdef PCI_IOV
283 	int error;
284 #endif
285 
286 	sc = device_get_softc(dev);
287 	if (!sc->sc_attached)
288 		return (0);
289 
290 #ifdef PCI_IOV
291 	error = pci_iov_detach(dev);
292 	if (error != 0) {
293 		device_printf(dev, "Failed to disable SR-IOV\n");
294 		return (error);
295 	}
296 #endif
297 
298 	sc->sc_attached = false;
299 	return (0);
300 }
301 
302 static int
t4iov_detach(device_t dev)303 t4iov_detach(device_t dev)
304 {
305 	struct t4iov_softc *sc;
306 	int error;
307 
308 	sc = device_get_softc(dev);
309 	if (sc->sc_attached) {
310 		error = t4iov_detach_child(dev);
311 		if (error)
312 			return (error);
313 	}
314 	if (sc->regs_res) {
315 		bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid,
316 		    sc->regs_res);
317 	}
318 	return (0);
319 }
320 
321 #ifdef PCI_IOV
322 static int
t4iov_iov_init(device_t dev,uint16_t num_vfs,const struct nvlist * config)323 t4iov_iov_init(device_t dev, uint16_t num_vfs, const struct nvlist *config)
324 {
325 
326 	/* XXX: The Linux driver sets up a vf_monitor task on T4 adapters. */
327 	return (0);
328 }
329 
330 static void
t4iov_iov_uninit(device_t dev)331 t4iov_iov_uninit(device_t dev)
332 {
333 }
334 
335 static int
t4iov_add_vf(device_t dev,uint16_t vfnum,const struct nvlist * config)336 t4iov_add_vf(device_t dev, uint16_t vfnum, const struct nvlist *config)
337 {
338 	const void *mac;
339 	struct t4iov_softc *sc;
340 	struct adapter *adap;
341 	uint8_t ma[ETHER_ADDR_LEN];
342 	size_t size;
343 	int rc;
344 
345 	sc = device_get_softc(dev);
346 	MPASS(sc->sc_attached);
347 	MPASS(sc->sc_main != NULL);
348 	adap = device_get_softc(sc->sc_main);
349 
350 	if (nvlist_exists_binary(config, "mac-addr")) {
351 		mac = nvlist_get_binary(config, "mac-addr", &size);
352 		bcopy(mac, ma, ETHER_ADDR_LEN);
353 
354 		if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK,
355 		    "t4vfma") != 0)
356 			return (ENXIO);
357 		rc = -t4_set_vf_mac(adap, sc->pf, vfnum + 1, 1, ma);
358 		end_synchronized_op(adap, 0);
359 		if (rc != 0) {
360 			device_printf(dev,
361 			    "Failed to set VF%d MAC address to "
362 			    "%02x:%02x:%02x:%02x:%02x:%02x, rc = %d\n", vfnum,
363 			    ma[0], ma[1], ma[2], ma[3], ma[4], ma[5], rc);
364 			return (rc);
365 		}
366 	}
367 
368 	if (nvlist_exists_number(config, "vlan")) {
369 		uint16_t vlan = nvlist_get_number(config, "vlan");
370 
371 		/* We can't restrict to VID 0 */
372 		if (vlan == DOT1Q_VID_NULL)
373 			return (ENOTSUP);
374 
375 		if (vlan == VF_VLAN_TRUNK)
376 			vlan = DOT1Q_VID_NULL;
377 
378 		if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK,
379 		    "t4vfvl") != 0)
380 			return (ENXIO);
381 		rc = t4_set_vlan_acl(adap, sc->pf, vfnum + 1, vlan);
382 		end_synchronized_op(adap, 0);
383 		if (rc != 0) {
384 			device_printf(dev,
385 			    "Failed to set VF%d VLAN to %d, rc = %d\n",
386 			    vfnum, vlan, rc);
387 			return (rc);
388 		}
389 	}
390 
391 	return (0);
392 }
393 #endif
394 
395 static device_method_t t4iov_methods[] = {
396 	DEVMETHOD(device_probe,		t4iov_probe),
397 	DEVMETHOD(device_attach,	t4iov_attach),
398 	DEVMETHOD(device_detach,	t4iov_detach),
399 
400 #ifdef PCI_IOV
401 	DEVMETHOD(pci_iov_init,		t4iov_iov_init),
402 	DEVMETHOD(pci_iov_uninit,	t4iov_iov_uninit),
403 	DEVMETHOD(pci_iov_add_vf,	t4iov_add_vf),
404 #endif
405 
406 	DEVMETHOD(t4_attach_child,	t4iov_attach_child),
407 	DEVMETHOD(t4_detach_child,	t4iov_detach_child),
408 
409 	DEVMETHOD_END
410 };
411 
412 static driver_t t4iov_driver = {
413 	"t4iov",
414 	t4iov_methods,
415 	sizeof(struct t4iov_softc)
416 };
417 
418 static device_method_t t5iov_methods[] = {
419 	DEVMETHOD(device_probe,		t5iov_probe),
420 	DEVMETHOD(device_attach,	t4iov_attach),
421 	DEVMETHOD(device_detach,	t4iov_detach),
422 
423 #ifdef PCI_IOV
424 	DEVMETHOD(pci_iov_init,		t4iov_iov_init),
425 	DEVMETHOD(pci_iov_uninit,	t4iov_iov_uninit),
426 	DEVMETHOD(pci_iov_add_vf,	t4iov_add_vf),
427 #endif
428 
429 	DEVMETHOD(t4_attach_child,	t4iov_attach_child),
430 	DEVMETHOD(t4_detach_child,	t4iov_detach_child),
431 
432 	DEVMETHOD_END
433 };
434 
435 static driver_t t5iov_driver = {
436 	"t5iov",
437 	t5iov_methods,
438 	sizeof(struct t4iov_softc)
439 };
440 
441 static device_method_t t6iov_methods[] = {
442 	DEVMETHOD(device_probe,		t6iov_probe),
443 	DEVMETHOD(device_attach,	t4iov_attach),
444 	DEVMETHOD(device_detach,	t4iov_detach),
445 
446 #ifdef PCI_IOV
447 	DEVMETHOD(pci_iov_init,		t4iov_iov_init),
448 	DEVMETHOD(pci_iov_uninit,	t4iov_iov_uninit),
449 	DEVMETHOD(pci_iov_add_vf,	t4iov_add_vf),
450 #endif
451 
452 	DEVMETHOD(t4_attach_child,	t4iov_attach_child),
453 	DEVMETHOD(t4_detach_child,	t4iov_detach_child),
454 
455 	DEVMETHOD_END
456 };
457 
458 static driver_t t6iov_driver = {
459 	"t6iov",
460 	t6iov_methods,
461 	sizeof(struct t4iov_softc)
462 };
463 
464 DRIVER_MODULE(t4iov, pci, t4iov_driver, 0, 0);
465 MODULE_VERSION(t4iov, 1);
466 
467 DRIVER_MODULE(t5iov, pci, t5iov_driver, 0, 0);
468 MODULE_VERSION(t5iov, 1);
469 
470 DRIVER_MODULE(t6iov, pci, t6iov_driver, 0, 0);
471 MODULE_VERSION(t6iov, 1);
472