1 /*-
2 * Broadcom NetXtreme-C/E network driver.
3 *
4 * Copyright (c) 2016 Broadcom, All Rights Reserved.
5 * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26 * THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 #include <sys/param.h>
33 #include <sys/socket.h>
34 #include <sys/kernel.h>
35 #include <sys/bus.h>
36 #include <sys/module.h>
37 #include <sys/rman.h>
38 #include <sys/endian.h>
39 #include <sys/sockio.h>
40 #include <sys/priv.h>
41
42 #include <machine/bus.h>
43 #include <machine/resource.h>
44
45 #include <dev/pci/pcireg.h>
46 #include <dev/pci/pcivar.h>
47
48 #include <net/if.h>
49 #include <net/if_dl.h>
50 #include <net/if_media.h>
51 #include <net/if_var.h>
52 #include <net/ethernet.h>
53 #include <net/iflib.h>
54
55 #include "opt_inet.h"
56 #include "opt_inet6.h"
57 #include "opt_rss.h"
58
59 #include "ifdi_if.h"
60
61 #include "bnxt.h"
62 #include "bnxt_hwrm.h"
63 #include "bnxt_ioctl.h"
64 #include "bnxt_sysctl.h"
65 #include "hsi_struct_def.h"
66
67 /*
68 * PCI Device ID Table
69 */
70
71 static pci_vendor_info_t bnxt_vendor_info_array[] =
72 {
73 PVID(BROADCOM_VENDOR_ID, BCM57301,
74 "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet Controller"),
75 PVID(BROADCOM_VENDOR_ID, BCM57302,
76 "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet Controller"),
77 PVID(BROADCOM_VENDOR_ID, BCM57304,
78 "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet Controller"),
79 PVID(BROADCOM_VENDOR_ID, BCM57311,
80 "Broadcom BCM57311 NetXtreme-C 10Gb Ethernet"),
81 PVID(BROADCOM_VENDOR_ID, BCM57312,
82 "Broadcom BCM57312 NetXtreme-C 10Gb/25Gb Ethernet"),
83 PVID(BROADCOM_VENDOR_ID, BCM57314,
84 "Broadcom BCM57314 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet"),
85 PVID(BROADCOM_VENDOR_ID, BCM57402,
86 "Broadcom BCM57402 NetXtreme-E 10Gb Ethernet Controller"),
87 PVID(BROADCOM_VENDOR_ID, BCM57402_NPAR,
88 "Broadcom BCM57402 NetXtreme-E Partition"),
89 PVID(BROADCOM_VENDOR_ID, BCM57404,
90 "Broadcom BCM57404 NetXtreme-E 10Gb/25Gb Ethernet Controller"),
91 PVID(BROADCOM_VENDOR_ID, BCM57404_NPAR,
92 "Broadcom BCM57404 NetXtreme-E Partition"),
93 PVID(BROADCOM_VENDOR_ID, BCM57406,
94 "Broadcom BCM57406 NetXtreme-E 10GBase-T Ethernet Controller"),
95 PVID(BROADCOM_VENDOR_ID, BCM57406_NPAR,
96 "Broadcom BCM57406 NetXtreme-E Partition"),
97 PVID(BROADCOM_VENDOR_ID, BCM57407,
98 "Broadcom BCM57407 NetXtreme-E 10GBase-T Ethernet Controller"),
99 PVID(BROADCOM_VENDOR_ID, BCM57407_NPAR,
100 "Broadcom BCM57407 NetXtreme-E Ethernet Partition"),
101 PVID(BROADCOM_VENDOR_ID, BCM57407_SFP,
102 "Broadcom BCM57407 NetXtreme-E 25Gb Ethernet Controller"),
103 PVID(BROADCOM_VENDOR_ID, BCM57412,
104 "Broadcom BCM57412 NetXtreme-E 10Gb Ethernet"),
105 PVID(BROADCOM_VENDOR_ID, BCM57412_NPAR1,
106 "Broadcom BCM57412 NetXtreme-E Ethernet Partition"),
107 PVID(BROADCOM_VENDOR_ID, BCM57412_NPAR2,
108 "Broadcom BCM57412 NetXtreme-E Ethernet Partition"),
109 PVID(BROADCOM_VENDOR_ID, BCM57414,
110 "Broadcom BCM57414 NetXtreme-E 10Gb/25Gb Ethernet"),
111 PVID(BROADCOM_VENDOR_ID, BCM57414_NPAR1,
112 "Broadcom BCM57414 NetXtreme-E Ethernet Partition"),
113 PVID(BROADCOM_VENDOR_ID, BCM57414_NPAR2,
114 "Broadcom BCM57414 NetXtreme-E Ethernet Partition"),
115 PVID(BROADCOM_VENDOR_ID, BCM57416,
116 "Broadcom BCM57416 NetXtreme-E 10GBase-T Ethernet"),
117 PVID(BROADCOM_VENDOR_ID, BCM57416_NPAR1,
118 "Broadcom BCM57416 NetXtreme-E Ethernet Partition"),
119 PVID(BROADCOM_VENDOR_ID, BCM57416_NPAR2,
120 "Broadcom BCM57416 NetXtreme-E Ethernet Partition"),
121 PVID(BROADCOM_VENDOR_ID, BCM57416_SFP,
122 "Broadcom BCM57416 NetXtreme-E 10Gb Ethernet"),
123 PVID(BROADCOM_VENDOR_ID, BCM57417,
124 "Broadcom BCM57417 NetXtreme-E 10GBase-T Ethernet"),
125 PVID(BROADCOM_VENDOR_ID, BCM57417_NPAR1,
126 "Broadcom BCM57417 NetXtreme-E Ethernet Partition"),
127 PVID(BROADCOM_VENDOR_ID, BCM57417_NPAR2,
128 "Broadcom BCM57417 NetXtreme-E Ethernet Partition"),
129 PVID(BROADCOM_VENDOR_ID, BCM57417_SFP,
130 "Broadcom BCM57417 NetXtreme-E 10Gb/25Gb Ethernet"),
131 PVID(BROADCOM_VENDOR_ID, BCM57454,
132 "Broadcom BCM57454 NetXtreme-E 10Gb/25Gb/40Gb/50Gb/100Gb Ethernet"),
133 PVID(BROADCOM_VENDOR_ID, BCM58700,
134 "Broadcom BCM58700 Nitro 1Gb/2.5Gb/10Gb Ethernet"),
135 PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF1,
136 "Broadcom NetXtreme-C Ethernet Virtual Function"),
137 PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF2,
138 "Broadcom NetXtreme-C Ethernet Virtual Function"),
139 PVID(BROADCOM_VENDOR_ID, NETXTREME_C_VF3,
140 "Broadcom NetXtreme-C Ethernet Virtual Function"),
141 PVID(BROADCOM_VENDOR_ID, NETXTREME_E_VF1,
142 "Broadcom NetXtreme-E Ethernet Virtual Function"),
143 PVID(BROADCOM_VENDOR_ID, NETXTREME_E_VF2,
144 "Broadcom NetXtreme-E Ethernet Virtual Function"),
145 PVID(BROADCOM_VENDOR_ID, NETXTREME_E_VF3,
146 "Broadcom NetXtreme-E Ethernet Virtual Function"),
147 /* required last entry */
148
149 PVID_END
150 };
151
152 /*
153 * Function prototypes
154 */
155
156 static void *bnxt_register(device_t dev);
157
158 /* Soft queue setup and teardown */
159 static int bnxt_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
160 uint64_t *paddrs, int ntxqs, int ntxqsets);
161 static int bnxt_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
162 uint64_t *paddrs, int nrxqs, int nrxqsets);
163 static void bnxt_queues_free(if_ctx_t ctx);
164
165 /* Device setup and teardown */
166 static int bnxt_attach_pre(if_ctx_t ctx);
167 static int bnxt_attach_post(if_ctx_t ctx);
168 static int bnxt_detach(if_ctx_t ctx);
169
170 /* Device configuration */
171 static void bnxt_init(if_ctx_t ctx);
172 static void bnxt_stop(if_ctx_t ctx);
173 static void bnxt_multi_set(if_ctx_t ctx);
174 static int bnxt_mtu_set(if_ctx_t ctx, uint32_t mtu);
175 static void bnxt_media_status(if_ctx_t ctx, struct ifmediareq * ifmr);
176 static int bnxt_media_change(if_ctx_t ctx);
177 static int bnxt_promisc_set(if_ctx_t ctx, int flags);
178 static uint64_t bnxt_get_counter(if_ctx_t, ift_counter);
179 static void bnxt_update_admin_status(if_ctx_t ctx);
180 static void bnxt_if_timer(if_ctx_t ctx, uint16_t qid);
181
182 /* Interrupt enable / disable */
183 static void bnxt_intr_enable(if_ctx_t ctx);
184 static int bnxt_rx_queue_intr_enable(if_ctx_t ctx, uint16_t qid);
185 static int bnxt_tx_queue_intr_enable(if_ctx_t ctx, uint16_t qid);
186 static void bnxt_disable_intr(if_ctx_t ctx);
187 static int bnxt_msix_intr_assign(if_ctx_t ctx, int msix);
188
189 /* vlan support */
190 static void bnxt_vlan_register(if_ctx_t ctx, uint16_t vtag);
191 static void bnxt_vlan_unregister(if_ctx_t ctx, uint16_t vtag);
192
193 /* ioctl */
194 static int bnxt_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data);
195
196 static int bnxt_shutdown(if_ctx_t ctx);
197 static int bnxt_suspend(if_ctx_t ctx);
198 static int bnxt_resume(if_ctx_t ctx);
199
200 /* Internal support functions */
201 static int bnxt_probe_phy(struct bnxt_softc *softc);
202 static void bnxt_add_media_types(struct bnxt_softc *softc);
203 static int bnxt_pci_mapping(struct bnxt_softc *softc);
204 static void bnxt_pci_mapping_free(struct bnxt_softc *softc);
205 static int bnxt_update_link(struct bnxt_softc *softc, bool chng_link_state);
206 static int bnxt_handle_def_cp(void *arg);
207 static int bnxt_handle_rx_cp(void *arg);
208 static void bnxt_clear_ids(struct bnxt_softc *softc);
209 static void inline bnxt_do_enable_intr(struct bnxt_cp_ring *cpr);
210 static void inline bnxt_do_disable_intr(struct bnxt_cp_ring *cpr);
211 static void bnxt_mark_cpr_invalid(struct bnxt_cp_ring *cpr);
212 static void bnxt_def_cp_task(void *context);
213 static void bnxt_handle_async_event(struct bnxt_softc *softc,
214 struct cmpl_base *cmpl);
215 static uint8_t get_phy_type(struct bnxt_softc *softc);
216 static uint64_t bnxt_get_baudrate(struct bnxt_link_info *link);
217 static void bnxt_get_wol_settings(struct bnxt_softc *softc);
218 static int bnxt_wol_config(if_ctx_t ctx);
219
220 /*
221 * Device Interface Declaration
222 */
223
224 static device_method_t bnxt_methods[] = {
225 /* Device interface */
226 DEVMETHOD(device_register, bnxt_register),
227 DEVMETHOD(device_probe, iflib_device_probe),
228 DEVMETHOD(device_attach, iflib_device_attach),
229 DEVMETHOD(device_detach, iflib_device_detach),
230 DEVMETHOD(device_shutdown, iflib_device_shutdown),
231 DEVMETHOD(device_suspend, iflib_device_suspend),
232 DEVMETHOD(device_resume, iflib_device_resume),
233 DEVMETHOD_END
234 };
235
236 static driver_t bnxt_driver = {
237 "bnxt", bnxt_methods, sizeof(struct bnxt_softc),
238 };
239
240 devclass_t bnxt_devclass;
241 DRIVER_MODULE(bnxt, pci, bnxt_driver, bnxt_devclass, 0, 0);
242
243 MODULE_DEPEND(bnxt, pci, 1, 1, 1);
244 MODULE_DEPEND(bnxt, ether, 1, 1, 1);
245 MODULE_DEPEND(bnxt, iflib, 1, 1, 1);
246
247 IFLIB_PNP_INFO(pci, bnxt, bnxt_vendor_info_array);
248
249 static device_method_t bnxt_iflib_methods[] = {
250 DEVMETHOD(ifdi_tx_queues_alloc, bnxt_tx_queues_alloc),
251 DEVMETHOD(ifdi_rx_queues_alloc, bnxt_rx_queues_alloc),
252 DEVMETHOD(ifdi_queues_free, bnxt_queues_free),
253
254 DEVMETHOD(ifdi_attach_pre, bnxt_attach_pre),
255 DEVMETHOD(ifdi_attach_post, bnxt_attach_post),
256 DEVMETHOD(ifdi_detach, bnxt_detach),
257
258 DEVMETHOD(ifdi_init, bnxt_init),
259 DEVMETHOD(ifdi_stop, bnxt_stop),
260 DEVMETHOD(ifdi_multi_set, bnxt_multi_set),
261 DEVMETHOD(ifdi_mtu_set, bnxt_mtu_set),
262 DEVMETHOD(ifdi_media_status, bnxt_media_status),
263 DEVMETHOD(ifdi_media_change, bnxt_media_change),
264 DEVMETHOD(ifdi_promisc_set, bnxt_promisc_set),
265 DEVMETHOD(ifdi_get_counter, bnxt_get_counter),
266 DEVMETHOD(ifdi_update_admin_status, bnxt_update_admin_status),
267 DEVMETHOD(ifdi_timer, bnxt_if_timer),
268
269 DEVMETHOD(ifdi_intr_enable, bnxt_intr_enable),
270 DEVMETHOD(ifdi_tx_queue_intr_enable, bnxt_tx_queue_intr_enable),
271 DEVMETHOD(ifdi_rx_queue_intr_enable, bnxt_rx_queue_intr_enable),
272 DEVMETHOD(ifdi_intr_disable, bnxt_disable_intr),
273 DEVMETHOD(ifdi_msix_intr_assign, bnxt_msix_intr_assign),
274
275 DEVMETHOD(ifdi_vlan_register, bnxt_vlan_register),
276 DEVMETHOD(ifdi_vlan_unregister, bnxt_vlan_unregister),
277
278 DEVMETHOD(ifdi_priv_ioctl, bnxt_priv_ioctl),
279
280 DEVMETHOD(ifdi_suspend, bnxt_suspend),
281 DEVMETHOD(ifdi_shutdown, bnxt_shutdown),
282 DEVMETHOD(ifdi_resume, bnxt_resume),
283
284 DEVMETHOD_END
285 };
286
287 static driver_t bnxt_iflib_driver = {
288 "bnxt", bnxt_iflib_methods, sizeof(struct bnxt_softc)
289 };
290
291 /*
292 * iflib shared context
293 */
294
295 #define BNXT_DRIVER_VERSION "1.0.0.2"
296 char bnxt_driver_version[] = BNXT_DRIVER_VERSION;
297 extern struct if_txrx bnxt_txrx;
298 static struct if_shared_ctx bnxt_sctx_init = {
299 .isc_magic = IFLIB_MAGIC,
300 .isc_driver = &bnxt_iflib_driver,
301 .isc_nfl = 2, // Number of Free Lists
302 .isc_flags = IFLIB_HAS_RXCQ | IFLIB_HAS_TXCQ | IFLIB_NEED_ETHER_PAD,
303 .isc_q_align = PAGE_SIZE,
304 .isc_tx_maxsize = BNXT_TSO_SIZE + sizeof(struct ether_vlan_header),
305 .isc_tx_maxsegsize = BNXT_TSO_SIZE + sizeof(struct ether_vlan_header),
306 .isc_tso_maxsize = BNXT_TSO_SIZE + sizeof(struct ether_vlan_header),
307 .isc_tso_maxsegsize = BNXT_TSO_SIZE + sizeof(struct ether_vlan_header),
308 .isc_rx_maxsize = BNXT_TSO_SIZE + sizeof(struct ether_vlan_header),
309 .isc_rx_maxsegsize = BNXT_TSO_SIZE + sizeof(struct ether_vlan_header),
310
311 // Only use a single segment to avoid page size constraints
312 .isc_rx_nsegments = 1,
313 .isc_ntxqs = 2,
314 .isc_nrxqs = 3,
315 .isc_nrxd_min = {16, 16, 16},
316 .isc_nrxd_default = {PAGE_SIZE / sizeof(struct cmpl_base) * 8,
317 PAGE_SIZE / sizeof(struct rx_prod_pkt_bd),
318 PAGE_SIZE / sizeof(struct rx_prod_pkt_bd)},
319 .isc_nrxd_max = {BNXT_MAX_RXD, BNXT_MAX_RXD, BNXT_MAX_RXD},
320 .isc_ntxd_min = {16, 16, 16},
321 .isc_ntxd_default = {PAGE_SIZE / sizeof(struct cmpl_base) * 2,
322 PAGE_SIZE / sizeof(struct tx_bd_short)},
323 .isc_ntxd_max = {BNXT_MAX_TXD, BNXT_MAX_TXD, BNXT_MAX_TXD},
324
325 .isc_admin_intrcnt = 1,
326 .isc_vendor_info = bnxt_vendor_info_array,
327 .isc_driver_version = bnxt_driver_version,
328 };
329
330 /*
331 * Device Methods
332 */
333
334 static void *
bnxt_register(device_t dev)335 bnxt_register(device_t dev)
336 {
337 return (&bnxt_sctx_init);
338 }
339
340 /*
341 * Device Dependent Configuration Functions
342 */
343
344 /* Soft queue setup and teardown */
345 static int
bnxt_tx_queues_alloc(if_ctx_t ctx,caddr_t * vaddrs,uint64_t * paddrs,int ntxqs,int ntxqsets)346 bnxt_tx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
347 uint64_t *paddrs, int ntxqs, int ntxqsets)
348 {
349 struct bnxt_softc *softc;
350 int i;
351 int rc;
352
353 softc = iflib_get_softc(ctx);
354
355 softc->tx_cp_rings = malloc(sizeof(struct bnxt_cp_ring) * ntxqsets,
356 M_DEVBUF, M_NOWAIT | M_ZERO);
357 if (!softc->tx_cp_rings) {
358 device_printf(iflib_get_dev(ctx),
359 "unable to allocate TX completion rings\n");
360 rc = ENOMEM;
361 goto cp_alloc_fail;
362 }
363 softc->tx_rings = malloc(sizeof(struct bnxt_ring) * ntxqsets,
364 M_DEVBUF, M_NOWAIT | M_ZERO);
365 if (!softc->tx_rings) {
366 device_printf(iflib_get_dev(ctx),
367 "unable to allocate TX rings\n");
368 rc = ENOMEM;
369 goto ring_alloc_fail;
370 }
371 rc = iflib_dma_alloc(ctx, sizeof(struct ctx_hw_stats) * ntxqsets,
372 &softc->tx_stats, 0);
373 if (rc)
374 goto dma_alloc_fail;
375 bus_dmamap_sync(softc->tx_stats.idi_tag, softc->tx_stats.idi_map,
376 BUS_DMASYNC_PREREAD);
377
378 for (i = 0; i < ntxqsets; i++) {
379 /* Set up the completion ring */
380 softc->tx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
381 softc->tx_cp_rings[i].ring.phys_id =
382 (uint16_t)HWRM_NA_SIGNATURE;
383 softc->tx_cp_rings[i].ring.softc = softc;
384 softc->tx_cp_rings[i].ring.id =
385 (softc->scctx->isc_nrxqsets * 2) + 1 + i;
386 softc->tx_cp_rings[i].ring.doorbell =
387 softc->tx_cp_rings[i].ring.id * 0x80;
388 softc->tx_cp_rings[i].ring.ring_size =
389 softc->scctx->isc_ntxd[0];
390 softc->tx_cp_rings[i].ring.vaddr = vaddrs[i * ntxqs];
391 softc->tx_cp_rings[i].ring.paddr = paddrs[i * ntxqs];
392
393 /* Set up the TX ring */
394 softc->tx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
395 softc->tx_rings[i].softc = softc;
396 softc->tx_rings[i].id =
397 (softc->scctx->isc_nrxqsets * 2) + 1 + i;
398 softc->tx_rings[i].doorbell = softc->tx_rings[i].id * 0x80;
399 softc->tx_rings[i].ring_size = softc->scctx->isc_ntxd[1];
400 softc->tx_rings[i].vaddr = vaddrs[i * ntxqs + 1];
401 softc->tx_rings[i].paddr = paddrs[i * ntxqs + 1];
402
403 bnxt_create_tx_sysctls(softc, i);
404 }
405
406 softc->ntxqsets = ntxqsets;
407 return rc;
408
409 dma_alloc_fail:
410 free(softc->tx_rings, M_DEVBUF);
411 ring_alloc_fail:
412 free(softc->tx_cp_rings, M_DEVBUF);
413 cp_alloc_fail:
414 return rc;
415 }
416
417 static void
bnxt_queues_free(if_ctx_t ctx)418 bnxt_queues_free(if_ctx_t ctx)
419 {
420 struct bnxt_softc *softc = iflib_get_softc(ctx);
421
422 // Free TX queues
423 iflib_dma_free(&softc->tx_stats);
424 free(softc->tx_rings, M_DEVBUF);
425 softc->tx_rings = NULL;
426 free(softc->tx_cp_rings, M_DEVBUF);
427 softc->tx_cp_rings = NULL;
428 softc->ntxqsets = 0;
429
430 // Free RX queues
431 iflib_dma_free(&softc->rx_stats);
432 iflib_dma_free(&softc->hw_tx_port_stats);
433 iflib_dma_free(&softc->hw_rx_port_stats);
434 free(softc->grp_info, M_DEVBUF);
435 free(softc->ag_rings, M_DEVBUF);
436 free(softc->rx_rings, M_DEVBUF);
437 free(softc->rx_cp_rings, M_DEVBUF);
438 }
439
440 static int
bnxt_rx_queues_alloc(if_ctx_t ctx,caddr_t * vaddrs,uint64_t * paddrs,int nrxqs,int nrxqsets)441 bnxt_rx_queues_alloc(if_ctx_t ctx, caddr_t *vaddrs,
442 uint64_t *paddrs, int nrxqs, int nrxqsets)
443 {
444 struct bnxt_softc *softc;
445 int i;
446 int rc;
447
448 softc = iflib_get_softc(ctx);
449
450 softc->rx_cp_rings = malloc(sizeof(struct bnxt_cp_ring) * nrxqsets,
451 M_DEVBUF, M_NOWAIT | M_ZERO);
452 if (!softc->rx_cp_rings) {
453 device_printf(iflib_get_dev(ctx),
454 "unable to allocate RX completion rings\n");
455 rc = ENOMEM;
456 goto cp_alloc_fail;
457 }
458 softc->rx_rings = malloc(sizeof(struct bnxt_ring) * nrxqsets,
459 M_DEVBUF, M_NOWAIT | M_ZERO);
460 if (!softc->rx_rings) {
461 device_printf(iflib_get_dev(ctx),
462 "unable to allocate RX rings\n");
463 rc = ENOMEM;
464 goto ring_alloc_fail;
465 }
466 softc->ag_rings = malloc(sizeof(struct bnxt_ring) * nrxqsets,
467 M_DEVBUF, M_NOWAIT | M_ZERO);
468 if (!softc->ag_rings) {
469 device_printf(iflib_get_dev(ctx),
470 "unable to allocate aggregation rings\n");
471 rc = ENOMEM;
472 goto ag_alloc_fail;
473 }
474 softc->grp_info = malloc(sizeof(struct bnxt_grp_info) * nrxqsets,
475 M_DEVBUF, M_NOWAIT | M_ZERO);
476 if (!softc->grp_info) {
477 device_printf(iflib_get_dev(ctx),
478 "unable to allocate ring groups\n");
479 rc = ENOMEM;
480 goto grp_alloc_fail;
481 }
482
483 rc = iflib_dma_alloc(ctx, sizeof(struct ctx_hw_stats) * nrxqsets,
484 &softc->rx_stats, 0);
485 if (rc)
486 goto hw_stats_alloc_fail;
487 bus_dmamap_sync(softc->rx_stats.idi_tag, softc->rx_stats.idi_map,
488 BUS_DMASYNC_PREREAD);
489
490 /*
491 * Additional 512 bytes for future expansion.
492 * To prevent corruption when loaded with newer firmwares with added counters.
493 * This can be deleted when there will be no further additions of counters.
494 */
495 #define BNXT_PORT_STAT_PADDING 512
496
497 rc = iflib_dma_alloc(ctx, sizeof(struct rx_port_stats) + BNXT_PORT_STAT_PADDING,
498 &softc->hw_rx_port_stats, 0);
499 if (rc)
500 goto hw_port_rx_stats_alloc_fail;
501
502 bus_dmamap_sync(softc->hw_rx_port_stats.idi_tag,
503 softc->hw_rx_port_stats.idi_map, BUS_DMASYNC_PREREAD);
504
505 rc = iflib_dma_alloc(ctx, sizeof(struct tx_port_stats) + BNXT_PORT_STAT_PADDING,
506 &softc->hw_tx_port_stats, 0);
507
508 if (rc)
509 goto hw_port_tx_stats_alloc_fail;
510
511 bus_dmamap_sync(softc->hw_tx_port_stats.idi_tag,
512 softc->hw_tx_port_stats.idi_map, BUS_DMASYNC_PREREAD);
513
514 softc->rx_port_stats = (void *) softc->hw_rx_port_stats.idi_vaddr;
515 softc->tx_port_stats = (void *) softc->hw_tx_port_stats.idi_vaddr;
516
517 for (i = 0; i < nrxqsets; i++) {
518 /* Allocation the completion ring */
519 softc->rx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
520 softc->rx_cp_rings[i].ring.phys_id =
521 (uint16_t)HWRM_NA_SIGNATURE;
522 softc->rx_cp_rings[i].ring.softc = softc;
523 softc->rx_cp_rings[i].ring.id = i + 1;
524 softc->rx_cp_rings[i].ring.doorbell =
525 softc->rx_cp_rings[i].ring.id * 0x80;
526 /*
527 * If this ring overflows, RX stops working.
528 */
529 softc->rx_cp_rings[i].ring.ring_size =
530 softc->scctx->isc_nrxd[0];
531 softc->rx_cp_rings[i].ring.vaddr = vaddrs[i * nrxqs];
532 softc->rx_cp_rings[i].ring.paddr = paddrs[i * nrxqs];
533
534 /* Allocate the RX ring */
535 softc->rx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
536 softc->rx_rings[i].softc = softc;
537 softc->rx_rings[i].id = i + 1;
538 softc->rx_rings[i].doorbell = softc->rx_rings[i].id * 0x80;
539 softc->rx_rings[i].ring_size = softc->scctx->isc_nrxd[1];
540 softc->rx_rings[i].vaddr = vaddrs[i * nrxqs + 1];
541 softc->rx_rings[i].paddr = paddrs[i * nrxqs + 1];
542
543 /* Allocate the TPA start buffer */
544 softc->rx_rings[i].tpa_start = malloc(sizeof(struct bnxt_full_tpa_start) *
545 (RX_TPA_START_CMPL_AGG_ID_MASK >> RX_TPA_START_CMPL_AGG_ID_SFT),
546 M_DEVBUF, M_NOWAIT | M_ZERO);
547 if (softc->rx_rings[i].tpa_start == NULL) {
548 rc = -ENOMEM;
549 device_printf(softc->dev,
550 "Unable to allocate space for TPA\n");
551 goto tpa_alloc_fail;
552 }
553
554 /* Allocate the AG ring */
555 softc->ag_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
556 softc->ag_rings[i].softc = softc;
557 softc->ag_rings[i].id = nrxqsets + i + 1;
558 softc->ag_rings[i].doorbell = softc->ag_rings[i].id * 0x80;
559 softc->ag_rings[i].ring_size = softc->scctx->isc_nrxd[2];
560 softc->ag_rings[i].vaddr = vaddrs[i * nrxqs + 2];
561 softc->ag_rings[i].paddr = paddrs[i * nrxqs + 2];
562
563 /* Allocate the ring group */
564 softc->grp_info[i].grp_id = (uint16_t)HWRM_NA_SIGNATURE;
565 softc->grp_info[i].stats_ctx =
566 softc->rx_cp_rings[i].stats_ctx_id;
567 softc->grp_info[i].rx_ring_id = softc->rx_rings[i].phys_id;
568 softc->grp_info[i].ag_ring_id = softc->ag_rings[i].phys_id;
569 softc->grp_info[i].cp_ring_id =
570 softc->rx_cp_rings[i].ring.phys_id;
571
572 bnxt_create_rx_sysctls(softc, i);
573 }
574
575 /*
576 * When SR-IOV is enabled, avoid each VF sending PORT_QSTATS
577 * HWRM every sec with which firmware timeouts can happen
578 */
579 if (BNXT_PF(softc))
580 bnxt_create_port_stats_sysctls(softc);
581
582 /* And finally, the VNIC */
583 softc->vnic_info.id = (uint16_t)HWRM_NA_SIGNATURE;
584 softc->vnic_info.flow_id = (uint16_t)HWRM_NA_SIGNATURE;
585 softc->vnic_info.filter_id = -1;
586 softc->vnic_info.def_ring_grp = (uint16_t)HWRM_NA_SIGNATURE;
587 softc->vnic_info.cos_rule = (uint16_t)HWRM_NA_SIGNATURE;
588 softc->vnic_info.lb_rule = (uint16_t)HWRM_NA_SIGNATURE;
589 softc->vnic_info.rx_mask = HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_BCAST |
590 HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN;
591 softc->vnic_info.mc_list_count = 0;
592 softc->vnic_info.flags = BNXT_VNIC_FLAG_DEFAULT;
593 rc = iflib_dma_alloc(ctx, BNXT_MAX_MC_ADDRS * ETHER_ADDR_LEN,
594 &softc->vnic_info.mc_list, 0);
595 if (rc)
596 goto mc_list_alloc_fail;
597
598 /* The VNIC RSS Hash Key */
599 rc = iflib_dma_alloc(ctx, HW_HASH_KEY_SIZE,
600 &softc->vnic_info.rss_hash_key_tbl, 0);
601 if (rc)
602 goto rss_hash_alloc_fail;
603 bus_dmamap_sync(softc->vnic_info.rss_hash_key_tbl.idi_tag,
604 softc->vnic_info.rss_hash_key_tbl.idi_map,
605 BUS_DMASYNC_PREWRITE);
606 memcpy(softc->vnic_info.rss_hash_key_tbl.idi_vaddr,
607 softc->vnic_info.rss_hash_key, HW_HASH_KEY_SIZE);
608
609 /* Allocate the RSS tables */
610 rc = iflib_dma_alloc(ctx, HW_HASH_INDEX_SIZE * sizeof(uint16_t),
611 &softc->vnic_info.rss_grp_tbl, 0);
612 if (rc)
613 goto rss_grp_alloc_fail;
614 bus_dmamap_sync(softc->vnic_info.rss_grp_tbl.idi_tag,
615 softc->vnic_info.rss_grp_tbl.idi_map,
616 BUS_DMASYNC_PREWRITE);
617 memset(softc->vnic_info.rss_grp_tbl.idi_vaddr, 0xff,
618 softc->vnic_info.rss_grp_tbl.idi_size);
619
620 softc->nrxqsets = nrxqsets;
621 return rc;
622
623 rss_grp_alloc_fail:
624 iflib_dma_free(&softc->vnic_info.rss_hash_key_tbl);
625 rss_hash_alloc_fail:
626 iflib_dma_free(&softc->vnic_info.mc_list);
627 tpa_alloc_fail:
628 mc_list_alloc_fail:
629 for (i = i - 1; i >= 0; i--)
630 free(softc->rx_rings[i].tpa_start, M_DEVBUF);
631 iflib_dma_free(&softc->hw_tx_port_stats);
632 hw_port_tx_stats_alloc_fail:
633 iflib_dma_free(&softc->hw_rx_port_stats);
634 hw_port_rx_stats_alloc_fail:
635 iflib_dma_free(&softc->rx_stats);
636 hw_stats_alloc_fail:
637 free(softc->grp_info, M_DEVBUF);
638 grp_alloc_fail:
639 free(softc->ag_rings, M_DEVBUF);
640 ag_alloc_fail:
641 free(softc->rx_rings, M_DEVBUF);
642 ring_alloc_fail:
643 free(softc->rx_cp_rings, M_DEVBUF);
644 cp_alloc_fail:
645 return rc;
646 }
647
bnxt_free_hwrm_short_cmd_req(struct bnxt_softc * softc)648 static void bnxt_free_hwrm_short_cmd_req(struct bnxt_softc *softc)
649 {
650 if (softc->hwrm_short_cmd_req_addr.idi_vaddr)
651 iflib_dma_free(&softc->hwrm_short_cmd_req_addr);
652 softc->hwrm_short_cmd_req_addr.idi_vaddr = NULL;
653 }
654
bnxt_alloc_hwrm_short_cmd_req(struct bnxt_softc * softc)655 static int bnxt_alloc_hwrm_short_cmd_req(struct bnxt_softc *softc)
656 {
657 int rc;
658
659 rc = iflib_dma_alloc(softc->ctx, softc->hwrm_max_req_len,
660 &softc->hwrm_short_cmd_req_addr, BUS_DMA_NOWAIT);
661
662 return rc;
663 }
664
665 /* Device setup and teardown */
666 static int
bnxt_attach_pre(if_ctx_t ctx)667 bnxt_attach_pre(if_ctx_t ctx)
668 {
669 struct bnxt_softc *softc = iflib_get_softc(ctx);
670 if_softc_ctx_t scctx;
671 int rc = 0;
672
673 softc->ctx = ctx;
674 softc->dev = iflib_get_dev(ctx);
675 softc->media = iflib_get_media(ctx);
676 softc->scctx = iflib_get_softc_ctx(ctx);
677 softc->sctx = iflib_get_sctx(ctx);
678 scctx = softc->scctx;
679
680 /* TODO: Better way of detecting NPAR/VF is needed */
681 switch (pci_get_device(softc->dev)) {
682 case BCM57402_NPAR:
683 case BCM57404_NPAR:
684 case BCM57406_NPAR:
685 case BCM57407_NPAR:
686 case BCM57412_NPAR1:
687 case BCM57412_NPAR2:
688 case BCM57414_NPAR1:
689 case BCM57414_NPAR2:
690 case BCM57416_NPAR1:
691 case BCM57416_NPAR2:
692 softc->flags |= BNXT_FLAG_NPAR;
693 break;
694 case NETXTREME_C_VF1:
695 case NETXTREME_C_VF2:
696 case NETXTREME_C_VF3:
697 case NETXTREME_E_VF1:
698 case NETXTREME_E_VF2:
699 case NETXTREME_E_VF3:
700 softc->flags |= BNXT_FLAG_VF;
701 break;
702 }
703
704 pci_enable_busmaster(softc->dev);
705
706 if (bnxt_pci_mapping(softc))
707 return (ENXIO);
708
709 /* HWRM setup/init */
710 BNXT_HWRM_LOCK_INIT(softc, device_get_nameunit(softc->dev));
711 rc = bnxt_alloc_hwrm_dma_mem(softc);
712 if (rc)
713 goto dma_fail;
714
715 /* Get firmware version and compare with driver */
716 softc->ver_info = malloc(sizeof(struct bnxt_ver_info),
717 M_DEVBUF, M_NOWAIT | M_ZERO);
718 if (softc->ver_info == NULL) {
719 rc = ENOMEM;
720 device_printf(softc->dev,
721 "Unable to allocate space for version info\n");
722 goto ver_alloc_fail;
723 }
724 /* Default minimum required HWRM version */
725 softc->ver_info->hwrm_min_major = 1;
726 softc->ver_info->hwrm_min_minor = 2;
727 softc->ver_info->hwrm_min_update = 2;
728
729 rc = bnxt_hwrm_ver_get(softc);
730 if (rc) {
731 device_printf(softc->dev, "attach: hwrm ver get failed\n");
732 goto ver_fail;
733 }
734
735 if (softc->flags & BNXT_FLAG_SHORT_CMD) {
736 rc = bnxt_alloc_hwrm_short_cmd_req(softc);
737 if (rc)
738 goto hwrm_short_cmd_alloc_fail;
739 }
740
741 /* Get NVRAM info */
742 if (BNXT_PF(softc)) {
743 softc->nvm_info = malloc(sizeof(struct bnxt_nvram_info),
744 M_DEVBUF, M_NOWAIT | M_ZERO);
745 if (softc->nvm_info == NULL) {
746 rc = ENOMEM;
747 device_printf(softc->dev,
748 "Unable to allocate space for NVRAM info\n");
749 goto nvm_alloc_fail;
750 }
751
752 rc = bnxt_hwrm_nvm_get_dev_info(softc, &softc->nvm_info->mfg_id,
753 &softc->nvm_info->device_id, &softc->nvm_info->sector_size,
754 &softc->nvm_info->size, &softc->nvm_info->reserved_size,
755 &softc->nvm_info->available_size);
756 }
757
758 /* Register the driver with the FW */
759 rc = bnxt_hwrm_func_drv_rgtr(softc);
760 if (rc) {
761 device_printf(softc->dev, "attach: hwrm drv rgtr failed\n");
762 goto drv_rgtr_fail;
763 }
764
765 rc = bnxt_hwrm_func_rgtr_async_events(softc, NULL, 0);
766 if (rc) {
767 device_printf(softc->dev, "attach: hwrm rgtr async evts failed\n");
768 goto drv_rgtr_fail;
769 }
770
771 /* Get the HW capabilities */
772 rc = bnxt_hwrm_func_qcaps(softc);
773 if (rc)
774 goto failed;
775
776 /* Get the current configuration of this function */
777 rc = bnxt_hwrm_func_qcfg(softc);
778 if (rc) {
779 device_printf(softc->dev, "attach: hwrm func qcfg failed\n");
780 goto failed;
781 }
782
783 iflib_set_mac(ctx, softc->func.mac_addr);
784
785 scctx->isc_txrx = &bnxt_txrx;
786 scctx->isc_tx_csum_flags = (CSUM_IP | CSUM_TCP | CSUM_UDP |
787 CSUM_TCP_IPV6 | CSUM_UDP_IPV6 | CSUM_TSO);
788 scctx->isc_capabilities = scctx->isc_capenable =
789 /* These are translated to hwassit bits */
790 IFCAP_TXCSUM | IFCAP_TXCSUM_IPV6 | IFCAP_TSO4 | IFCAP_TSO6 |
791 /* These are checked by iflib */
792 IFCAP_LRO | IFCAP_VLAN_HWFILTER |
793 /* These are part of the iflib mask */
794 IFCAP_RXCSUM | IFCAP_RXCSUM_IPV6 | IFCAP_VLAN_MTU |
795 IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWTSO |
796 /* These likely get lost... */
797 IFCAP_VLAN_HWCSUM | IFCAP_JUMBO_MTU;
798
799 if (bnxt_wol_supported(softc))
800 scctx->isc_capabilities |= IFCAP_WOL_MAGIC;
801 bnxt_get_wol_settings(softc);
802 if (softc->wol)
803 scctx->isc_capenable |= IFCAP_WOL_MAGIC;
804
805 /* Get the queue config */
806 rc = bnxt_hwrm_queue_qportcfg(softc);
807 if (rc) {
808 device_printf(softc->dev, "attach: hwrm qportcfg failed\n");
809 goto failed;
810 }
811
812 /* Now perform a function reset */
813 rc = bnxt_hwrm_func_reset(softc);
814 bnxt_clear_ids(softc);
815 if (rc)
816 goto failed;
817
818 /* Now set up iflib sc */
819 scctx->isc_tx_nsegments = 31,
820 scctx->isc_tx_tso_segments_max = 31;
821 scctx->isc_tx_tso_size_max = BNXT_TSO_SIZE;
822 scctx->isc_tx_tso_segsize_max = BNXT_TSO_SIZE;
823 scctx->isc_vectors = softc->func.max_cp_rings;
824 scctx->isc_min_frame_size = BNXT_MIN_FRAME_SIZE;
825 scctx->isc_txrx = &bnxt_txrx;
826
827 if (scctx->isc_nrxd[0] <
828 ((scctx->isc_nrxd[1] * 4) + scctx->isc_nrxd[2]))
829 device_printf(softc->dev,
830 "WARNING: nrxd0 (%d) should be at least 4 * nrxd1 (%d) + nrxd2 (%d). Driver may be unstable\n",
831 scctx->isc_nrxd[0], scctx->isc_nrxd[1], scctx->isc_nrxd[2]);
832 if (scctx->isc_ntxd[0] < scctx->isc_ntxd[1] * 2)
833 device_printf(softc->dev,
834 "WARNING: ntxd0 (%d) should be at least 2 * ntxd1 (%d). Driver may be unstable\n",
835 scctx->isc_ntxd[0], scctx->isc_ntxd[1]);
836 scctx->isc_txqsizes[0] = sizeof(struct cmpl_base) * scctx->isc_ntxd[0];
837 scctx->isc_txqsizes[1] = sizeof(struct tx_bd_short) *
838 scctx->isc_ntxd[1];
839 scctx->isc_rxqsizes[0] = sizeof(struct cmpl_base) * scctx->isc_nrxd[0];
840 scctx->isc_rxqsizes[1] = sizeof(struct rx_prod_pkt_bd) *
841 scctx->isc_nrxd[1];
842 scctx->isc_rxqsizes[2] = sizeof(struct rx_prod_pkt_bd) *
843 scctx->isc_nrxd[2];
844
845 scctx->isc_nrxqsets_max = min(pci_msix_count(softc->dev)-1,
846 softc->fn_qcfg.alloc_completion_rings - 1);
847 scctx->isc_nrxqsets_max = min(scctx->isc_nrxqsets_max,
848 softc->fn_qcfg.alloc_rx_rings);
849 scctx->isc_nrxqsets_max = min(scctx->isc_nrxqsets_max,
850 softc->fn_qcfg.alloc_vnics);
851 scctx->isc_ntxqsets_max = min(softc->fn_qcfg.alloc_tx_rings,
852 softc->fn_qcfg.alloc_completion_rings - scctx->isc_nrxqsets_max - 1);
853
854 scctx->isc_rss_table_size = HW_HASH_INDEX_SIZE;
855 scctx->isc_rss_table_mask = scctx->isc_rss_table_size - 1;
856
857 /* iflib will map and release this bar */
858 scctx->isc_msix_bar = pci_msix_table_bar(softc->dev);
859
860 /*
861 * Default settings for HW LRO (TPA):
862 * Disable HW LRO by default
863 * Can be enabled after taking care of 'packet forwarding'
864 */
865 softc->hw_lro.enable = 0;
866 softc->hw_lro.is_mode_gro = 0;
867 softc->hw_lro.max_agg_segs = 5; /* 2^5 = 32 segs */
868 softc->hw_lro.max_aggs = HWRM_VNIC_TPA_CFG_INPUT_MAX_AGGS_MAX;
869 softc->hw_lro.min_agg_len = 512;
870
871 /* Allocate the default completion ring */
872 softc->def_cp_ring.stats_ctx_id = HWRM_NA_SIGNATURE;
873 softc->def_cp_ring.ring.phys_id = (uint16_t)HWRM_NA_SIGNATURE;
874 softc->def_cp_ring.ring.softc = softc;
875 softc->def_cp_ring.ring.id = 0;
876 softc->def_cp_ring.ring.doorbell = softc->def_cp_ring.ring.id * 0x80;
877 softc->def_cp_ring.ring.ring_size = PAGE_SIZE /
878 sizeof(struct cmpl_base);
879 rc = iflib_dma_alloc(ctx,
880 sizeof(struct cmpl_base) * softc->def_cp_ring.ring.ring_size,
881 &softc->def_cp_ring_mem, 0);
882 softc->def_cp_ring.ring.vaddr = softc->def_cp_ring_mem.idi_vaddr;
883 softc->def_cp_ring.ring.paddr = softc->def_cp_ring_mem.idi_paddr;
884 iflib_config_gtask_init(ctx, &softc->def_cp_task, bnxt_def_cp_task,
885 "dflt_cp");
886
887 rc = bnxt_init_sysctl_ctx(softc);
888 if (rc)
889 goto init_sysctl_failed;
890 if (BNXT_PF(softc)) {
891 rc = bnxt_create_nvram_sysctls(softc->nvm_info);
892 if (rc)
893 goto failed;
894 }
895
896 arc4rand(softc->vnic_info.rss_hash_key, HW_HASH_KEY_SIZE, 0);
897 softc->vnic_info.rss_hash_type =
898 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4 |
899 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4 |
900 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4 |
901 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6 |
902 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6 |
903 HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
904 rc = bnxt_create_config_sysctls_pre(softc);
905 if (rc)
906 goto failed;
907
908 rc = bnxt_create_hw_lro_sysctls(softc);
909 if (rc)
910 goto failed;
911
912 rc = bnxt_create_pause_fc_sysctls(softc);
913 if (rc)
914 goto failed;
915
916 /* Initialize the vlan list */
917 SLIST_INIT(&softc->vnic_info.vlan_tags);
918 softc->vnic_info.vlan_tag_list.idi_vaddr = NULL;
919
920 return (rc);
921
922 failed:
923 bnxt_free_sysctl_ctx(softc);
924 init_sysctl_failed:
925 bnxt_hwrm_func_drv_unrgtr(softc, false);
926 drv_rgtr_fail:
927 if (BNXT_PF(softc))
928 free(softc->nvm_info, M_DEVBUF);
929 nvm_alloc_fail:
930 bnxt_free_hwrm_short_cmd_req(softc);
931 hwrm_short_cmd_alloc_fail:
932 ver_fail:
933 free(softc->ver_info, M_DEVBUF);
934 ver_alloc_fail:
935 bnxt_free_hwrm_dma_mem(softc);
936 dma_fail:
937 BNXT_HWRM_LOCK_DESTROY(softc);
938 bnxt_pci_mapping_free(softc);
939 pci_disable_busmaster(softc->dev);
940 return (rc);
941 }
942
943 static int
bnxt_attach_post(if_ctx_t ctx)944 bnxt_attach_post(if_ctx_t ctx)
945 {
946 struct bnxt_softc *softc = iflib_get_softc(ctx);
947 if_t ifp = iflib_get_ifp(ctx);
948 int rc;
949
950 bnxt_create_config_sysctls_post(softc);
951
952 /* Update link state etc... */
953 rc = bnxt_probe_phy(softc);
954 if (rc)
955 goto failed;
956
957 /* Needs to be done after probing the phy */
958 bnxt_create_ver_sysctls(softc);
959 bnxt_add_media_types(softc);
960 ifmedia_set(softc->media, IFM_ETHER | IFM_AUTO);
961
962 softc->scctx->isc_max_frame_size = ifp->if_mtu + ETHER_HDR_LEN +
963 ETHER_CRC_LEN;
964
965 failed:
966 return rc;
967 }
968
969 static int
bnxt_detach(if_ctx_t ctx)970 bnxt_detach(if_ctx_t ctx)
971 {
972 struct bnxt_softc *softc = iflib_get_softc(ctx);
973 struct bnxt_vlan_tag *tag;
974 struct bnxt_vlan_tag *tmp;
975 int i;
976
977 bnxt_wol_config(ctx);
978 bnxt_do_disable_intr(&softc->def_cp_ring);
979 bnxt_free_sysctl_ctx(softc);
980 bnxt_hwrm_func_reset(softc);
981 bnxt_clear_ids(softc);
982 iflib_irq_free(ctx, &softc->def_cp_ring.irq);
983 iflib_config_gtask_deinit(&softc->def_cp_task);
984 /* We need to free() these here... */
985 for (i = softc->nrxqsets-1; i>=0; i--) {
986 iflib_irq_free(ctx, &softc->rx_cp_rings[i].irq);
987 }
988 iflib_dma_free(&softc->vnic_info.mc_list);
989 iflib_dma_free(&softc->vnic_info.rss_hash_key_tbl);
990 iflib_dma_free(&softc->vnic_info.rss_grp_tbl);
991 if (softc->vnic_info.vlan_tag_list.idi_vaddr)
992 iflib_dma_free(&softc->vnic_info.vlan_tag_list);
993 SLIST_FOREACH_SAFE(tag, &softc->vnic_info.vlan_tags, next, tmp)
994 free(tag, M_DEVBUF);
995 iflib_dma_free(&softc->def_cp_ring_mem);
996 for (i = 0; i < softc->nrxqsets; i++)
997 free(softc->rx_rings[i].tpa_start, M_DEVBUF);
998 free(softc->ver_info, M_DEVBUF);
999 if (BNXT_PF(softc))
1000 free(softc->nvm_info, M_DEVBUF);
1001
1002 bnxt_hwrm_func_drv_unrgtr(softc, false);
1003 bnxt_free_hwrm_dma_mem(softc);
1004 bnxt_free_hwrm_short_cmd_req(softc);
1005 BNXT_HWRM_LOCK_DESTROY(softc);
1006
1007 pci_disable_busmaster(softc->dev);
1008 bnxt_pci_mapping_free(softc);
1009
1010 return 0;
1011 }
1012
1013 /* Device configuration */
1014 static void
bnxt_init(if_ctx_t ctx)1015 bnxt_init(if_ctx_t ctx)
1016 {
1017 struct bnxt_softc *softc = iflib_get_softc(ctx);
1018 struct ifmediareq ifmr;
1019 int i, j;
1020 int rc;
1021
1022 rc = bnxt_hwrm_func_reset(softc);
1023 if (rc)
1024 return;
1025 bnxt_clear_ids(softc);
1026
1027 /* Allocate the default completion ring */
1028 softc->def_cp_ring.cons = UINT32_MAX;
1029 softc->def_cp_ring.v_bit = 1;
1030 bnxt_mark_cpr_invalid(&softc->def_cp_ring);
1031 rc = bnxt_hwrm_ring_alloc(softc,
1032 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
1033 &softc->def_cp_ring.ring,
1034 (uint16_t)HWRM_NA_SIGNATURE,
1035 HWRM_NA_SIGNATURE, true);
1036 if (rc)
1037 goto fail;
1038
1039 /* And now set the default CP ring as the async CP ring */
1040 rc = bnxt_cfg_async_cr(softc);
1041 if (rc)
1042 goto fail;
1043
1044 for (i = 0; i < softc->nrxqsets; i++) {
1045 /* Allocate the statistics context */
1046 rc = bnxt_hwrm_stat_ctx_alloc(softc, &softc->rx_cp_rings[i],
1047 softc->rx_stats.idi_paddr +
1048 (sizeof(struct ctx_hw_stats) * i));
1049 if (rc)
1050 goto fail;
1051
1052 /* Allocate the completion ring */
1053 softc->rx_cp_rings[i].cons = UINT32_MAX;
1054 softc->rx_cp_rings[i].v_bit = 1;
1055 softc->rx_cp_rings[i].last_idx = UINT32_MAX;
1056 bnxt_mark_cpr_invalid(&softc->rx_cp_rings[i]);
1057 rc = bnxt_hwrm_ring_alloc(softc,
1058 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
1059 &softc->rx_cp_rings[i].ring, (uint16_t)HWRM_NA_SIGNATURE,
1060 HWRM_NA_SIGNATURE, true);
1061 if (rc)
1062 goto fail;
1063
1064 /* Allocate the RX ring */
1065 rc = bnxt_hwrm_ring_alloc(softc,
1066 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
1067 &softc->rx_rings[i], (uint16_t)HWRM_NA_SIGNATURE,
1068 HWRM_NA_SIGNATURE, false);
1069 if (rc)
1070 goto fail;
1071 BNXT_RX_DB(&softc->rx_rings[i], 0);
1072 /* TODO: Cumulus+ doesn't need the double doorbell */
1073 BNXT_RX_DB(&softc->rx_rings[i], 0);
1074
1075 /* Allocate the AG ring */
1076 rc = bnxt_hwrm_ring_alloc(softc,
1077 HWRM_RING_ALLOC_INPUT_RING_TYPE_RX,
1078 &softc->ag_rings[i], (uint16_t)HWRM_NA_SIGNATURE,
1079 HWRM_NA_SIGNATURE, false);
1080 if (rc)
1081 goto fail;
1082 BNXT_RX_DB(&softc->rx_rings[i], 0);
1083 /* TODO: Cumulus+ doesn't need the double doorbell */
1084 BNXT_RX_DB(&softc->ag_rings[i], 0);
1085
1086 /* Allocate the ring group */
1087 softc->grp_info[i].stats_ctx =
1088 softc->rx_cp_rings[i].stats_ctx_id;
1089 softc->grp_info[i].rx_ring_id = softc->rx_rings[i].phys_id;
1090 softc->grp_info[i].ag_ring_id = softc->ag_rings[i].phys_id;
1091 softc->grp_info[i].cp_ring_id =
1092 softc->rx_cp_rings[i].ring.phys_id;
1093 rc = bnxt_hwrm_ring_grp_alloc(softc, &softc->grp_info[i]);
1094 if (rc)
1095 goto fail;
1096 }
1097
1098 /* Allocate the VNIC RSS context */
1099 rc = bnxt_hwrm_vnic_ctx_alloc(softc, &softc->vnic_info.rss_id);
1100 if (rc)
1101 goto fail;
1102
1103 /* Allocate the vnic */
1104 softc->vnic_info.def_ring_grp = softc->grp_info[0].grp_id;
1105 softc->vnic_info.mru = softc->scctx->isc_max_frame_size;
1106 rc = bnxt_hwrm_vnic_alloc(softc, &softc->vnic_info);
1107 if (rc)
1108 goto fail;
1109 rc = bnxt_hwrm_vnic_cfg(softc, &softc->vnic_info);
1110 if (rc)
1111 goto fail;
1112 rc = bnxt_hwrm_set_filter(softc, &softc->vnic_info);
1113 if (rc)
1114 goto fail;
1115
1116 /* Enable RSS on the VNICs */
1117 for (i = 0, j = 0; i < HW_HASH_INDEX_SIZE; i++) {
1118 ((uint16_t *)
1119 softc->vnic_info.rss_grp_tbl.idi_vaddr)[i] =
1120 htole16(softc->grp_info[j].grp_id);
1121 if (++j == softc->nrxqsets)
1122 j = 0;
1123 }
1124
1125 rc = bnxt_hwrm_rss_cfg(softc, &softc->vnic_info,
1126 softc->vnic_info.rss_hash_type);
1127 if (rc)
1128 goto fail;
1129
1130 rc = bnxt_hwrm_vnic_tpa_cfg(softc);
1131 if (rc)
1132 goto fail;
1133
1134 for (i = 0; i < softc->ntxqsets; i++) {
1135 /* Allocate the statistics context */
1136 rc = bnxt_hwrm_stat_ctx_alloc(softc, &softc->tx_cp_rings[i],
1137 softc->tx_stats.idi_paddr +
1138 (sizeof(struct ctx_hw_stats) * i));
1139 if (rc)
1140 goto fail;
1141
1142 /* Allocate the completion ring */
1143 softc->tx_cp_rings[i].cons = UINT32_MAX;
1144 softc->tx_cp_rings[i].v_bit = 1;
1145 bnxt_mark_cpr_invalid(&softc->tx_cp_rings[i]);
1146 rc = bnxt_hwrm_ring_alloc(softc,
1147 HWRM_RING_ALLOC_INPUT_RING_TYPE_L2_CMPL,
1148 &softc->tx_cp_rings[i].ring, (uint16_t)HWRM_NA_SIGNATURE,
1149 HWRM_NA_SIGNATURE, false);
1150 if (rc)
1151 goto fail;
1152
1153 /* Allocate the TX ring */
1154 rc = bnxt_hwrm_ring_alloc(softc,
1155 HWRM_RING_ALLOC_INPUT_RING_TYPE_TX,
1156 &softc->tx_rings[i], softc->tx_cp_rings[i].ring.phys_id,
1157 softc->tx_cp_rings[i].stats_ctx_id, false);
1158 if (rc)
1159 goto fail;
1160 BNXT_TX_DB(&softc->tx_rings[i], 0);
1161 /* TODO: Cumulus+ doesn't need the double doorbell */
1162 BNXT_TX_DB(&softc->tx_rings[i], 0);
1163 }
1164
1165 bnxt_do_enable_intr(&softc->def_cp_ring);
1166 bnxt_media_status(softc->ctx, &ifmr);
1167 bnxt_hwrm_cfa_l2_set_rx_mask(softc, &softc->vnic_info);
1168 return;
1169
1170 fail:
1171 bnxt_hwrm_func_reset(softc);
1172 bnxt_clear_ids(softc);
1173 return;
1174 }
1175
1176 static void
bnxt_stop(if_ctx_t ctx)1177 bnxt_stop(if_ctx_t ctx)
1178 {
1179 struct bnxt_softc *softc = iflib_get_softc(ctx);
1180
1181 bnxt_do_disable_intr(&softc->def_cp_ring);
1182 bnxt_hwrm_func_reset(softc);
1183 bnxt_clear_ids(softc);
1184 return;
1185 }
1186
1187 static u_int
bnxt_copy_maddr(void * arg,struct sockaddr_dl * sdl,u_int cnt)1188 bnxt_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
1189 {
1190 uint8_t *mta = arg;
1191
1192 if (cnt == BNXT_MAX_MC_ADDRS)
1193 return (1);
1194
1195 bcopy(LLADDR(sdl), &mta[cnt * ETHER_ADDR_LEN], ETHER_ADDR_LEN);
1196
1197 return (1);
1198 }
1199
1200 static void
bnxt_multi_set(if_ctx_t ctx)1201 bnxt_multi_set(if_ctx_t ctx)
1202 {
1203 struct bnxt_softc *softc = iflib_get_softc(ctx);
1204 if_t ifp = iflib_get_ifp(ctx);
1205 uint8_t *mta;
1206 int mcnt;
1207
1208 mta = softc->vnic_info.mc_list.idi_vaddr;
1209 bzero(mta, softc->vnic_info.mc_list.idi_size);
1210 mcnt = if_foreach_llmaddr(ifp, bnxt_copy_maddr, mta);
1211
1212 if (mcnt > BNXT_MAX_MC_ADDRS) {
1213 softc->vnic_info.rx_mask |=
1214 HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1215 bnxt_hwrm_cfa_l2_set_rx_mask(softc, &softc->vnic_info);
1216 } else {
1217 softc->vnic_info.rx_mask &=
1218 ~HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1219 bus_dmamap_sync(softc->vnic_info.mc_list.idi_tag,
1220 softc->vnic_info.mc_list.idi_map, BUS_DMASYNC_PREWRITE);
1221 softc->vnic_info.mc_list_count = mcnt;
1222 softc->vnic_info.rx_mask |=
1223 HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_MCAST;
1224 if (bnxt_hwrm_cfa_l2_set_rx_mask(softc, &softc->vnic_info))
1225 device_printf(softc->dev,
1226 "set_multi: rx_mask set failed\n");
1227 }
1228 }
1229
1230 static int
bnxt_mtu_set(if_ctx_t ctx,uint32_t mtu)1231 bnxt_mtu_set(if_ctx_t ctx, uint32_t mtu)
1232 {
1233 struct bnxt_softc *softc = iflib_get_softc(ctx);
1234
1235 if (mtu > BNXT_MAX_MTU)
1236 return EINVAL;
1237
1238 softc->scctx->isc_max_frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
1239 return 0;
1240 }
1241
1242 static void
bnxt_media_status(if_ctx_t ctx,struct ifmediareq * ifmr)1243 bnxt_media_status(if_ctx_t ctx, struct ifmediareq * ifmr)
1244 {
1245 struct bnxt_softc *softc = iflib_get_softc(ctx);
1246 struct bnxt_link_info *link_info = &softc->link_info;
1247 struct ifmedia_entry *next;
1248 uint64_t target_baudrate = bnxt_get_baudrate(link_info);
1249 int active_media = IFM_UNKNOWN;
1250
1251 bnxt_update_link(softc, true);
1252
1253 ifmr->ifm_status = IFM_AVALID;
1254 ifmr->ifm_active = IFM_ETHER;
1255
1256 if (link_info->link_up)
1257 ifmr->ifm_status |= IFM_ACTIVE;
1258 else
1259 ifmr->ifm_status &= ~IFM_ACTIVE;
1260
1261 if (link_info->duplex == HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_FULL)
1262 ifmr->ifm_active |= IFM_FDX;
1263 else
1264 ifmr->ifm_active |= IFM_HDX;
1265
1266 /*
1267 * Go through the list of supported media which got prepared
1268 * as part of bnxt_add_media_types() using api ifmedia_add().
1269 */
1270 LIST_FOREACH(next, &(iflib_get_media(ctx)->ifm_list), ifm_list) {
1271 if (ifmedia_baudrate(next->ifm_media) == target_baudrate) {
1272 active_media = next->ifm_media;
1273 break;
1274 }
1275 }
1276 ifmr->ifm_active |= active_media;
1277
1278 if (link_info->flow_ctrl.rx)
1279 ifmr->ifm_active |= IFM_ETH_RXPAUSE;
1280 if (link_info->flow_ctrl.tx)
1281 ifmr->ifm_active |= IFM_ETH_TXPAUSE;
1282
1283 bnxt_report_link(softc);
1284 return;
1285 }
1286
1287 static int
bnxt_media_change(if_ctx_t ctx)1288 bnxt_media_change(if_ctx_t ctx)
1289 {
1290 struct bnxt_softc *softc = iflib_get_softc(ctx);
1291 struct ifmedia *ifm = iflib_get_media(ctx);
1292 struct ifmediareq ifmr;
1293 int rc;
1294
1295 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
1296 return EINVAL;
1297
1298 switch (IFM_SUBTYPE(ifm->ifm_media)) {
1299 case IFM_100_T:
1300 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1301 softc->link_info.req_link_speed =
1302 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100MB;
1303 break;
1304 case IFM_1000_KX:
1305 case IFM_1000_T:
1306 case IFM_1000_SGMII:
1307 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1308 softc->link_info.req_link_speed =
1309 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_1GB;
1310 break;
1311 case IFM_2500_KX:
1312 case IFM_2500_T:
1313 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1314 softc->link_info.req_link_speed =
1315 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_2_5GB;
1316 break;
1317 case IFM_10G_CR1:
1318 case IFM_10G_KR:
1319 case IFM_10G_LR:
1320 case IFM_10G_SR:
1321 case IFM_10G_T:
1322 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1323 softc->link_info.req_link_speed =
1324 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_10GB;
1325 break;
1326 case IFM_20G_KR2:
1327 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1328 softc->link_info.req_link_speed =
1329 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_20GB;
1330 break;
1331 case IFM_25G_CR:
1332 case IFM_25G_KR:
1333 case IFM_25G_SR:
1334 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1335 softc->link_info.req_link_speed =
1336 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_25GB;
1337 break;
1338 case IFM_40G_CR4:
1339 case IFM_40G_KR4:
1340 case IFM_40G_LR4:
1341 case IFM_40G_SR4:
1342 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1343 softc->link_info.req_link_speed =
1344 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_40GB;
1345 break;
1346 case IFM_50G_CR2:
1347 case IFM_50G_KR2:
1348 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1349 softc->link_info.req_link_speed =
1350 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_50GB;
1351 break;
1352 case IFM_100G_CR4:
1353 case IFM_100G_KR4:
1354 case IFM_100G_LR4:
1355 case IFM_100G_SR4:
1356 softc->link_info.autoneg &= ~BNXT_AUTONEG_SPEED;
1357 softc->link_info.req_link_speed =
1358 HWRM_PORT_PHY_CFG_INPUT_FORCE_LINK_SPEED_100GB;
1359 break;
1360 default:
1361 device_printf(softc->dev,
1362 "Unsupported media type! Using auto\n");
1363 /* Fall-through */
1364 case IFM_AUTO:
1365 // Auto
1366 softc->link_info.autoneg |= BNXT_AUTONEG_SPEED;
1367 break;
1368 }
1369 rc = bnxt_hwrm_set_link_setting(softc, true, true, true);
1370 bnxt_media_status(softc->ctx, &ifmr);
1371 return rc;
1372 }
1373
1374 static int
bnxt_promisc_set(if_ctx_t ctx,int flags)1375 bnxt_promisc_set(if_ctx_t ctx, int flags)
1376 {
1377 struct bnxt_softc *softc = iflib_get_softc(ctx);
1378 if_t ifp = iflib_get_ifp(ctx);
1379 int rc;
1380
1381 if (ifp->if_flags & IFF_ALLMULTI ||
1382 if_llmaddr_count(ifp) > BNXT_MAX_MC_ADDRS)
1383 softc->vnic_info.rx_mask |=
1384 HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1385 else
1386 softc->vnic_info.rx_mask &=
1387 ~HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ALL_MCAST;
1388
1389 if (ifp->if_flags & IFF_PROMISC)
1390 softc->vnic_info.rx_mask |=
1391 HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS |
1392 HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_ANYVLAN_NONVLAN;
1393 else
1394 softc->vnic_info.rx_mask &=
1395 ~(HWRM_CFA_L2_SET_RX_MASK_INPUT_MASK_PROMISCUOUS);
1396
1397 rc = bnxt_hwrm_cfa_l2_set_rx_mask(softc, &softc->vnic_info);
1398
1399 return rc;
1400 }
1401
1402 static uint64_t
bnxt_get_counter(if_ctx_t ctx,ift_counter cnt)1403 bnxt_get_counter(if_ctx_t ctx, ift_counter cnt)
1404 {
1405 if_t ifp = iflib_get_ifp(ctx);
1406
1407 if (cnt < IFCOUNTERS)
1408 return if_get_counter_default(ifp, cnt);
1409
1410 return 0;
1411 }
1412
1413 static void
bnxt_update_admin_status(if_ctx_t ctx)1414 bnxt_update_admin_status(if_ctx_t ctx)
1415 {
1416 struct bnxt_softc *softc = iflib_get_softc(ctx);
1417
1418 /*
1419 * When SR-IOV is enabled, avoid each VF sending this HWRM
1420 * request every sec with which firmware timeouts can happen
1421 */
1422 if (BNXT_PF(softc)) {
1423 bnxt_hwrm_port_qstats(softc);
1424 }
1425
1426 return;
1427 }
1428
1429 static void
bnxt_if_timer(if_ctx_t ctx,uint16_t qid)1430 bnxt_if_timer(if_ctx_t ctx, uint16_t qid)
1431 {
1432
1433 struct bnxt_softc *softc = iflib_get_softc(ctx);
1434 uint64_t ticks_now = ticks;
1435
1436 /* Schedule bnxt_update_admin_status() once per sec */
1437 if (ticks_now - softc->admin_ticks >= hz) {
1438 softc->admin_ticks = ticks_now;
1439 iflib_admin_intr_deferred(ctx);
1440 }
1441
1442 return;
1443 }
1444
1445 static void inline
bnxt_do_enable_intr(struct bnxt_cp_ring * cpr)1446 bnxt_do_enable_intr(struct bnxt_cp_ring *cpr)
1447 {
1448 if (cpr->ring.phys_id != (uint16_t)HWRM_NA_SIGNATURE) {
1449 /* First time enabling, do not set index */
1450 if (cpr->cons == UINT32_MAX)
1451 BNXT_CP_ENABLE_DB(&cpr->ring);
1452 else
1453 BNXT_CP_IDX_ENABLE_DB(&cpr->ring, cpr->cons);
1454 }
1455 }
1456
1457 static void inline
bnxt_do_disable_intr(struct bnxt_cp_ring * cpr)1458 bnxt_do_disable_intr(struct bnxt_cp_ring *cpr)
1459 {
1460 if (cpr->ring.phys_id != (uint16_t)HWRM_NA_SIGNATURE)
1461 BNXT_CP_DISABLE_DB(&cpr->ring);
1462 }
1463
1464 /* Enable all interrupts */
1465 static void
bnxt_intr_enable(if_ctx_t ctx)1466 bnxt_intr_enable(if_ctx_t ctx)
1467 {
1468 struct bnxt_softc *softc = iflib_get_softc(ctx);
1469 int i;
1470
1471 bnxt_do_enable_intr(&softc->def_cp_ring);
1472 for (i = 0; i < softc->nrxqsets; i++)
1473 bnxt_do_enable_intr(&softc->rx_cp_rings[i]);
1474
1475 return;
1476 }
1477
1478 /* Enable interrupt for a single queue */
1479 static int
bnxt_tx_queue_intr_enable(if_ctx_t ctx,uint16_t qid)1480 bnxt_tx_queue_intr_enable(if_ctx_t ctx, uint16_t qid)
1481 {
1482 struct bnxt_softc *softc = iflib_get_softc(ctx);
1483
1484 bnxt_do_enable_intr(&softc->tx_cp_rings[qid]);
1485 return 0;
1486 }
1487
1488 static int
bnxt_rx_queue_intr_enable(if_ctx_t ctx,uint16_t qid)1489 bnxt_rx_queue_intr_enable(if_ctx_t ctx, uint16_t qid)
1490 {
1491 struct bnxt_softc *softc = iflib_get_softc(ctx);
1492
1493 bnxt_do_enable_intr(&softc->rx_cp_rings[qid]);
1494 return 0;
1495 }
1496
1497 /* Disable all interrupts */
1498 static void
bnxt_disable_intr(if_ctx_t ctx)1499 bnxt_disable_intr(if_ctx_t ctx)
1500 {
1501 struct bnxt_softc *softc = iflib_get_softc(ctx);
1502 int i;
1503
1504 /*
1505 * NOTE: These TX interrupts should never get enabled, so don't
1506 * update the index
1507 */
1508 for (i = 0; i < softc->ntxqsets; i++)
1509 bnxt_do_disable_intr(&softc->tx_cp_rings[i]);
1510 for (i = 0; i < softc->nrxqsets; i++)
1511 bnxt_do_disable_intr(&softc->rx_cp_rings[i]);
1512
1513 return;
1514 }
1515
1516 static int
bnxt_msix_intr_assign(if_ctx_t ctx,int msix)1517 bnxt_msix_intr_assign(if_ctx_t ctx, int msix)
1518 {
1519 struct bnxt_softc *softc = iflib_get_softc(ctx);
1520 int rc;
1521 int i;
1522 char irq_name[16];
1523
1524 rc = iflib_irq_alloc_generic(ctx, &softc->def_cp_ring.irq,
1525 softc->def_cp_ring.ring.id + 1, IFLIB_INTR_ADMIN,
1526 bnxt_handle_def_cp, softc, 0, "def_cp");
1527 if (rc) {
1528 device_printf(iflib_get_dev(ctx),
1529 "Failed to register default completion ring handler\n");
1530 return rc;
1531 }
1532
1533 for (i=0; i<softc->scctx->isc_nrxqsets; i++) {
1534 snprintf(irq_name, sizeof(irq_name), "rxq%d", i);
1535 rc = iflib_irq_alloc_generic(ctx, &softc->rx_cp_rings[i].irq,
1536 softc->rx_cp_rings[i].ring.id + 1, IFLIB_INTR_RXTX,
1537 bnxt_handle_rx_cp, &softc->rx_cp_rings[i], i, irq_name);
1538 if (rc) {
1539 device_printf(iflib_get_dev(ctx),
1540 "Failed to register RX completion ring handler\n");
1541 i--;
1542 goto fail;
1543 }
1544 }
1545
1546 for (i=0; i<softc->scctx->isc_ntxqsets; i++)
1547 iflib_softirq_alloc_generic(ctx, NULL, IFLIB_INTR_TX, NULL, i, "tx_cp");
1548
1549 return rc;
1550
1551 fail:
1552 for (; i>=0; i--)
1553 iflib_irq_free(ctx, &softc->rx_cp_rings[i].irq);
1554 iflib_irq_free(ctx, &softc->def_cp_ring.irq);
1555 return rc;
1556 }
1557
1558 /*
1559 * We're explicitly allowing duplicates here. They will need to be
1560 * removed as many times as they are added.
1561 */
1562 static void
bnxt_vlan_register(if_ctx_t ctx,uint16_t vtag)1563 bnxt_vlan_register(if_ctx_t ctx, uint16_t vtag)
1564 {
1565 struct bnxt_softc *softc = iflib_get_softc(ctx);
1566 struct bnxt_vlan_tag *new_tag;
1567
1568 new_tag = malloc(sizeof(struct bnxt_vlan_tag), M_DEVBUF, M_NOWAIT);
1569 if (new_tag == NULL)
1570 return;
1571 new_tag->tag = vtag;
1572 new_tag->tpid = 8100;
1573 SLIST_INSERT_HEAD(&softc->vnic_info.vlan_tags, new_tag, next);
1574 };
1575
1576 static void
bnxt_vlan_unregister(if_ctx_t ctx,uint16_t vtag)1577 bnxt_vlan_unregister(if_ctx_t ctx, uint16_t vtag)
1578 {
1579 struct bnxt_softc *softc = iflib_get_softc(ctx);
1580 struct bnxt_vlan_tag *vlan_tag;
1581
1582 SLIST_FOREACH(vlan_tag, &softc->vnic_info.vlan_tags, next) {
1583 if (vlan_tag->tag == vtag) {
1584 SLIST_REMOVE(&softc->vnic_info.vlan_tags, vlan_tag,
1585 bnxt_vlan_tag, next);
1586 free(vlan_tag, M_DEVBUF);
1587 break;
1588 }
1589 }
1590 }
1591
1592 static int
bnxt_wol_config(if_ctx_t ctx)1593 bnxt_wol_config(if_ctx_t ctx)
1594 {
1595 struct bnxt_softc *softc = iflib_get_softc(ctx);
1596 if_t ifp = iflib_get_ifp(ctx);
1597
1598 if (!softc)
1599 return -EBUSY;
1600
1601 if (!bnxt_wol_supported(softc))
1602 return -ENOTSUP;
1603
1604 if (if_getcapenable(ifp) & IFCAP_WOL_MAGIC) {
1605 if (!softc->wol) {
1606 if (bnxt_hwrm_alloc_wol_fltr(softc))
1607 return -EBUSY;
1608 softc->wol = 1;
1609 }
1610 } else {
1611 if (softc->wol) {
1612 if (bnxt_hwrm_free_wol_fltr(softc))
1613 return -EBUSY;
1614 softc->wol = 0;
1615 }
1616 }
1617
1618 return 0;
1619 }
1620
1621 static int
bnxt_shutdown(if_ctx_t ctx)1622 bnxt_shutdown(if_ctx_t ctx)
1623 {
1624 bnxt_wol_config(ctx);
1625 return 0;
1626 }
1627
1628 static int
bnxt_suspend(if_ctx_t ctx)1629 bnxt_suspend(if_ctx_t ctx)
1630 {
1631 bnxt_wol_config(ctx);
1632 return 0;
1633 }
1634
1635 static int
bnxt_resume(if_ctx_t ctx)1636 bnxt_resume(if_ctx_t ctx)
1637 {
1638 struct bnxt_softc *softc = iflib_get_softc(ctx);
1639
1640 bnxt_get_wol_settings(softc);
1641 return 0;
1642 }
1643
1644 static int
bnxt_priv_ioctl(if_ctx_t ctx,u_long command,caddr_t data)1645 bnxt_priv_ioctl(if_ctx_t ctx, u_long command, caddr_t data)
1646 {
1647 struct bnxt_softc *softc = iflib_get_softc(ctx);
1648 struct ifreq *ifr = (struct ifreq *)data;
1649 struct bnxt_ioctl_header *ioh;
1650 size_t iol;
1651 int rc = ENOTSUP;
1652 struct bnxt_ioctl_data iod_storage, *iod = &iod_storage;
1653
1654 switch (command) {
1655 case SIOCGPRIVATE_0:
1656 if ((rc = priv_check(curthread, PRIV_DRIVER)) != 0)
1657 goto exit;
1658
1659 ioh = ifr_buffer_get_buffer(ifr);
1660 iol = ifr_buffer_get_length(ifr);
1661 if (iol > sizeof(iod_storage))
1662 return (EINVAL);
1663
1664 if ((rc = copyin(ioh, iod, iol)) != 0)
1665 goto exit;
1666
1667 switch (iod->hdr.type) {
1668 case BNXT_HWRM_NVM_FIND_DIR_ENTRY:
1669 {
1670 struct bnxt_ioctl_hwrm_nvm_find_dir_entry *find =
1671 &iod->find;
1672
1673 rc = bnxt_hwrm_nvm_find_dir_entry(softc, find->type,
1674 &find->ordinal, find->ext, &find->index,
1675 find->use_index, find->search_opt,
1676 &find->data_length, &find->item_length,
1677 &find->fw_ver);
1678 if (rc) {
1679 iod->hdr.rc = rc;
1680 copyout(&iod->hdr.rc, &ioh->rc,
1681 sizeof(ioh->rc));
1682 }
1683 else {
1684 iod->hdr.rc = 0;
1685 copyout(iod, ioh, iol);
1686 }
1687
1688 rc = 0;
1689 goto exit;
1690 }
1691 case BNXT_HWRM_NVM_READ:
1692 {
1693 struct bnxt_ioctl_hwrm_nvm_read *rd = &iod->read;
1694 struct iflib_dma_info dma_data;
1695 size_t offset;
1696 size_t remain;
1697 size_t csize;
1698
1699 /*
1700 * Some HWRM versions can't read more than 0x8000 bytes
1701 */
1702 rc = iflib_dma_alloc(softc->ctx,
1703 min(rd->length, 0x8000), &dma_data, BUS_DMA_NOWAIT);
1704 if (rc)
1705 break;
1706 for (remain = rd->length, offset = 0;
1707 remain && offset < rd->length; offset += 0x8000) {
1708 csize = min(remain, 0x8000);
1709 rc = bnxt_hwrm_nvm_read(softc, rd->index,
1710 rd->offset + offset, csize, &dma_data);
1711 if (rc) {
1712 iod->hdr.rc = rc;
1713 copyout(&iod->hdr.rc, &ioh->rc,
1714 sizeof(ioh->rc));
1715 break;
1716 }
1717 else {
1718 copyout(dma_data.idi_vaddr,
1719 rd->data + offset, csize);
1720 iod->hdr.rc = 0;
1721 }
1722 remain -= csize;
1723 }
1724 if (iod->hdr.rc == 0)
1725 copyout(iod, ioh, iol);
1726
1727 iflib_dma_free(&dma_data);
1728 rc = 0;
1729 goto exit;
1730 }
1731 case BNXT_HWRM_FW_RESET:
1732 {
1733 struct bnxt_ioctl_hwrm_fw_reset *rst =
1734 &iod->reset;
1735
1736 rc = bnxt_hwrm_fw_reset(softc, rst->processor,
1737 &rst->selfreset);
1738 if (rc) {
1739 iod->hdr.rc = rc;
1740 copyout(&iod->hdr.rc, &ioh->rc,
1741 sizeof(ioh->rc));
1742 }
1743 else {
1744 iod->hdr.rc = 0;
1745 copyout(iod, ioh, iol);
1746 }
1747
1748 rc = 0;
1749 goto exit;
1750 }
1751 case BNXT_HWRM_FW_QSTATUS:
1752 {
1753 struct bnxt_ioctl_hwrm_fw_qstatus *qstat =
1754 &iod->status;
1755
1756 rc = bnxt_hwrm_fw_qstatus(softc, qstat->processor,
1757 &qstat->selfreset);
1758 if (rc) {
1759 iod->hdr.rc = rc;
1760 copyout(&iod->hdr.rc, &ioh->rc,
1761 sizeof(ioh->rc));
1762 }
1763 else {
1764 iod->hdr.rc = 0;
1765 copyout(iod, ioh, iol);
1766 }
1767
1768 rc = 0;
1769 goto exit;
1770 }
1771 case BNXT_HWRM_NVM_WRITE:
1772 {
1773 struct bnxt_ioctl_hwrm_nvm_write *wr =
1774 &iod->write;
1775
1776 rc = bnxt_hwrm_nvm_write(softc, wr->data, true,
1777 wr->type, wr->ordinal, wr->ext, wr->attr,
1778 wr->option, wr->data_length, wr->keep,
1779 &wr->item_length, &wr->index);
1780 if (rc) {
1781 iod->hdr.rc = rc;
1782 copyout(&iod->hdr.rc, &ioh->rc,
1783 sizeof(ioh->rc));
1784 }
1785 else {
1786 iod->hdr.rc = 0;
1787 copyout(iod, ioh, iol);
1788 }
1789
1790 rc = 0;
1791 goto exit;
1792 }
1793 case BNXT_HWRM_NVM_ERASE_DIR_ENTRY:
1794 {
1795 struct bnxt_ioctl_hwrm_nvm_erase_dir_entry *erase =
1796 &iod->erase;
1797
1798 rc = bnxt_hwrm_nvm_erase_dir_entry(softc, erase->index);
1799 if (rc) {
1800 iod->hdr.rc = rc;
1801 copyout(&iod->hdr.rc, &ioh->rc,
1802 sizeof(ioh->rc));
1803 }
1804 else {
1805 iod->hdr.rc = 0;
1806 copyout(iod, ioh, iol);
1807 }
1808
1809 rc = 0;
1810 goto exit;
1811 }
1812 case BNXT_HWRM_NVM_GET_DIR_INFO:
1813 {
1814 struct bnxt_ioctl_hwrm_nvm_get_dir_info *info =
1815 &iod->dir_info;
1816
1817 rc = bnxt_hwrm_nvm_get_dir_info(softc, &info->entries,
1818 &info->entry_length);
1819 if (rc) {
1820 iod->hdr.rc = rc;
1821 copyout(&iod->hdr.rc, &ioh->rc,
1822 sizeof(ioh->rc));
1823 }
1824 else {
1825 iod->hdr.rc = 0;
1826 copyout(iod, ioh, iol);
1827 }
1828
1829 rc = 0;
1830 goto exit;
1831 }
1832 case BNXT_HWRM_NVM_GET_DIR_ENTRIES:
1833 {
1834 struct bnxt_ioctl_hwrm_nvm_get_dir_entries *get =
1835 &iod->dir_entries;
1836 struct iflib_dma_info dma_data;
1837
1838 rc = iflib_dma_alloc(softc->ctx, get->max_size,
1839 &dma_data, BUS_DMA_NOWAIT);
1840 if (rc)
1841 break;
1842 rc = bnxt_hwrm_nvm_get_dir_entries(softc, &get->entries,
1843 &get->entry_length, &dma_data);
1844 if (rc) {
1845 iod->hdr.rc = rc;
1846 copyout(&iod->hdr.rc, &ioh->rc,
1847 sizeof(ioh->rc));
1848 }
1849 else {
1850 copyout(dma_data.idi_vaddr, get->data,
1851 get->entry_length * get->entries);
1852 iod->hdr.rc = 0;
1853 copyout(iod, ioh, iol);
1854 }
1855 iflib_dma_free(&dma_data);
1856
1857 rc = 0;
1858 goto exit;
1859 }
1860 case BNXT_HWRM_NVM_VERIFY_UPDATE:
1861 {
1862 struct bnxt_ioctl_hwrm_nvm_verify_update *vrfy =
1863 &iod->verify;
1864
1865 rc = bnxt_hwrm_nvm_verify_update(softc, vrfy->type,
1866 vrfy->ordinal, vrfy->ext);
1867 if (rc) {
1868 iod->hdr.rc = rc;
1869 copyout(&iod->hdr.rc, &ioh->rc,
1870 sizeof(ioh->rc));
1871 }
1872 else {
1873 iod->hdr.rc = 0;
1874 copyout(iod, ioh, iol);
1875 }
1876
1877 rc = 0;
1878 goto exit;
1879 }
1880 case BNXT_HWRM_NVM_INSTALL_UPDATE:
1881 {
1882 struct bnxt_ioctl_hwrm_nvm_install_update *inst =
1883 &iod->install;
1884
1885 rc = bnxt_hwrm_nvm_install_update(softc,
1886 inst->install_type, &inst->installed_items,
1887 &inst->result, &inst->problem_item,
1888 &inst->reset_required);
1889 if (rc) {
1890 iod->hdr.rc = rc;
1891 copyout(&iod->hdr.rc, &ioh->rc,
1892 sizeof(ioh->rc));
1893 }
1894 else {
1895 iod->hdr.rc = 0;
1896 copyout(iod, ioh, iol);
1897 }
1898
1899 rc = 0;
1900 goto exit;
1901 }
1902 case BNXT_HWRM_NVM_MODIFY:
1903 {
1904 struct bnxt_ioctl_hwrm_nvm_modify *mod = &iod->modify;
1905
1906 rc = bnxt_hwrm_nvm_modify(softc, mod->index,
1907 mod->offset, mod->data, true, mod->length);
1908 if (rc) {
1909 iod->hdr.rc = rc;
1910 copyout(&iod->hdr.rc, &ioh->rc,
1911 sizeof(ioh->rc));
1912 }
1913 else {
1914 iod->hdr.rc = 0;
1915 copyout(iod, ioh, iol);
1916 }
1917
1918 rc = 0;
1919 goto exit;
1920 }
1921 case BNXT_HWRM_FW_GET_TIME:
1922 {
1923 struct bnxt_ioctl_hwrm_fw_get_time *gtm =
1924 &iod->get_time;
1925
1926 rc = bnxt_hwrm_fw_get_time(softc, >m->year,
1927 >m->month, >m->day, >m->hour, >m->minute,
1928 >m->second, >m->millisecond, >m->zone);
1929 if (rc) {
1930 iod->hdr.rc = rc;
1931 copyout(&iod->hdr.rc, &ioh->rc,
1932 sizeof(ioh->rc));
1933 }
1934 else {
1935 iod->hdr.rc = 0;
1936 copyout(iod, ioh, iol);
1937 }
1938
1939 rc = 0;
1940 goto exit;
1941 }
1942 case BNXT_HWRM_FW_SET_TIME:
1943 {
1944 struct bnxt_ioctl_hwrm_fw_set_time *stm =
1945 &iod->set_time;
1946
1947 rc = bnxt_hwrm_fw_set_time(softc, stm->year,
1948 stm->month, stm->day, stm->hour, stm->minute,
1949 stm->second, stm->millisecond, stm->zone);
1950 if (rc) {
1951 iod->hdr.rc = rc;
1952 copyout(&iod->hdr.rc, &ioh->rc,
1953 sizeof(ioh->rc));
1954 }
1955 else {
1956 iod->hdr.rc = 0;
1957 copyout(iod, ioh, iol);
1958 }
1959
1960 rc = 0;
1961 goto exit;
1962 }
1963 }
1964 break;
1965 }
1966
1967 exit:
1968 return rc;
1969 }
1970
1971 /*
1972 * Support functions
1973 */
1974 static int
bnxt_probe_phy(struct bnxt_softc * softc)1975 bnxt_probe_phy(struct bnxt_softc *softc)
1976 {
1977 struct bnxt_link_info *link_info = &softc->link_info;
1978 int rc = 0;
1979
1980 rc = bnxt_update_link(softc, false);
1981 if (rc) {
1982 device_printf(softc->dev,
1983 "Probe phy can't update link (rc: %x)\n", rc);
1984 return (rc);
1985 }
1986
1987 /*initialize the ethool setting copy with NVM settings */
1988 if (link_info->auto_mode != HWRM_PORT_PHY_QCFG_OUTPUT_AUTO_MODE_NONE)
1989 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1990
1991 link_info->req_duplex = link_info->duplex_setting;
1992 if (link_info->autoneg & BNXT_AUTONEG_SPEED)
1993 link_info->req_link_speed = link_info->auto_link_speed;
1994 else
1995 link_info->req_link_speed = link_info->force_link_speed;
1996 return (rc);
1997 }
1998
1999 static void
bnxt_add_media_types(struct bnxt_softc * softc)2000 bnxt_add_media_types(struct bnxt_softc *softc)
2001 {
2002 struct bnxt_link_info *link_info = &softc->link_info;
2003 uint16_t supported;
2004 uint8_t phy_type = get_phy_type(softc);
2005
2006 supported = link_info->support_speeds;
2007
2008 /* Auto is always supported */
2009 ifmedia_add(softc->media, IFM_ETHER | IFM_AUTO, 0, NULL);
2010
2011 if (softc->flags & BNXT_FLAG_NPAR)
2012 return;
2013
2014 switch (phy_type) {
2015 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASECR4:
2016 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASECR4:
2017 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_L:
2018 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_S:
2019 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASECR_CA_N:
2020 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR:
2021 BNXT_IFMEDIA_ADD(supported, SPEEDS_100GB, IFM_100G_CR4);
2022 BNXT_IFMEDIA_ADD(supported, SPEEDS_50GB, IFM_50G_CR2);
2023 BNXT_IFMEDIA_ADD(supported, SPEEDS_40GB, IFM_40G_CR4);
2024 BNXT_IFMEDIA_ADD(supported, SPEEDS_25GB, IFM_25G_CR);
2025 BNXT_IFMEDIA_ADD(supported, SPEEDS_10GB, IFM_10G_CR1);
2026 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GB, IFM_1000_T);
2027 break;
2028
2029 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASELR4:
2030 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASELR4:
2031 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASELR:
2032 BNXT_IFMEDIA_ADD(supported, SPEEDS_100GB, IFM_100G_LR4);
2033 BNXT_IFMEDIA_ADD(supported, SPEEDS_40GB, IFM_40G_LR4);
2034 BNXT_IFMEDIA_ADD(supported, SPEEDS_25GB, IFM_25G_LR);
2035 BNXT_IFMEDIA_ADD(supported, SPEEDS_10GB, IFM_10G_LR);
2036 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GB, IFM_1000_LX);
2037 break;
2038
2039 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR10:
2040 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASESR4:
2041 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASESR4:
2042 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR:
2043 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_BASEER4:
2044 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_100G_BASEER4:
2045 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_25G_BASESR:
2046 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASESX:
2047 BNXT_IFMEDIA_ADD(supported, SPEEDS_100GB, IFM_100G_SR4);
2048 BNXT_IFMEDIA_ADD(supported, SPEEDS_40GB, IFM_40G_SR4);
2049 BNXT_IFMEDIA_ADD(supported, SPEEDS_25GB, IFM_25G_SR);
2050 BNXT_IFMEDIA_ADD(supported, SPEEDS_10GB, IFM_10G_SR);
2051 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GB, IFM_1000_SX);
2052 break;
2053
2054 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR4:
2055 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR2:
2056 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR:
2057 BNXT_IFMEDIA_ADD(supported, SPEEDS_100GB, IFM_100G_KR4);
2058 BNXT_IFMEDIA_ADD(supported, SPEEDS_50GB, IFM_50G_KR2);
2059 BNXT_IFMEDIA_ADD(supported, SPEEDS_40GB, IFM_40G_KR4);
2060 BNXT_IFMEDIA_ADD(supported, SPEEDS_25GB, IFM_25G_KR);
2061 BNXT_IFMEDIA_ADD(supported, SPEEDS_20GB, IFM_20G_KR2);
2062 BNXT_IFMEDIA_ADD(supported, SPEEDS_10GB, IFM_10G_KR);
2063 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GB, IFM_1000_KX);
2064 break;
2065
2066 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_40G_ACTIVE_CABLE:
2067 BNXT_IFMEDIA_ADD(supported, SPEEDS_25GB, IFM_25G_ACC);
2068 BNXT_IFMEDIA_ADD(supported, SPEEDS_10GB, IFM_10G_AOC);
2069 break;
2070
2071 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASECX:
2072 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GBHD, IFM_1000_CX);
2073 break;
2074
2075 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_1G_BASET:
2076 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET:
2077 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE:
2078 BNXT_IFMEDIA_ADD(supported, SPEEDS_10GB, IFM_10G_T);
2079 BNXT_IFMEDIA_ADD(supported, SPEEDS_2_5GB, IFM_2500_T);
2080 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GB, IFM_1000_T);
2081 BNXT_IFMEDIA_ADD(supported, SPEEDS_100MB, IFM_100_T);
2082 BNXT_IFMEDIA_ADD(supported, SPEEDS_10MB, IFM_10_T);
2083 break;
2084
2085 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX:
2086 BNXT_IFMEDIA_ADD(supported, SPEEDS_10GB, IFM_10G_KR);
2087 BNXT_IFMEDIA_ADD(supported, SPEEDS_2_5GB, IFM_2500_KX);
2088 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GB, IFM_1000_KX);
2089 break;
2090
2091 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_SGMIIEXTPHY:
2092 BNXT_IFMEDIA_ADD(supported, SPEEDS_1GB, IFM_1000_SGMII);
2093 break;
2094
2095 case HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN:
2096 /* Only Autoneg is supported for TYPE_UNKNOWN */
2097 device_printf(softc->dev, "Unknown phy type\n");
2098 break;
2099
2100 default:
2101 /* Only Autoneg is supported for new phy type values */
2102 device_printf(softc->dev, "phy type %d not supported by driver\n", phy_type);
2103 break;
2104 }
2105
2106 return;
2107 }
2108
2109 static int
bnxt_map_bar(struct bnxt_softc * softc,struct bnxt_bar_info * bar,int bar_num,bool shareable)2110 bnxt_map_bar(struct bnxt_softc *softc, struct bnxt_bar_info *bar, int bar_num, bool shareable)
2111 {
2112 uint32_t flag;
2113
2114 if (bar->res != NULL) {
2115 device_printf(softc->dev, "Bar %d already mapped\n", bar_num);
2116 return EDOOFUS;
2117 }
2118
2119 bar->rid = PCIR_BAR(bar_num);
2120 flag = RF_ACTIVE;
2121 if (shareable)
2122 flag |= RF_SHAREABLE;
2123
2124 if ((bar->res =
2125 bus_alloc_resource_any(softc->dev,
2126 SYS_RES_MEMORY,
2127 &bar->rid,
2128 flag)) == NULL) {
2129 device_printf(softc->dev,
2130 "PCI BAR%d mapping failure\n", bar_num);
2131 return (ENXIO);
2132 }
2133 bar->tag = rman_get_bustag(bar->res);
2134 bar->handle = rman_get_bushandle(bar->res);
2135 bar->size = rman_get_size(bar->res);
2136
2137 return 0;
2138 }
2139
2140 static int
bnxt_pci_mapping(struct bnxt_softc * softc)2141 bnxt_pci_mapping(struct bnxt_softc *softc)
2142 {
2143 int rc;
2144
2145 rc = bnxt_map_bar(softc, &softc->hwrm_bar, 0, true);
2146 if (rc)
2147 return rc;
2148
2149 rc = bnxt_map_bar(softc, &softc->doorbell_bar, 2, false);
2150
2151 return rc;
2152 }
2153
2154 static void
bnxt_pci_mapping_free(struct bnxt_softc * softc)2155 bnxt_pci_mapping_free(struct bnxt_softc *softc)
2156 {
2157 if (softc->hwrm_bar.res != NULL)
2158 bus_release_resource(softc->dev, SYS_RES_MEMORY,
2159 softc->hwrm_bar.rid, softc->hwrm_bar.res);
2160 softc->hwrm_bar.res = NULL;
2161
2162 if (softc->doorbell_bar.res != NULL)
2163 bus_release_resource(softc->dev, SYS_RES_MEMORY,
2164 softc->doorbell_bar.rid, softc->doorbell_bar.res);
2165 softc->doorbell_bar.res = NULL;
2166 }
2167
2168 static int
bnxt_update_link(struct bnxt_softc * softc,bool chng_link_state)2169 bnxt_update_link(struct bnxt_softc *softc, bool chng_link_state)
2170 {
2171 struct bnxt_link_info *link_info = &softc->link_info;
2172 uint8_t link_up = link_info->link_up;
2173 int rc = 0;
2174
2175 rc = bnxt_hwrm_port_phy_qcfg(softc);
2176 if (rc)
2177 goto exit;
2178
2179 /* TODO: need to add more logic to report VF link */
2180 if (chng_link_state) {
2181 if (link_info->phy_link_status ==
2182 HWRM_PORT_PHY_QCFG_OUTPUT_LINK_LINK)
2183 link_info->link_up = 1;
2184 else
2185 link_info->link_up = 0;
2186 if (link_up != link_info->link_up)
2187 bnxt_report_link(softc);
2188 } else {
2189 /* always link down if not require to update link state */
2190 link_info->link_up = 0;
2191 }
2192
2193 exit:
2194 return rc;
2195 }
2196
2197 void
bnxt_report_link(struct bnxt_softc * softc)2198 bnxt_report_link(struct bnxt_softc *softc)
2199 {
2200 struct bnxt_link_info *link_info = &softc->link_info;
2201 const char *duplex = NULL, *flow_ctrl = NULL;
2202
2203 if (link_info->link_up == link_info->last_link_up) {
2204 if (!link_info->link_up)
2205 return;
2206 if ((link_info->duplex == link_info->last_duplex) &&
2207 (!(BNXT_IS_FLOW_CTRL_CHANGED(link_info))))
2208 return;
2209 }
2210
2211 if (link_info->link_up) {
2212 if (link_info->duplex ==
2213 HWRM_PORT_PHY_QCFG_OUTPUT_DUPLEX_CFG_FULL)
2214 duplex = "full duplex";
2215 else
2216 duplex = "half duplex";
2217 if (link_info->flow_ctrl.tx & link_info->flow_ctrl.rx)
2218 flow_ctrl = "FC - receive & transmit";
2219 else if (link_info->flow_ctrl.tx)
2220 flow_ctrl = "FC - transmit";
2221 else if (link_info->flow_ctrl.rx)
2222 flow_ctrl = "FC - receive";
2223 else
2224 flow_ctrl = "FC - none";
2225 iflib_link_state_change(softc->ctx, LINK_STATE_UP,
2226 IF_Gbps(100));
2227 device_printf(softc->dev, "Link is UP %s, %s - %d Mbps \n", duplex,
2228 flow_ctrl, (link_info->link_speed * 100));
2229 } else {
2230 iflib_link_state_change(softc->ctx, LINK_STATE_DOWN,
2231 bnxt_get_baudrate(&softc->link_info));
2232 device_printf(softc->dev, "Link is Down\n");
2233 }
2234
2235 link_info->last_link_up = link_info->link_up;
2236 link_info->last_duplex = link_info->duplex;
2237 link_info->last_flow_ctrl.tx = link_info->flow_ctrl.tx;
2238 link_info->last_flow_ctrl.rx = link_info->flow_ctrl.rx;
2239 link_info->last_flow_ctrl.autoneg = link_info->flow_ctrl.autoneg;
2240 /* update media types */
2241 ifmedia_removeall(softc->media);
2242 bnxt_add_media_types(softc);
2243 ifmedia_set(softc->media, IFM_ETHER | IFM_AUTO);
2244 }
2245
2246 static int
bnxt_handle_rx_cp(void * arg)2247 bnxt_handle_rx_cp(void *arg)
2248 {
2249 struct bnxt_cp_ring *cpr = arg;
2250
2251 /* Disable further interrupts for this queue */
2252 BNXT_CP_DISABLE_DB(&cpr->ring);
2253 return FILTER_SCHEDULE_THREAD;
2254 }
2255
2256 static int
bnxt_handle_def_cp(void * arg)2257 bnxt_handle_def_cp(void *arg)
2258 {
2259 struct bnxt_softc *softc = arg;
2260
2261 BNXT_CP_DISABLE_DB(&softc->def_cp_ring.ring);
2262 GROUPTASK_ENQUEUE(&softc->def_cp_task);
2263 return FILTER_HANDLED;
2264 }
2265
2266 static void
bnxt_clear_ids(struct bnxt_softc * softc)2267 bnxt_clear_ids(struct bnxt_softc *softc)
2268 {
2269 int i;
2270
2271 softc->def_cp_ring.stats_ctx_id = HWRM_NA_SIGNATURE;
2272 softc->def_cp_ring.ring.phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2273 for (i = 0; i < softc->ntxqsets; i++) {
2274 softc->tx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
2275 softc->tx_cp_rings[i].ring.phys_id =
2276 (uint16_t)HWRM_NA_SIGNATURE;
2277 softc->tx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2278 }
2279 for (i = 0; i < softc->nrxqsets; i++) {
2280 softc->rx_cp_rings[i].stats_ctx_id = HWRM_NA_SIGNATURE;
2281 softc->rx_cp_rings[i].ring.phys_id =
2282 (uint16_t)HWRM_NA_SIGNATURE;
2283 softc->rx_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2284 softc->ag_rings[i].phys_id = (uint16_t)HWRM_NA_SIGNATURE;
2285 softc->grp_info[i].grp_id = (uint16_t)HWRM_NA_SIGNATURE;
2286 }
2287 softc->vnic_info.filter_id = -1;
2288 softc->vnic_info.id = (uint16_t)HWRM_NA_SIGNATURE;
2289 softc->vnic_info.rss_id = (uint16_t)HWRM_NA_SIGNATURE;
2290 memset(softc->vnic_info.rss_grp_tbl.idi_vaddr, 0xff,
2291 softc->vnic_info.rss_grp_tbl.idi_size);
2292 }
2293
2294 static void
bnxt_mark_cpr_invalid(struct bnxt_cp_ring * cpr)2295 bnxt_mark_cpr_invalid(struct bnxt_cp_ring *cpr)
2296 {
2297 struct cmpl_base *cmp = (void *)cpr->ring.vaddr;
2298 int i;
2299
2300 for (i = 0; i < cpr->ring.ring_size; i++)
2301 cmp[i].info3_v = !cpr->v_bit;
2302 }
2303
2304 static void
bnxt_handle_async_event(struct bnxt_softc * softc,struct cmpl_base * cmpl)2305 bnxt_handle_async_event(struct bnxt_softc *softc, struct cmpl_base *cmpl)
2306 {
2307 struct hwrm_async_event_cmpl *ae = (void *)cmpl;
2308 uint16_t async_id = le16toh(ae->event_id);
2309 struct ifmediareq ifmr;
2310
2311 switch (async_id) {
2312 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE:
2313 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE:
2314 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE:
2315 bnxt_media_status(softc->ctx, &ifmr);
2316 break;
2317 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_MTU_CHANGE:
2318 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_DCB_CONFIG_CHANGE:
2319 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PORT_CONN_NOT_ALLOWED:
2320 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_NOT_ALLOWED:
2321 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_UNLOAD:
2322 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_FUNC_DRVR_LOAD:
2323 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_UNLOAD:
2324 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_DRVR_LOAD:
2325 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_FLR:
2326 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_MAC_ADDR_CHANGE:
2327 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_PF_VF_COMM_STATUS_CHANGE:
2328 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_VF_CFG_CHANGE:
2329 case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_HWRM_ERROR:
2330 device_printf(softc->dev,
2331 "Unhandled async completion type %u\n", async_id);
2332 break;
2333 default:
2334 device_printf(softc->dev,
2335 "Unknown async completion type %u\n", async_id);
2336 break;
2337 }
2338 }
2339
2340 static void
bnxt_def_cp_task(void * context)2341 bnxt_def_cp_task(void *context)
2342 {
2343 if_ctx_t ctx = context;
2344 struct bnxt_softc *softc = iflib_get_softc(ctx);
2345 struct bnxt_cp_ring *cpr = &softc->def_cp_ring;
2346
2347 /* Handle completions on the default completion ring */
2348 struct cmpl_base *cmpl;
2349 uint32_t cons = cpr->cons;
2350 bool v_bit = cpr->v_bit;
2351 bool last_v_bit;
2352 uint32_t last_cons;
2353 uint16_t type;
2354
2355 for (;;) {
2356 last_cons = cons;
2357 last_v_bit = v_bit;
2358 NEXT_CP_CONS_V(&cpr->ring, cons, v_bit);
2359 cmpl = &((struct cmpl_base *)cpr->ring.vaddr)[cons];
2360
2361 if (!CMP_VALID(cmpl, v_bit))
2362 break;
2363
2364 type = le16toh(cmpl->type) & CMPL_BASE_TYPE_MASK;
2365 switch (type) {
2366 case CMPL_BASE_TYPE_HWRM_ASYNC_EVENT:
2367 bnxt_handle_async_event(softc, cmpl);
2368 break;
2369 case CMPL_BASE_TYPE_TX_L2:
2370 case CMPL_BASE_TYPE_RX_L2:
2371 case CMPL_BASE_TYPE_RX_AGG:
2372 case CMPL_BASE_TYPE_RX_TPA_START:
2373 case CMPL_BASE_TYPE_RX_TPA_END:
2374 case CMPL_BASE_TYPE_STAT_EJECT:
2375 case CMPL_BASE_TYPE_HWRM_DONE:
2376 case CMPL_BASE_TYPE_HWRM_FWD_REQ:
2377 case CMPL_BASE_TYPE_HWRM_FWD_RESP:
2378 case CMPL_BASE_TYPE_CQ_NOTIFICATION:
2379 case CMPL_BASE_TYPE_SRQ_EVENT:
2380 case CMPL_BASE_TYPE_DBQ_EVENT:
2381 case CMPL_BASE_TYPE_QP_EVENT:
2382 case CMPL_BASE_TYPE_FUNC_EVENT:
2383 device_printf(softc->dev,
2384 "Unhandled completion type %u\n", type);
2385 break;
2386 default:
2387 device_printf(softc->dev,
2388 "Unknown completion type %u\n", type);
2389 break;
2390 }
2391 }
2392
2393 cpr->cons = last_cons;
2394 cpr->v_bit = last_v_bit;
2395 BNXT_CP_IDX_ENABLE_DB(&cpr->ring, cpr->cons);
2396 }
2397
2398 static uint8_t
get_phy_type(struct bnxt_softc * softc)2399 get_phy_type(struct bnxt_softc *softc)
2400 {
2401 struct bnxt_link_info *link_info = &softc->link_info;
2402 uint8_t phy_type = link_info->phy_type;
2403 uint16_t supported;
2404
2405 if (phy_type != HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_UNKNOWN)
2406 return phy_type;
2407
2408 /* Deduce the phy type from the media type and supported speeds */
2409 supported = link_info->support_speeds;
2410
2411 if (link_info->media_type ==
2412 HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP)
2413 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET;
2414 if (link_info->media_type ==
2415 HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_DAC) {
2416 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_2_5GB)
2417 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKX;
2418 if (supported & HWRM_PORT_PHY_QCFG_OUTPUT_SUPPORT_SPEEDS_20GB)
2419 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASEKR;
2420 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASECR;
2421 }
2422 if (link_info->media_type ==
2423 HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_FIBRE)
2424 return HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASESR;
2425
2426 return phy_type;
2427 }
2428
2429 bool
bnxt_check_hwrm_version(struct bnxt_softc * softc)2430 bnxt_check_hwrm_version(struct bnxt_softc *softc)
2431 {
2432 char buf[16];
2433
2434 sprintf(buf, "%hhu.%hhu.%hhu", softc->ver_info->hwrm_min_major,
2435 softc->ver_info->hwrm_min_minor, softc->ver_info->hwrm_min_update);
2436 if (softc->ver_info->hwrm_min_major > softc->ver_info->hwrm_if_major) {
2437 device_printf(softc->dev,
2438 "WARNING: HWRM version %s is too old (older than %s)\n",
2439 softc->ver_info->hwrm_if_ver, buf);
2440 return false;
2441 }
2442 else if(softc->ver_info->hwrm_min_major ==
2443 softc->ver_info->hwrm_if_major) {
2444 if (softc->ver_info->hwrm_min_minor >
2445 softc->ver_info->hwrm_if_minor) {
2446 device_printf(softc->dev,
2447 "WARNING: HWRM version %s is too old (older than %s)\n",
2448 softc->ver_info->hwrm_if_ver, buf);
2449 return false;
2450 }
2451 else if (softc->ver_info->hwrm_min_minor ==
2452 softc->ver_info->hwrm_if_minor) {
2453 if (softc->ver_info->hwrm_min_update >
2454 softc->ver_info->hwrm_if_update) {
2455 device_printf(softc->dev,
2456 "WARNING: HWRM version %s is too old (older than %s)\n",
2457 softc->ver_info->hwrm_if_ver, buf);
2458 return false;
2459 }
2460 }
2461 }
2462 return true;
2463 }
2464
2465 static uint64_t
bnxt_get_baudrate(struct bnxt_link_info * link)2466 bnxt_get_baudrate(struct bnxt_link_info *link)
2467 {
2468 switch (link->link_speed) {
2469 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100MB:
2470 return IF_Mbps(100);
2471 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_1GB:
2472 return IF_Gbps(1);
2473 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2GB:
2474 return IF_Gbps(2);
2475 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_2_5GB:
2476 return IF_Mbps(2500);
2477 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10GB:
2478 return IF_Gbps(10);
2479 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_20GB:
2480 return IF_Gbps(20);
2481 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_25GB:
2482 return IF_Gbps(25);
2483 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_40GB:
2484 return IF_Gbps(40);
2485 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_50GB:
2486 return IF_Gbps(50);
2487 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_100GB:
2488 return IF_Gbps(100);
2489 case HWRM_PORT_PHY_QCFG_OUTPUT_LINK_SPEED_10MB:
2490 return IF_Mbps(10);
2491 }
2492 return IF_Gbps(100);
2493 }
2494
2495 static void
bnxt_get_wol_settings(struct bnxt_softc * softc)2496 bnxt_get_wol_settings(struct bnxt_softc *softc)
2497 {
2498 uint16_t wol_handle = 0;
2499
2500 if (!bnxt_wol_supported(softc))
2501 return;
2502
2503 do {
2504 wol_handle = bnxt_hwrm_get_wol_fltrs(softc, wol_handle);
2505 } while (wol_handle && wol_handle != BNXT_NO_MORE_WOL_FILTERS);
2506 }
2507